The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ata/chipsets/ata-acard.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer,
   12  *    without modification, immediately at the beginning of the file.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27  */
   28 
   29 #include <sys/cdefs.h>
   30 __FBSDID("$FreeBSD$");
   31 
   32 #include <sys/param.h>
   33 #include <sys/module.h>
   34 #include <sys/systm.h>
   35 #include <sys/kernel.h>
   36 #include <sys/ata.h>
   37 #include <sys/bus.h>
   38 #include <sys/endian.h>
   39 #include <sys/malloc.h>
   40 #include <sys/lock.h>
   41 #include <sys/mutex.h>
   42 #include <sys/sema.h>
   43 #include <sys/taskqueue.h>
   44 #include <vm/uma.h>
   45 #include <machine/stdarg.h>
   46 #include <machine/resource.h>
   47 #include <machine/bus.h>
   48 #include <sys/rman.h>
   49 #include <dev/pci/pcivar.h>
   50 #include <dev/pci/pcireg.h>
   51 #include <dev/ata/ata-all.h>
   52 #include <dev/ata/ata-pci.h>
   53 #include <ata_if.h>
   54 
   55 /* local prototypes */
   56 static int ata_acard_chipinit(device_t dev);
   57 static int ata_acard_ch_attach(device_t dev);
   58 static int ata_acard_status(device_t dev);
   59 static int ata_acard_850_setmode(device_t dev, int target, int mode);
   60 static int ata_acard_86X_setmode(device_t dev, int target, int mode);
   61 
   62 /* misc defines */
   63 #define ATP_OLD         1
   64 
   65 /*
   66  * Acard chipset support functions
   67  */
   68 static int
   69 ata_acard_probe(device_t dev)
   70 {
   71     struct ata_pci_controller *ctlr = device_get_softc(dev);
   72     static const struct ata_chip_id ids[] =
   73     {{ ATA_ATP850R, 0, ATP_OLD, 0x00, ATA_UDMA2, "ATP850" },
   74      { ATA_ATP860A, 0, 0,       0x00, ATA_UDMA4, "ATP860A" },
   75      { ATA_ATP860R, 0, 0,       0x00, ATA_UDMA4, "ATP860R" },
   76      { ATA_ATP865A, 0, 0,       0x00, ATA_UDMA6, "ATP865A" },
   77      { ATA_ATP865R, 0, 0,       0x00, ATA_UDMA6, "ATP865R" },
   78      { 0, 0, 0, 0, 0, 0}};
   79 
   80     if (pci_get_vendor(dev) != ATA_ACARD_ID)
   81         return ENXIO;
   82 
   83     if (!(ctlr->chip = ata_match_chip(dev, ids)))
   84         return ENXIO;
   85 
   86     ata_set_desc(dev);
   87     ctlr->chipinit = ata_acard_chipinit;
   88     return (BUS_PROBE_LOW_PRIORITY);
   89 }
   90 
   91 static int
   92 ata_acard_chipinit(device_t dev)
   93 {
   94     struct ata_pci_controller *ctlr = device_get_softc(dev);
   95 
   96     if (ata_setup_interrupt(dev, ata_generic_intr))
   97         return ENXIO;
   98 
   99     ctlr->ch_attach = ata_acard_ch_attach;
  100     ctlr->ch_detach = ata_pci_ch_detach;
  101     if (ctlr->chip->cfg1 == ATP_OLD) {
  102         ctlr->setmode = ata_acard_850_setmode;
  103         /* Work around the lack of channel serialization in ATA_CAM. */
  104         ctlr->channels = 1;
  105         device_printf(dev, "second channel ignored\n");
  106     }
  107     else
  108         ctlr->setmode = ata_acard_86X_setmode;
  109     return 0;
  110 }
  111 
  112 static int
  113 ata_acard_ch_attach(device_t dev)
  114 {
  115     struct ata_channel *ch = device_get_softc(dev);
  116 
  117     /* setup the usual register normal pci style */
  118     if (ata_pci_ch_attach(dev))
  119         return ENXIO;
  120 
  121     ch->hw.status = ata_acard_status;
  122     ch->flags |= ATA_NO_ATAPI_DMA;
  123     return 0;
  124 }
  125 
  126 static int
  127 ata_acard_status(device_t dev)
  128 {
  129     struct ata_channel *ch = device_get_softc(dev);
  130 
  131     if (ch->dma.flags & ATA_DMA_ACTIVE) {
  132         int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
  133 
  134         if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
  135             ATA_BMSTAT_INTERRUPT)
  136             return 0;
  137         ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
  138         DELAY(1);
  139         ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
  140                      ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
  141         DELAY(1);
  142     }
  143     if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) {
  144         DELAY(100);
  145         if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY)
  146             return 0;
  147     }
  148     return 1;
  149 }
  150 
  151 static int
  152 ata_acard_850_setmode(device_t dev, int target, int mode)
  153 {
  154     device_t parent = device_get_parent(dev);
  155     struct ata_pci_controller *ctlr = device_get_softc(parent);
  156     struct ata_channel *ch = device_get_softc(dev);
  157     int devno = (ch->unit << 1) + target;
  158 
  159     mode = min(mode, ctlr->chip->max_dma);
  160     /* XXX SOS missing WDMA0+1 + PIO modes */
  161     if (mode >= ATA_WDMA2) {
  162             u_int8_t reg54 = pci_read_config(parent, 0x54, 1);
  163             
  164             reg54 &= ~(0x03 << (devno << 1));
  165             if (mode >= ATA_UDMA0)
  166                 reg54 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 1));
  167             pci_write_config(parent, 0x54, reg54, 1);
  168             pci_write_config(parent, 0x4a, 0xa6, 1);
  169             pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2);
  170     }
  171     /* we could set PIO mode timings, but we assume the BIOS did that */
  172     return (mode);
  173 }
  174 
  175 static int
  176 ata_acard_86X_setmode(device_t dev, int target, int mode)
  177 {
  178         device_t parent = device_get_parent(dev);
  179         struct ata_pci_controller *ctlr = device_get_softc(parent);
  180         struct ata_channel *ch = device_get_softc(dev);
  181         int devno = (ch->unit << 1) + target;
  182 
  183         mode = min(mode, ctlr->chip->max_dma);
  184         /* XXX SOS missing WDMA0+1 + PIO modes */
  185         if (mode >= ATA_WDMA2) {
  186                 u_int16_t reg44 = pci_read_config(parent, 0x44, 2);
  187             
  188                 reg44 &= ~(0x000f << (devno << 2));
  189                 if (mode >= ATA_UDMA0)
  190                         reg44 |= (((mode & ATA_MODE_MASK) + 1) << (devno << 2));
  191                 pci_write_config(parent, 0x44, reg44, 2);
  192                 pci_write_config(parent, 0x4a, 0xa6, 1);
  193                 pci_write_config(parent, 0x40 + devno, 0x31, 1);
  194         }
  195         /* we could set PIO mode timings, but we assume the BIOS did that */
  196         return (mode);
  197 }
  198 
  199 ATA_DECLARE_DRIVER(ata_acard);

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