The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ata/chipsets/ata-marvell.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer,
   12  *    without modification, immediately at the beginning of the file.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   26  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   27  */
   28 
   29 #include <sys/cdefs.h>
   30 __FBSDID("$FreeBSD$");
   31 
   32 #include <sys/param.h>
   33 #include <sys/module.h>
   34 #include <sys/systm.h>
   35 #include <sys/kernel.h>
   36 #include <sys/ata.h>
   37 #include <sys/bus.h>
   38 #include <sys/endian.h>
   39 #include <sys/malloc.h>
   40 #include <sys/lock.h>
   41 #include <sys/mutex.h>
   42 #include <sys/sema.h>
   43 #include <sys/taskqueue.h>
   44 #include <vm/uma.h>
   45 #include <machine/stdarg.h>
   46 #include <machine/resource.h>
   47 #include <machine/bus.h>
   48 #include <sys/rman.h>
   49 #include <dev/pci/pcivar.h>
   50 #include <dev/pci/pcireg.h>
   51 #include <dev/ata/ata-all.h>
   52 #include <dev/ata/ata-pci.h>
   53 #include <ata_if.h>
   54 
   55 /* local prototypes */
   56 static int ata_marvell_chipinit(device_t dev);
   57 static int ata_marvell_ch_attach(device_t dev);
   58 static int ata_marvell_setmode(device_t dev, int target, int mode);
   59 static int ata_marvell_dummy_chipinit(device_t dev);
   60 
   61 /* misc defines */
   62 #define MV_61XX         61
   63 #define MV_91XX         91
   64 
   65 /*
   66  * Marvell chipset support functions
   67  */
   68 #define ATA_MV_HOST_BASE(ch) \
   69         ((ch->unit & 3) * 0x0100) + (ch->unit > 3 ? 0x30000 : 0x20000)
   70 #define ATA_MV_EDMA_BASE(ch) \
   71         ((ch->unit & 3) * 0x2000) + (ch->unit > 3 ? 0x30000 : 0x20000)
   72 
   73 struct ata_marvell_response {
   74     u_int16_t   tag;
   75     u_int8_t    edma_status;
   76     u_int8_t    dev_status;
   77     u_int32_t   timestamp;
   78 };
   79 
   80 struct ata_marvell_dma_prdentry {
   81     u_int32_t addrlo;
   82     u_int32_t count;
   83     u_int32_t addrhi;
   84     u_int32_t reserved;
   85 };  
   86 
   87 static int
   88 ata_marvell_probe(device_t dev)
   89 {
   90     struct ata_pci_controller *ctlr = device_get_softc(dev);
   91     static const struct ata_chip_id ids[] =
   92     {{ ATA_M88SE6101, 0, 0, MV_61XX, ATA_UDMA6, "88SE6101" },
   93      { ATA_M88SE6102, 0, 0, MV_61XX, ATA_UDMA6, "88SE6102" },
   94      { ATA_M88SE6111, 0, 1, MV_61XX, ATA_UDMA6, "88SE6111" },
   95      { ATA_M88SE6121, 0, 2, MV_61XX, ATA_UDMA6, "88SE6121" },
   96      { ATA_M88SE6141, 0, 4, MV_61XX, ATA_UDMA6, "88SE6141" },
   97      { ATA_M88SE6145, 0, 4, MV_61XX, ATA_UDMA6, "88SE6145" },
   98      { 0x91a41b4b,    0, 0, MV_91XX, ATA_UDMA6, "88SE912x" },
   99      { 0, 0, 0, 0, 0, 0}};
  100 
  101     if (pci_get_vendor(dev) != ATA_MARVELL_ID &&
  102         pci_get_vendor(dev) != ATA_MARVELL2_ID)
  103         return ENXIO;
  104 
  105     if (!(ctlr->chip = ata_match_chip(dev, ids)))
  106         return ENXIO;
  107 
  108     ata_set_desc(dev);
  109 
  110     switch (ctlr->chip->cfg2) {
  111     case MV_61XX:
  112         ctlr->chipinit = ata_marvell_chipinit;
  113         break;
  114     case MV_91XX:
  115         ctlr->chipinit = ata_marvell_dummy_chipinit;
  116         break;
  117     }
  118     return (BUS_PROBE_LOW_PRIORITY);
  119 }
  120 
  121 static int
  122 ata_marvell_chipinit(device_t dev)
  123 {
  124         struct ata_pci_controller *ctlr = device_get_softc(dev);
  125         device_t child;
  126 
  127         if (ata_setup_interrupt(dev, ata_generic_intr))
  128                 return ENXIO;
  129         /* Create AHCI subdevice if AHCI part present. */
  130         if (ctlr->chip->cfg1) {
  131                 child = device_add_child(dev, NULL, -1);
  132                 if (child != NULL) {
  133                     device_set_ivars(child, (void *)(intptr_t)-1);
  134                     bus_generic_attach(dev);
  135                 }
  136         }
  137         ctlr->ch_attach = ata_marvell_ch_attach;
  138         ctlr->ch_detach = ata_pci_ch_detach;
  139         ctlr->reset = ata_generic_reset;
  140         ctlr->setmode = ata_marvell_setmode;
  141         ctlr->channels = 1;
  142         return (0);
  143 }
  144 
  145 static int
  146 ata_marvell_ch_attach(device_t dev)
  147 {
  148         struct ata_channel *ch = device_get_softc(dev);
  149         int error;
  150 
  151         error = ata_pci_ch_attach(dev);
  152         /* dont use 32 bit PIO transfers */
  153         ch->flags |= ATA_USE_16BIT;
  154         ch->flags |= ATA_CHECKS_CABLE;
  155         return (error);
  156 }
  157 
  158 static int
  159 ata_marvell_setmode(device_t dev, int target, int mode)
  160 {
  161         struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
  162         struct ata_channel *ch = device_get_softc(dev);
  163 
  164         mode = min(mode, ctlr->chip->max_dma);
  165         /* Check for 80pin cable present. */
  166         if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
  167             ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x01) {
  168                 ata_print_cable(dev, "controller");
  169                 mode = ATA_UDMA2;
  170         }
  171         /* Nothing to do to setup mode, the controller snoop SET_FEATURE cmd. */
  172         return (mode);
  173 }
  174 
  175 static int
  176 ata_marvell_dummy_chipinit(device_t dev)
  177 {
  178         struct ata_pci_controller *ctlr = device_get_softc(dev);
  179 
  180         ctlr->channels = 0;
  181         return (0);
  182 }
  183 
  184 ATA_DECLARE_DRIVER(ata_marvell);

Cache object: 37234f92f5b47227f61bde02d401bd74


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