FreeBSD/Linux Kernel Cross Reference
sys/dev/ath/ah_osdep.c
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 *
31 * $FreeBSD$
32 */
33 #include "opt_ah.h"
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/sysctl.h>
40 #include <sys/bus.h>
41 #include <sys/malloc.h>
42 #include <sys/proc.h>
43 #include <sys/pcpu.h>
44 #include <sys/lock.h>
45 #include <sys/mutex.h>
46 #include <sys/conf.h>
47
48 #include <machine/stdarg.h>
49
50 #include <net/ethernet.h> /* XXX for ether_sprintf */
51
52 #include <dev/ath/ath_hal/ah.h>
53 #include <dev/ath/ath_hal/ah_debug.h>
54
55 /*
56 * WiSoC boards overload the bus tag with information about the
57 * board layout. We must extract the bus space tag from that
58 * indirect structure. For everyone else the tag is passed in
59 * directly.
60 * XXX cache indirect ref privately
61 */
62 #ifdef AH_SUPPORT_AR5312
63 #define BUSTAG(ah) \
64 ((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
65 #else
66 #define BUSTAG(ah) ((ah)->ah_st)
67 #endif
68
69 /*
70 * This lock is used to seralise register access for chips which have
71 * problems w/ SMP CPUs issuing concurrent PCI transactions.
72 *
73 * XXX This is a global lock for now; it should be pushed to
74 * a per-device lock in some platform-independent fashion.
75 */
76 struct mtx ah_regser_mtx;
77 MTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex",
78 MTX_SPIN);
79
80 extern void ath_hal_printf(struct ath_hal *, const char*, ...)
81 __printflike(2,3);
82 extern void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
83 __printflike(2, 0);
84 extern const char* ath_hal_ether_sprintf(const u_int8_t *mac);
85 extern void *ath_hal_malloc(size_t);
86 extern void ath_hal_free(void *);
87 #ifdef AH_ASSERT
88 extern void ath_hal_assert_failed(const char* filename,
89 int lineno, const char* msg);
90 #endif
91 #ifdef AH_DEBUG
92 extern void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
93 #endif /* AH_DEBUG */
94
95 /* NB: put this here instead of the driver to avoid circular references */
96 SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
97 "Atheros driver parameters");
98 static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
99 "Atheros HAL parameters");
100
101 #ifdef AH_DEBUG
102 int ath_hal_debug = 0;
103 SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RWTUN, &ath_hal_debug,
104 0, "Atheros HAL debugging printfs");
105 #endif /* AH_DEBUG */
106
107 static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
108
109 void*
110 ath_hal_malloc(size_t size)
111 {
112 return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
113 }
114
115 void
116 ath_hal_free(void* p)
117 {
118 free(p, M_ATH_HAL);
119 }
120
121 void
122 ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
123 {
124 vprintf(fmt, ap);
125 }
126
127 void
128 ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
129 {
130 va_list ap;
131 va_start(ap, fmt);
132 ath_hal_vprintf(ah, fmt, ap);
133 va_end(ap);
134 }
135
136 const char*
137 ath_hal_ether_sprintf(const u_int8_t *mac)
138 {
139 return ether_sprintf(mac);
140 }
141
142 #ifdef AH_DEBUG
143
144 /*
145 * XXX This is highly relevant only for the AR5416 and later
146 * PCI/PCIe NICs. It'll need adjustment for other hardware
147 * variations.
148 */
149 static int
150 ath_hal_reg_whilst_asleep(struct ath_hal *ah, uint32_t reg)
151 {
152
153 if (reg >= 0x4000 && reg < 0x5000)
154 return (1);
155 if (reg >= 0x6000 && reg < 0x7000)
156 return (1);
157 if (reg >= 0x7000 && reg < 0x8000)
158 return (1);
159 return (0);
160 }
161
162 void
163 DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
164 {
165 if ((mask == HAL_DEBUG_UNMASKABLE) ||
166 (ah != NULL && ah->ah_config.ah_debug & mask) ||
167 (ath_hal_debug & mask)) {
168 __va_list ap;
169 va_start(ap, fmt);
170 ath_hal_vprintf(ah, fmt, ap);
171 va_end(ap);
172 }
173 }
174 #undef HAL_DEBUG_UNMASKABLE
175 #endif /* AH_DEBUG */
176
177 #ifdef AH_DEBUG_ALQ
178 /*
179 * ALQ register tracing support.
180 *
181 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
182 * writes to the file /tmp/ath_hal.log. The file format is a simple
183 * fixed-size array of records. When done logging set hw.ath.hal.alq=0
184 * and then decode the file with the arcode program (that is part of the
185 * HAL). If you start+stop tracing the data will be appended to an
186 * existing file.
187 *
188 * NB: doesn't handle multiple devices properly; only one DEVICE record
189 * is emitted and the different devices are not identified.
190 */
191 #include <sys/alq.h>
192 #include <sys/pcpu.h>
193 #include <dev/ath/ath_hal/ah_decode.h>
194
195 static struct alq *ath_hal_alq;
196 static int ath_hal_alq_emitdev; /* need to emit DEVICE record */
197 static u_int ath_hal_alq_lost; /* count of lost records */
198 static char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
199
200 SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
201 &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
202
203 static u_int ath_hal_alq_qsize = 64*1024;
204
205 static int
206 ath_hal_setlogging(int enable)
207 {
208 int error;
209
210 if (enable) {
211 error = alq_open(&ath_hal_alq, ath_hal_logfile,
212 curthread->td_ucred, ALQ_DEFAULT_CMODE,
213 sizeof (struct athregrec), ath_hal_alq_qsize);
214 ath_hal_alq_lost = 0;
215 ath_hal_alq_emitdev = 1;
216 printf("ath_hal: logging to %s enabled\n",
217 ath_hal_logfile);
218 } else {
219 if (ath_hal_alq)
220 alq_close(ath_hal_alq);
221 ath_hal_alq = NULL;
222 printf("ath_hal: logging disabled\n");
223 error = 0;
224 }
225 return (error);
226 }
227
228 static int
229 sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
230 {
231 int error, enable;
232
233 enable = (ath_hal_alq != NULL);
234 error = sysctl_handle_int(oidp, &enable, 0, req);
235 if (error || !req->newptr)
236 return (error);
237 else
238 return (ath_hal_setlogging(enable));
239 }
240 SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq,
241 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE,
242 0, 0, sysctl_hw_ath_hal_log, "I",
243 "Enable HAL register logging");
244 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
245 &ath_hal_alq_qsize, 0, "In-memory log size (#records)");
246 SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
247 &ath_hal_alq_lost, 0, "Register operations not logged");
248
249 static struct ale *
250 ath_hal_alq_get(struct ath_hal *ah)
251 {
252 struct ale *ale;
253
254 if (ath_hal_alq_emitdev) {
255 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
256 if (ale) {
257 struct athregrec *r =
258 (struct athregrec *) ale->ae_data;
259 r->op = OP_DEVICE;
260 r->reg = 0;
261 r->val = ah->ah_devid;
262 alq_post(ath_hal_alq, ale);
263 ath_hal_alq_emitdev = 0;
264 } else
265 ath_hal_alq_lost++;
266 }
267 ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
268 if (!ale)
269 ath_hal_alq_lost++;
270 return ale;
271 }
272
273 void
274 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
275 {
276 bus_space_tag_t tag = BUSTAG(ah);
277 bus_space_handle_t h = ah->ah_sh;
278
279 #ifdef AH_DEBUG
280 /* Debug - complain if we haven't fully waken things up */
281 if (! ath_hal_reg_whilst_asleep(ah, reg) &&
282 ah->ah_powerMode != HAL_PM_AWAKE) {
283 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
284 __func__, reg, val, ah->ah_powerMode);
285 }
286 #endif
287
288 if (ath_hal_alq) {
289 struct ale *ale = ath_hal_alq_get(ah);
290 if (ale) {
291 struct athregrec *r = (struct athregrec *) ale->ae_data;
292 r->threadid = curthread->td_tid;
293 r->op = OP_WRITE;
294 r->reg = reg;
295 r->val = val;
296 alq_post(ath_hal_alq, ale);
297 }
298 }
299 if (ah->ah_config.ah_serialise_reg_war)
300 mtx_lock_spin(&ah_regser_mtx);
301 bus_space_write_4(tag, h, reg, val);
302 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE);
303 if (ah->ah_config.ah_serialise_reg_war)
304 mtx_unlock_spin(&ah_regser_mtx);
305 }
306
307 u_int32_t
308 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
309 {
310 bus_space_tag_t tag = BUSTAG(ah);
311 bus_space_handle_t h = ah->ah_sh;
312 u_int32_t val;
313
314 #ifdef AH_DEBUG
315 /* Debug - complain if we haven't fully waken things up */
316 if (! ath_hal_reg_whilst_asleep(ah, reg) &&
317 ah->ah_powerMode != HAL_PM_AWAKE) {
318 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
319 __func__, reg, ah->ah_powerMode);
320 }
321 #endif
322
323 if (ah->ah_config.ah_serialise_reg_war)
324 mtx_lock_spin(&ah_regser_mtx);
325 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ);
326 val = bus_space_read_4(tag, h, reg);
327 if (ah->ah_config.ah_serialise_reg_war)
328 mtx_unlock_spin(&ah_regser_mtx);
329 if (ath_hal_alq) {
330 struct ale *ale = ath_hal_alq_get(ah);
331 if (ale) {
332 struct athregrec *r = (struct athregrec *) ale->ae_data;
333 r->threadid = curthread->td_tid;
334 r->op = OP_READ;
335 r->reg = reg;
336 r->val = val;
337 alq_post(ath_hal_alq, ale);
338 }
339 }
340 return val;
341 }
342
343 void
344 OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
345 {
346 if (ath_hal_alq) {
347 struct ale *ale = ath_hal_alq_get(ah);
348 if (ale) {
349 struct athregrec *r = (struct athregrec *) ale->ae_data;
350 r->threadid = curthread->td_tid;
351 r->op = OP_MARK;
352 r->reg = id;
353 r->val = v;
354 alq_post(ath_hal_alq, ale);
355 }
356 }
357 }
358 #else /* AH_DEBUG_ALQ */
359
360 /*
361 * Memory-mapped device register read/write. These are here
362 * as routines when debugging support is enabled and/or when
363 * explicitly configured to use function calls. The latter is
364 * for architectures that might need to do something before
365 * referencing memory (e.g. remap an i/o window).
366 *
367 * NB: see the comments in ah_osdep.h about byte-swapping register
368 * reads and writes to understand what's going on below.
369 */
370
371 void
372 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
373 {
374 bus_space_tag_t tag = BUSTAG(ah);
375 bus_space_handle_t h = ah->ah_sh;
376
377 #ifdef AH_DEBUG
378 /* Debug - complain if we haven't fully waken things up */
379 if (! ath_hal_reg_whilst_asleep(ah, reg) &&
380 ah->ah_powerMode != HAL_PM_AWAKE) {
381 ath_hal_printf(ah, "%s: reg=0x%08x, val=0x%08x, pm=%d\n",
382 __func__, reg, val, ah->ah_powerMode);
383 }
384 #endif
385
386 if (ah->ah_config.ah_serialise_reg_war)
387 mtx_lock_spin(&ah_regser_mtx);
388 bus_space_write_4(tag, h, reg, val);
389 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_WRITE);
390 if (ah->ah_config.ah_serialise_reg_war)
391 mtx_unlock_spin(&ah_regser_mtx);
392 }
393
394 u_int32_t
395 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
396 {
397 bus_space_tag_t tag = BUSTAG(ah);
398 bus_space_handle_t h = ah->ah_sh;
399 u_int32_t val;
400
401 #ifdef AH_DEBUG
402 /* Debug - complain if we haven't fully waken things up */
403 if (! ath_hal_reg_whilst_asleep(ah, reg) &&
404 ah->ah_powerMode != HAL_PM_AWAKE) {
405 ath_hal_printf(ah, "%s: reg=0x%08x, pm=%d\n",
406 __func__, reg, ah->ah_powerMode);
407 }
408 #endif
409
410 if (ah->ah_config.ah_serialise_reg_war)
411 mtx_lock_spin(&ah_regser_mtx);
412 OS_BUS_BARRIER_REG(ah, reg, OS_BUS_BARRIER_READ);
413 val = bus_space_read_4(tag, h, reg);
414 if (ah->ah_config.ah_serialise_reg_war)
415 mtx_unlock_spin(&ah_regser_mtx);
416 return val;
417 }
418 #endif /* AH_DEBUG_ALQ */
419
420 #ifdef AH_ASSERT
421 void
422 ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
423 {
424 printf("Atheros HAL assertion failure: %s: line %u: %s\n",
425 filename, lineno, msg);
426 panic("ath_hal_assert");
427 }
428 #endif /* AH_ASSERT */
429
430 static int
431 ath_hal_modevent(module_t mod __unused, int type, void *data __unused)
432 {
433 int error = 0;
434
435 switch (type) {
436 case MOD_LOAD:
437 if (bootverbose)
438 printf("[ath_hal] loaded\n");
439 break;
440
441 case MOD_UNLOAD:
442 if (bootverbose)
443 printf("[ath_hal] unloaded\n");
444 break;
445
446 case MOD_SHUTDOWN:
447 break;
448
449 default:
450 error = EOPNOTSUPP;
451 break;
452 }
453 return (error);
454 }
455
456 DEV_MODULE(ath_hal, ath_hal_modevent, NULL);
457 MODULE_VERSION(ath_hal, 1);
458 #if defined(AH_DEBUG_ALQ)
459 MODULE_DEPEND(ath_hal, alq, 1, 1, 1);
460 #endif
Cache object: 7e094fcf55d07b01f581dd70d373d440
|