Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ath/ath_hal/ar5210/ar5210_attach.c
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1 /*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2004 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD$ 20 */ 21 #include "opt_ah.h" 22 23 #include "ah.h" 24 #include "ah_internal.h" 25 #include "ah_devid.h" 26 27 #include "ar5210/ar5210.h" 28 #include "ar5210/ar5210reg.h" 29 #include "ar5210/ar5210phy.h" 30 31 #include "ah_eeprom_v1.h" 32 33 static HAL_BOOL ar5210GetChannelEdges(struct ath_hal *, 34 uint16_t flags, uint16_t *low, uint16_t *high); 35 static HAL_BOOL ar5210GetChipPowerLimits(struct ath_hal *ah, 36 struct ieee80211_channel *chan); 37 38 static void ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, 39 HAL_BOOL power_on); 40 static void ar5210DisablePCIE(struct ath_hal *ah); 41 42 static const struct ath_hal_private ar5210hal = {{ 43 .ah_magic = AR5210_MAGIC, 44 45 .ah_getRateTable = ar5210GetRateTable, 46 .ah_detach = ar5210Detach, 47 48 /* Reset Functions */ 49 .ah_reset = ar5210Reset, 50 .ah_phyDisable = ar5210PhyDisable, 51 .ah_disable = ar5210Disable, 52 .ah_configPCIE = ar5210ConfigPCIE, 53 .ah_disablePCIE = ar5210DisablePCIE, 54 .ah_setPCUConfig = ar5210SetPCUConfig, 55 .ah_perCalibration = ar5210PerCalibration, 56 .ah_perCalibrationN = ar5210PerCalibrationN, 57 .ah_resetCalValid = ar5210ResetCalValid, 58 .ah_setTxPowerLimit = ar5210SetTxPowerLimit, 59 .ah_getChanNoise = ath_hal_getChanNoise, 60 61 /* Transmit functions */ 62 .ah_updateTxTrigLevel = ar5210UpdateTxTrigLevel, 63 .ah_setupTxQueue = ar5210SetupTxQueue, 64 .ah_setTxQueueProps = ar5210SetTxQueueProps, 65 .ah_getTxQueueProps = ar5210GetTxQueueProps, 66 .ah_releaseTxQueue = ar5210ReleaseTxQueue, 67 .ah_resetTxQueue = ar5210ResetTxQueue, 68 .ah_getTxDP = ar5210GetTxDP, 69 .ah_setTxDP = ar5210SetTxDP, 70 .ah_numTxPending = ar5210NumTxPending, 71 .ah_startTxDma = ar5210StartTxDma, 72 .ah_stopTxDma = ar5210StopTxDma, 73 .ah_setupTxDesc = ar5210SetupTxDesc, 74 .ah_setupXTxDesc = ar5210SetupXTxDesc, 75 .ah_fillTxDesc = ar5210FillTxDesc, 76 .ah_procTxDesc = ar5210ProcTxDesc, 77 .ah_getTxIntrQueue = ar5210GetTxIntrQueue, 78 .ah_reqTxIntrDesc = ar5210IntrReqTxDesc, 79 .ah_getTxCompletionRates = ar5210GetTxCompletionRates, 80 .ah_setTxDescLink = ar5210SetTxDescLink, 81 .ah_getTxDescLink = ar5210GetTxDescLink, 82 .ah_getTxDescLinkPtr = ar5210GetTxDescLinkPtr, 83 84 /* RX Functions */ 85 .ah_getRxDP = ar5210GetRxDP, 86 .ah_setRxDP = ar5210SetRxDP, 87 .ah_enableReceive = ar5210EnableReceive, 88 .ah_stopDmaReceive = ar5210StopDmaReceive, 89 .ah_startPcuReceive = ar5210StartPcuReceive, 90 .ah_stopPcuReceive = ar5210StopPcuReceive, 91 .ah_setMulticastFilter = ar5210SetMulticastFilter, 92 .ah_setMulticastFilterIndex = ar5210SetMulticastFilterIndex, 93 .ah_clrMulticastFilterIndex = ar5210ClrMulticastFilterIndex, 94 .ah_getRxFilter = ar5210GetRxFilter, 95 .ah_setRxFilter = ar5210SetRxFilter, 96 .ah_setupRxDesc = ar5210SetupRxDesc, 97 .ah_procRxDesc = ar5210ProcRxDesc, 98 .ah_rxMonitor = ar5210RxMonitor, 99 .ah_aniPoll = ar5210AniPoll, 100 .ah_procMibEvent = ar5210MibEvent, 101 102 /* Misc Functions */ 103 .ah_getCapability = ar5210GetCapability, 104 .ah_setCapability = ar5210SetCapability, 105 .ah_getDiagState = ar5210GetDiagState, 106 .ah_getMacAddress = ar5210GetMacAddress, 107 .ah_setMacAddress = ar5210SetMacAddress, 108 .ah_getBssIdMask = ar5210GetBssIdMask, 109 .ah_setBssIdMask = ar5210SetBssIdMask, 110 .ah_setRegulatoryDomain = ar5210SetRegulatoryDomain, 111 .ah_setLedState = ar5210SetLedState, 112 .ah_writeAssocid = ar5210WriteAssocid, 113 .ah_gpioCfgInput = ar5210GpioCfgInput, 114 .ah_gpioCfgOutput = ar5210GpioCfgOutput, 115 .ah_gpioGet = ar5210GpioGet, 116 .ah_gpioSet = ar5210GpioSet, 117 .ah_gpioSetIntr = ar5210Gpio0SetIntr, 118 .ah_getTsf32 = ar5210GetTsf32, 119 .ah_getTsf64 = ar5210GetTsf64, 120 .ah_resetTsf = ar5210ResetTsf, 121 .ah_detectCardPresent = ar5210DetectCardPresent, 122 .ah_updateMibCounters = ar5210UpdateMibCounters, 123 .ah_getRfGain = ar5210GetRfgain, 124 .ah_getDefAntenna = ar5210GetDefAntenna, 125 .ah_setDefAntenna = ar5210SetDefAntenna, 126 .ah_getAntennaSwitch = ar5210GetAntennaSwitch, 127 .ah_setAntennaSwitch = ar5210SetAntennaSwitch, 128 .ah_setSifsTime = ar5210SetSifsTime, 129 .ah_getSifsTime = ar5210GetSifsTime, 130 .ah_setSlotTime = ar5210SetSlotTime, 131 .ah_getSlotTime = ar5210GetSlotTime, 132 .ah_setAckTimeout = ar5210SetAckTimeout, 133 .ah_getAckTimeout = ar5210GetAckTimeout, 134 .ah_setAckCTSRate = ar5210SetAckCTSRate, 135 .ah_getAckCTSRate = ar5210GetAckCTSRate, 136 .ah_setCTSTimeout = ar5210SetCTSTimeout, 137 .ah_getCTSTimeout = ar5210GetCTSTimeout, 138 .ah_setDecompMask = ar5210SetDecompMask, 139 .ah_setCoverageClass = ar5210SetCoverageClass, 140 .ah_setQuiet = ar5210SetQuiet, 141 .ah_get11nExtBusy = ar5210Get11nExtBusy, 142 .ah_getMibCycleCounts = ar5210GetMibCycleCounts, 143 .ah_setChainMasks = ar5210SetChainMasks, 144 .ah_enableDfs = ar5210EnableDfs, 145 .ah_getDfsThresh = ar5210GetDfsThresh, 146 /* XXX procRadarEvent */ 147 /* XXX isFastClockEnabled */ 148 .ah_getNav = ar5210GetNav, 149 .ah_setNav = ar5210SetNav, 150 151 /* Key Cache Functions */ 152 .ah_getKeyCacheSize = ar5210GetKeyCacheSize, 153 .ah_resetKeyCacheEntry = ar5210ResetKeyCacheEntry, 154 .ah_isKeyCacheEntryValid = ar5210IsKeyCacheEntryValid, 155 .ah_setKeyCacheEntry = ar5210SetKeyCacheEntry, 156 .ah_setKeyCacheEntryMac = ar5210SetKeyCacheEntryMac, 157 158 /* Power Management Functions */ 159 .ah_setPowerMode = ar5210SetPowerMode, 160 .ah_getPowerMode = ar5210GetPowerMode, 161 162 /* Beacon Functions */ 163 .ah_setBeaconTimers = ar5210SetBeaconTimers, 164 .ah_beaconInit = ar5210BeaconInit, 165 .ah_setStationBeaconTimers = ar5210SetStaBeaconTimers, 166 .ah_resetStationBeaconTimers = ar5210ResetStaBeaconTimers, 167 .ah_getNextTBTT = ar5210GetNextTBTT, 168 169 /* Interrupt Functions */ 170 .ah_isInterruptPending = ar5210IsInterruptPending, 171 .ah_getPendingInterrupts = ar5210GetPendingInterrupts, 172 .ah_getInterrupts = ar5210GetInterrupts, 173 .ah_setInterrupts = ar5210SetInterrupts }, 174 175 .ah_getChannelEdges = ar5210GetChannelEdges, 176 .ah_getWirelessModes = ar5210GetWirelessModes, 177 .ah_eepromRead = ar5210EepromRead, 178 #ifdef AH_SUPPORT_WRITE_EEPROM 179 .ah_eepromWrite = ar5210EepromWrite, 180 #endif 181 .ah_getChipPowerLimits = ar5210GetChipPowerLimits, 182 }; 183 184 static HAL_BOOL ar5210FillCapabilityInfo(struct ath_hal *ah); 185 186 /* 187 * Attach for an AR5210 part. 188 */ 189 static struct ath_hal * 190 ar5210Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, 191 uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status) 192 { 193 #define N(a) (sizeof(a)/sizeof(a[0])) 194 struct ath_hal_5210 *ahp; 195 struct ath_hal *ah; 196 uint32_t revid, pcicfg; 197 uint16_t eeval; 198 HAL_STATUS ecode; 199 int i; 200 201 HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, 202 "%s: devid 0x%x sc %p st %p sh %p\n", __func__, devid, 203 sc, (void*) st, (void*) sh); 204 205 /* NB: memory is returned zero'd */ 206 ahp = ath_hal_malloc(sizeof (struct ath_hal_5210)); 207 if (ahp == AH_NULL) { 208 HALDEBUG(AH_NULL, HAL_DEBUG_ANY, 209 "%s: no memory for state block\n", __func__); 210 ecode = HAL_ENOMEM; 211 goto bad; 212 } 213 ah = &ahp->ah_priv.h; 214 /* set initial values */ 215 OS_MEMCPY(&ahp->ah_priv, &ar5210hal, sizeof(struct ath_hal_private)); 216 ah->ah_sc = sc; 217 ah->ah_st = st; 218 ah->ah_sh = sh; 219 220 ah->ah_devid = devid; /* NB: for AH_DEBUG_ALQ */ 221 AH_PRIVATE(ah)->ah_devid = devid; 222 AH_PRIVATE(ah)->ah_subvendorid = 0; /* XXX */ 223 224 AH_PRIVATE(ah)->ah_powerLimit = AR5210_MAX_RATE_POWER; 225 AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */ 226 227 ah->ah_powerMode = HAL_PM_UNDEFINED; 228 ahp->ah_staId1Defaults = 0; 229 ahp->ah_rssiThr = INIT_RSSI_THR; 230 ahp->ah_sifstime = (u_int) -1; 231 ahp->ah_slottime = (u_int) -1; 232 ahp->ah_acktimeout = (u_int) -1; 233 ahp->ah_ctstimeout = (u_int) -1; 234 235 if (!ar5210ChipReset(ah, AH_NULL)) { /* reset chip */ 236 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", 237 __func__); 238 ecode = HAL_EIO; 239 goto bad; 240 } 241 242 /* Read Revisions from Chips */ 243 AH_PRIVATE(ah)->ah_macVersion = 1; 244 AH_PRIVATE(ah)->ah_macRev = OS_REG_READ(ah, AR_SREV) & 0xff; 245 AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIPID); 246 AH_PRIVATE(ah)->ah_analog2GhzRev = 0; 247 248 /* Read Radio Chip Rev Extract */ 249 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16); 250 for (i = 0; i < 4; i++) 251 OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000); 252 revid = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 28) & 0xf; 253 254 /* Chip labelling is 1 greater than revision register for AR5110 */ 255 AH_PRIVATE(ah)->ah_analog5GhzRev = ath_hal_reverseBits(revid, 4) + 1; 256 257 /* 258 * Read all the settings from the EEPROM and stash 259 * ones we'll use later. 260 */ 261 pcicfg = OS_REG_READ(ah, AR_PCICFG); 262 OS_REG_WRITE(ah, AR_PCICFG, pcicfg | AR_PCICFG_EEPROMSEL); 263 ecode = ath_hal_v1EepromAttach(ah); 264 if (ecode != HAL_OK) { 265 goto eebad; 266 } 267 ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval); 268 if (ecode != HAL_OK) { 269 HALDEBUG(ah, HAL_DEBUG_ANY, 270 "%s: cannot read regulatory domain from EEPROM\n", 271 __func__); 272 goto eebad; 273 } 274 AH_PRIVATE(ah)->ah_currentRD = eeval; 275 ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr); 276 if (ecode != HAL_OK) { 277 HALDEBUG(ah, HAL_DEBUG_ANY, 278 "%s: error getting mac address from EEPROM\n", __func__); 279 goto eebad; 280 } 281 OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ 282 283 AH_PRIVATE(ah)->ah_getNfAdjust = ar5210GetNfAdjust; 284 285 /* 286 * Got everything we need now to setup the capabilities. 287 */ 288 (void) ar5210FillCapabilityInfo(ah); 289 290 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__); 291 292 return ah; 293 eebad: 294 OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ 295 bad: 296 if (ahp) 297 ath_hal_free(ahp); 298 if (status) 299 *status = ecode; 300 return AH_NULL; 301 #undef N 302 } 303 304 void 305 ar5210Detach(struct ath_hal *ah) 306 { 307 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__); 308 309 HALASSERT(ah != AH_NULL); 310 HALASSERT(ah->ah_magic == AR5210_MAGIC); 311 312 ath_hal_eepromDetach(ah); 313 ath_hal_free(ah); 314 } 315 316 /* 317 * Store the channel edges for the requested operational mode 318 */ 319 static HAL_BOOL 320 ar5210GetChannelEdges(struct ath_hal *ah, 321 uint16_t flags, uint16_t *low, uint16_t *high) 322 { 323 if (flags & IEEE80211_CHAN_5GHZ) { 324 *low = 5120; 325 *high = 5430; 326 return AH_TRUE; 327 } else { 328 return AH_FALSE; 329 } 330 } 331 332 static HAL_BOOL 333 ar5210GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan) 334 { 335 /* XXX fill in, this is just a placeholder */ 336 HALDEBUG(ah, HAL_DEBUG_ATTACH, 337 "%s: no min/max power for %u/0x%x\n", 338 __func__, chan->ic_freq, chan->ic_flags); 339 chan->ic_maxpower = AR5210_MAX_RATE_POWER; 340 chan->ic_minpower = 0; 341 return AH_TRUE; 342 } 343 344 static void 345 ar5210ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off) 346 { 347 } 348 349 static void 350 ar5210DisablePCIE(struct ath_hal *ah) 351 { 352 } 353 354 /* 355 * Fill all software cached or static hardware state information. 356 */ 357 static HAL_BOOL 358 ar5210FillCapabilityInfo(struct ath_hal *ah) 359 { 360 struct ath_hal_private *ahpriv = AH_PRIVATE(ah); 361 HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; 362 363 pCap->halWirelessModes |= HAL_MODE_11A; 364 365 pCap->halLow5GhzChan = 5120; 366 pCap->halHigh5GhzChan = 5430; 367 368 pCap->halSleepAfterBeaconBroken = AH_TRUE; 369 pCap->halPSPollBroken = AH_FALSE; 370 pCap->halNumMRRetries = 1; /* No hardware MRR support */ 371 pCap->halNumTxMaps = 1; /* Single TX ptr per descr */ 372 373 pCap->halTotalQueues = HAL_NUM_TX_QUEUES; 374 pCap->halKeyCacheSize = 64; 375 376 /* XXX not needed */ 377 pCap->halChanHalfRate = AH_FALSE; 378 pCap->halChanQuarterRate = AH_FALSE; 379 380 /* 381 * RSSI uses the combined field; some 11n NICs may use 382 * the control chain RSSI. 383 */ 384 pCap->halUseCombinedRadarRssi = AH_TRUE; 385 386 if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL)) { 387 /* 388 * Setup initial rfsilent settings based on the EEPROM 389 * contents. Pin 0, polarity 0 is fixed; record this 390 * using the EEPROM format found in later parts. 391 */ 392 ahpriv->ah_rfsilent = SM(0, AR_EEPROM_RFSILENT_GPIO_SEL) 393 | SM(0, AR_EEPROM_RFSILENT_POLARITY); 394 ahpriv->ah_rfkillEnabled = AH_TRUE; 395 pCap->halRfSilentSupport = AH_TRUE; 396 } 397 398 pCap->halTxTstampPrecision = 16; 399 pCap->halRxTstampPrecision = 15; /* NB: s/w extended from 13 */ 400 pCap->halIntrMask = (HAL_INT_COMMON - HAL_INT_BNR) 401 | HAL_INT_RX 402 | HAL_INT_TX 403 | HAL_INT_FATAL 404 ; 405 406 pCap->hal4kbSplitTransSupport = AH_TRUE; 407 pCap->halHasRxSelfLinkedTail = AH_TRUE; 408 409 ahpriv->ah_rxornIsFatal = AH_TRUE; 410 return AH_TRUE; 411 } 412 413 static const char* 414 ar5210Probe(uint16_t vendorid, uint16_t devid) 415 { 416 if (vendorid == ATHEROS_VENDOR_ID && 417 (devid == AR5210_PROD || devid == AR5210_DEFAULT)) 418 return "Atheros 5210"; 419 return AH_NULL; 420 } 421 AH_CHIP(AR5210, ar5210Probe, ar5210Attach);
Cache object: 20bc81cf1103d60fe4696d5436914178
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