Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/ath/ath_hal/ar5212/ar2317.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD$ 20 */ 21 #include "opt_ah.h" 22 23 #include "ah.h" 24 #include "ah_internal.h" 25 26 #include "ar5212/ar5212.h" 27 #include "ar5212/ar5212reg.h" 28 #include "ar5212/ar5212phy.h" 29 30 #include "ah_eeprom_v3.h" 31 32 #define AH_5212_2317 33 #include "ar5212/ar5212.ini" 34 35 #define N(a) (sizeof(a)/sizeof(a[0])) 36 37 typedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2317; 38 typedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2317; 39 #define PWR_TABLE_SIZE_2317 PWR_TABLE_SIZE_2413 40 41 struct ar2317State { 42 RF_HAL_FUNCS base; /* public state, must be first */ 43 uint16_t pcdacTable[PWR_TABLE_SIZE_2317]; 44 45 uint32_t Bank1Data[N(ar5212Bank1_2317)]; 46 uint32_t Bank2Data[N(ar5212Bank2_2317)]; 47 uint32_t Bank3Data[N(ar5212Bank3_2317)]; 48 uint32_t Bank6Data[N(ar5212Bank6_2317)]; 49 uint32_t Bank7Data[N(ar5212Bank7_2317)]; 50 51 /* 52 * Private state for reduced stack usage. 53 */ 54 /* filled out Vpd table for all pdGains (chanL) */ 55 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL] 56 [MAX_PWR_RANGE_IN_HALF_DB]; 57 /* filled out Vpd table for all pdGains (chanR) */ 58 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL] 59 [MAX_PWR_RANGE_IN_HALF_DB]; 60 /* filled out Vpd table for all pdGains (interpolated) */ 61 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL] 62 [MAX_PWR_RANGE_IN_HALF_DB]; 63 }; 64 #define AR2317(ah) ((struct ar2317State *) AH5212(ah)->ah_rfHal) 65 66 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 67 uint32_t numBits, uint32_t firstBit, uint32_t column); 68 69 static void 70 ar2317WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 71 int writes) 72 { 73 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2317, modesIndex, writes); 74 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2317, 1, writes); 75 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2317, freqIndex, writes); 76 } 77 78 /* 79 * Take the MHz channel value and set the Channel value 80 * 81 * ASSUMES: Writes enabled to analog bus 82 */ 83 static HAL_BOOL 84 ar2317SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan) 85 { 86 uint16_t freq = ath_hal_gethwchannel(ah, chan); 87 uint32_t channelSel = 0; 88 uint32_t bModeSynth = 0; 89 uint32_t aModeRefSel = 0; 90 uint32_t reg32 = 0; 91 92 OS_MARK(ah, AH_MARK_SETCHANNEL, freq); 93 94 if (freq < 4800) { 95 uint32_t txctl; 96 channelSel = freq - 2272 ; 97 channelSel = ath_hal_reverseBits(channelSel, 8); 98 99 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 100 if (freq == 2484) { 101 /* Enable channel spreading for channel 14 */ 102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 103 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 104 } else { 105 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 106 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 107 } 108 } else if ((freq % 20) == 0 && freq >= 5120) { 109 channelSel = ath_hal_reverseBits( 110 ((freq - 4800) / 20 << 2), 8); 111 aModeRefSel = ath_hal_reverseBits(3, 2); 112 } else if ((freq % 10) == 0) { 113 channelSel = ath_hal_reverseBits( 114 ((freq - 4800) / 10 << 1), 8); 115 aModeRefSel = ath_hal_reverseBits(2, 2); 116 } else if ((freq % 5) == 0) { 117 channelSel = ath_hal_reverseBits( 118 (freq - 4800) / 5, 8); 119 aModeRefSel = ath_hal_reverseBits(1, 2); 120 } else { 121 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 122 __func__, freq); 123 return AH_FALSE; 124 } 125 126 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 127 (1 << 12) | 0x1; 128 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 129 130 reg32 >>= 8; 131 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 132 133 AH_PRIVATE(ah)->ah_curchan = chan; 134 return AH_TRUE; 135 } 136 137 /* 138 * Reads EEPROM header info from device structure and programs 139 * all rf registers 140 * 141 * REQUIRES: Access to the analog rf device 142 */ 143 static HAL_BOOL 144 ar2317SetRfRegs(struct ath_hal *ah, 145 const struct ieee80211_channel *chan, 146 uint16_t modesIndex, uint16_t *rfXpdGain) 147 { 148 #define RF_BANK_SETUP(_priv, _ix, _col) do { \ 149 int i; \ 150 for (i = 0; i < N(ar5212Bank##_ix##_2317); i++) \ 151 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2317[i][_col];\ 152 } while (0) 153 struct ath_hal_5212 *ahp = AH5212(ah); 154 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 155 uint16_t ob2GHz = 0, db2GHz = 0; 156 struct ar2317State *priv = AR2317(ah); 157 int regWrites = 0; 158 159 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n", 160 __func__, chan->ic_freq, chan->ic_flags, modesIndex); 161 162 HALASSERT(priv); 163 164 /* Setup rf parameters */ 165 if (IEEE80211_IS_CHAN_B(chan)) { 166 ob2GHz = ee->ee_obFor24; 167 db2GHz = ee->ee_dbFor24; 168 } else { 169 ob2GHz = ee->ee_obFor24g; 170 db2GHz = ee->ee_dbFor24g; 171 } 172 173 /* Bank 1 Write */ 174 RF_BANK_SETUP(priv, 1, 1); 175 176 /* Bank 2 Write */ 177 RF_BANK_SETUP(priv, 2, modesIndex); 178 179 /* Bank 3 Write */ 180 RF_BANK_SETUP(priv, 3, modesIndex); 181 182 /* Bank 6 Write */ 183 RF_BANK_SETUP(priv, 6, modesIndex); 184 185 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0); 186 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0); 187 188 /* Bank 7 Setup */ 189 RF_BANK_SETUP(priv, 7, modesIndex); 190 191 /* Write Analog registers */ 192 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2317, priv->Bank1Data, regWrites); 193 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2317, priv->Bank2Data, regWrites); 194 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2317, priv->Bank3Data, regWrites); 195 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2317, priv->Bank6Data, regWrites); 196 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2317, priv->Bank7Data, regWrites); 197 /* Now that we have reprogrammed rfgain value, clear the flag. */ 198 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 199 200 return AH_TRUE; 201 #undef RF_BANK_SETUP 202 } 203 204 /* 205 * Return a reference to the requested RF Bank. 206 */ 207 static uint32_t * 208 ar2317GetRfBank(struct ath_hal *ah, int bank) 209 { 210 struct ar2317State *priv = AR2317(ah); 211 212 HALASSERT(priv != AH_NULL); 213 switch (bank) { 214 case 1: return priv->Bank1Data; 215 case 2: return priv->Bank2Data; 216 case 3: return priv->Bank3Data; 217 case 6: return priv->Bank6Data; 218 case 7: return priv->Bank7Data; 219 } 220 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 221 __func__, bank); 222 return AH_NULL; 223 } 224 225 /* 226 * Return indices surrounding the value in sorted integer lists. 227 * 228 * NB: the input list is assumed to be sorted in ascending order 229 */ 230 static void 231 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 232 uint32_t *vlo, uint32_t *vhi) 233 { 234 int16_t target = v; 235 const int16_t *ep = lp+listSize; 236 const int16_t *tp; 237 238 /* 239 * Check first and last elements for out-of-bounds conditions. 240 */ 241 if (target < lp[0]) { 242 *vlo = *vhi = 0; 243 return; 244 } 245 if (target >= ep[-1]) { 246 *vlo = *vhi = listSize - 1; 247 return; 248 } 249 250 /* look for value being near or between 2 values in list */ 251 for (tp = lp; tp < ep; tp++) { 252 /* 253 * If value is close to the current value of the list 254 * then target is not between values, it is one of the values 255 */ 256 if (*tp == target) { 257 *vlo = *vhi = tp - (const int16_t *) lp; 258 return; 259 } 260 /* 261 * Look for value being between current value and next value 262 * if so return these 2 values 263 */ 264 if (target < tp[1]) { 265 *vlo = tp - (const int16_t *) lp; 266 *vhi = *vlo + 1; 267 return; 268 } 269 } 270 } 271 272 /* 273 * Fill the Vpdlist for indices Pmax-Pmin 274 */ 275 static HAL_BOOL 276 ar2317FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 277 const int16_t *pwrList, const int16_t *VpdList, 278 uint16_t numIntercepts, uint16_t retVpdList[][64]) 279 { 280 uint16_t ii, jj, kk; 281 int16_t currPwr = (int16_t)(2*Pmin); 282 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 283 uint32_t idxL, idxR; 284 285 ii = 0; 286 jj = 0; 287 288 if (numIntercepts < 2) 289 return AH_FALSE; 290 291 while (ii <= (uint16_t)(Pmax - Pmin)) { 292 GetLowerUpperIndex(currPwr, pwrList, numIntercepts, 293 &(idxL), &(idxR)); 294 if (idxR < 1) 295 idxR = 1; /* extrapolate below */ 296 if (idxL == (uint32_t)(numIntercepts - 1)) 297 idxL = numIntercepts - 2; /* extrapolate above */ 298 if (pwrList[idxL] == pwrList[idxR]) 299 kk = VpdList[idxL]; 300 else 301 kk = (uint16_t) 302 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 303 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 304 (pwrList[idxR] - pwrList[idxL])); 305 retVpdList[pdGainIdx][ii] = kk; 306 ii++; 307 currPwr += 2; /* half dB steps */ 308 } 309 310 return AH_TRUE; 311 } 312 313 /* 314 * Returns interpolated or the scaled up interpolated value 315 */ 316 static int16_t 317 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 318 int16_t targetLeft, int16_t targetRight) 319 { 320 int16_t rv; 321 322 if (srcRight != srcLeft) { 323 rv = ((target - srcLeft)*targetRight + 324 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 325 } else { 326 rv = targetLeft; 327 } 328 return rv; 329 } 330 331 /* 332 * Uses the data points read from EEPROM to reconstruct the pdadc power table 333 * Called by ar2317SetPowerTable() 334 */ 335 static int 336 ar2317getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 337 const RAW_DATA_STRUCT_2317 *pRawDataset, 338 uint16_t pdGainOverlap_t2, 339 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 340 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 341 { 342 struct ar2317State *priv = AR2317(ah); 343 #define VpdTable_L priv->vpdTable_L 344 #define VpdTable_R priv->vpdTable_R 345 #define VpdTable_I priv->vpdTable_I 346 /* XXX excessive stack usage? */ 347 uint32_t ii, jj, kk; 348 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 349 uint32_t idxL, idxR; 350 uint32_t numPdGainsUsed = 0; 351 /* 352 * If desired to support -ve power levels in future, just 353 * change pwr_I_0 to signed 5-bits. 354 */ 355 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 356 /* to accommodate -ve power levels later on. */ 357 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 358 /* to accommodate -ve power levels later on */ 359 uint16_t numVpd = 0; 360 uint16_t Vpd_step; 361 int16_t tmpVal ; 362 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 363 364 /* Get upper lower index */ 365 GetLowerUpperIndex(channel, pRawDataset->pChannels, 366 pRawDataset->numChannels, &(idxL), &(idxR)); 367 368 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 369 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 370 /* work backwards 'cause highest pdGain for lowest power */ 371 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 372 if (numVpd > 0) { 373 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 374 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 375 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 376 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 377 } 378 Pmin_t2[numPdGainsUsed] = (int16_t) 379 (Pmin_t2[numPdGainsUsed] / 2); 380 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 381 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 382 Pmax_t2[numPdGainsUsed] = 383 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 384 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 385 ar2317FillVpdTable( 386 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 387 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 388 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 389 ); 390 ar2317FillVpdTable( 391 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 392 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 393 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 394 ); 395 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 396 VpdTable_I[numPdGainsUsed][kk] = 397 interpolate_signed( 398 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 399 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 400 } 401 /* fill VpdTable_I for this pdGain */ 402 numPdGainsUsed++; 403 } 404 /* if this pdGain is used */ 405 } 406 407 *pMinCalPower = Pmin_t2[0]; 408 kk = 0; /* index for the final table */ 409 for (ii = 0; ii < numPdGainsUsed; ii++) { 410 if (ii == (numPdGainsUsed - 1)) 411 pPdGainBoundaries[ii] = Pmax_t2[ii] + 412 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 413 else 414 pPdGainBoundaries[ii] = (uint16_t) 415 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 416 if (pPdGainBoundaries[ii] > 63) { 417 HALDEBUG(ah, HAL_DEBUG_ANY, 418 "%s: clamp pPdGainBoundaries[%d] %d\n", 419 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/ 420 pPdGainBoundaries[ii] = 63; 421 } 422 423 /* Find starting index for this pdGain */ 424 if (ii == 0) 425 ss = 0; /* for the first pdGain, start from index 0 */ 426 else 427 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 428 pdGainOverlap_t2; 429 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 430 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 431 /* 432 *-ve ss indicates need to extrapolate data below for this pdGain 433 */ 434 while (ss < 0) { 435 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 436 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 437 ss++; 438 } 439 440 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 441 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 442 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 443 444 while (ss < (int16_t)maxIndex) 445 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 446 447 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 448 VpdTable_I[ii][sizeCurrVpdTable-2]); 449 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 450 /* 451 * for last gain, pdGainBoundary == Pmax_t2, so will 452 * have to extrapolate 453 */ 454 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 455 while(ss < (int16_t)tgtIndex) { 456 tmpVal = (uint16_t) 457 (VpdTable_I[ii][sizeCurrVpdTable-1] + 458 (ss-maxIndex)*Vpd_step); 459 pPDADCValues[kk++] = (tmpVal > 127) ? 460 127 : tmpVal; 461 ss++; 462 } 463 } /* extrapolated above */ 464 } /* for all pdGainUsed */ 465 466 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 467 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 468 ii++; 469 } 470 while (kk < 128) { 471 pPDADCValues[kk] = pPDADCValues[kk-1]; 472 kk++; 473 } 474 475 return numPdGainsUsed; 476 #undef VpdTable_L 477 #undef VpdTable_R 478 #undef VpdTable_I 479 } 480 481 static HAL_BOOL 482 ar2317SetPowerTable(struct ath_hal *ah, 483 int16_t *minPower, int16_t *maxPower, 484 const struct ieee80211_channel *chan, 485 uint16_t *rfXpdGain) 486 { 487 struct ath_hal_5212 *ahp = AH5212(ah); 488 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 489 const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL; 490 uint16_t pdGainOverlap_t2; 491 int16_t minCalPower2317_t2; 492 uint16_t *pdadcValues = ahp->ah_pcdacTable; 493 uint16_t gainBoundaries[4]; 494 uint32_t reg32, regoffset; 495 int i, numPdGainsUsed; 496 #ifndef AH_USE_INIPDGAIN 497 uint32_t tpcrg1; 498 #endif 499 500 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", 501 __func__, chan->ic_freq, chan->ic_flags); 502 503 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 504 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 505 else if (IEEE80211_IS_CHAN_B(chan)) 506 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 507 else { 508 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); 509 return AH_FALSE; 510 } 511 512 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 513 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 514 515 numPdGainsUsed = ar2317getGainBoundariesAndPdadcsForPowers(ah, 516 chan->channel, pRawDataset, pdGainOverlap_t2, 517 &minCalPower2317_t2,gainBoundaries, rfXpdGain, pdadcValues); 518 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); 519 520 #ifdef AH_USE_INIPDGAIN 521 /* 522 * Use pd_gains curve from eeprom; Atheros always uses 523 * the default curve from the ini file but some vendors 524 * (e.g. Zcomax) want to override this curve and not 525 * honoring their settings results in tx power 5dBm low. 526 */ 527 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 528 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 529 #else 530 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1); 531 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN) 532 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN); 533 switch (numPdGainsUsed) { 534 case 3: 535 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3; 536 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3); 537 /* fall thru... */ 538 case 2: 539 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2; 540 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2); 541 /* fall thru... */ 542 case 1: 543 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1; 544 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1); 545 break; 546 } 547 #ifdef AH_DEBUG 548 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1)) 549 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default " 550 "pd_gains (default 0x%x, calculated 0x%x)\n", 551 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1); 552 #endif 553 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1); 554 #endif 555 556 /* 557 * Note the pdadc table may not start at 0 dBm power, could be 558 * negative or greater than 0. Need to offset the power 559 * values by the amount of minPower for griffin 560 */ 561 if (minCalPower2317_t2 != 0) 562 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2317_t2); 563 else 564 ahp->ah_txPowerIndexOffset = 0; 565 566 /* Finally, write the power values into the baseband power table */ 567 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 568 for (i = 0; i < 32; i++) { 569 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 570 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 571 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 572 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 573 OS_REG_WRITE(ah, regoffset, reg32); 574 regoffset += 4; 575 } 576 577 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 578 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 579 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 580 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 581 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 582 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 583 584 return AH_TRUE; 585 } 586 587 static int16_t 588 ar2317GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data) 589 { 590 uint32_t ii,jj; 591 uint16_t Pmin=0,numVpd; 592 593 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 594 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 595 /* work backwards 'cause highest pdGain for lowest power */ 596 numVpd = data->pDataPerPDGain[jj].numVpd; 597 if (numVpd > 0) { 598 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 599 return(Pmin); 600 } 601 } 602 return(Pmin); 603 } 604 605 static int16_t 606 ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data) 607 { 608 uint32_t ii; 609 uint16_t Pmax=0,numVpd; 610 uint16_t vpdmax; 611 612 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 613 /* work forwards cuase lowest pdGain for highest power */ 614 numVpd = data->pDataPerPDGain[ii].numVpd; 615 if (numVpd > 0) { 616 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 617 vpdmax = data->pDataPerPDGain[ii].Vpd[numVpd-1]; 618 return(Pmax); 619 } 620 } 621 return(Pmax); 622 } 623 624 static HAL_BOOL 625 ar2317GetChannelMaxMinPower(struct ath_hal *ah, 626 const struct ieee80211_channel *chan, 627 int16_t *maxPow, int16_t *minPow) 628 { 629 uint16_t freq = chan->ic_freq; /* NB: never mapped */ 630 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 631 const RAW_DATA_STRUCT_2317 *pRawDataset = AH_NULL; 632 const RAW_DATA_PER_CHANNEL_2317 *data=AH_NULL; 633 uint16_t numChannels; 634 int totalD,totalF, totalMin,last, i; 635 636 *maxPow = 0; 637 638 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) 639 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 640 else if (IEEE80211_IS_CHAN_B(chan)) 641 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 642 else 643 return(AH_FALSE); 644 645 numChannels = pRawDataset->numChannels; 646 data = pRawDataset->pDataPerChannel; 647 648 /* Make sure the channel is in the range of the TP values 649 * (freq piers) 650 */ 651 if (numChannels < 1) 652 return(AH_FALSE); 653 654 if ((freq < data[0].channelValue) || 655 (freq > data[numChannels-1].channelValue)) { 656 if (freq < data[0].channelValue) { 657 *maxPow = ar2317GetMaxPower(ah, &data[0]); 658 *minPow = ar2317GetMinPower(ah, &data[0]); 659 return(AH_TRUE); 660 } else { 661 *maxPow = ar2317GetMaxPower(ah, &data[numChannels - 1]); 662 *minPow = ar2317GetMinPower(ah, &data[numChannels - 1]); 663 return(AH_TRUE); 664 } 665 } 666 667 /* Linearly interpolate the power value now */ 668 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue); 669 last = i++); 670 totalD = data[i].channelValue - data[last].channelValue; 671 if (totalD > 0) { 672 totalF = ar2317GetMaxPower(ah, &data[i]) - ar2317GetMaxPower(ah, &data[last]); 673 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + 674 ar2317GetMaxPower(ah, &data[last])*totalD)/totalD); 675 totalMin = ar2317GetMinPower(ah, &data[i]) - ar2317GetMinPower(ah, &data[last]); 676 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + 677 ar2317GetMinPower(ah, &data[last])*totalD)/totalD); 678 return(AH_TRUE); 679 } else { 680 if (freq == data[i].channelValue) { 681 *maxPow = ar2317GetMaxPower(ah, &data[i]); 682 *minPow = ar2317GetMinPower(ah, &data[i]); 683 return(AH_TRUE); 684 } else 685 return(AH_FALSE); 686 } 687 } 688 689 /* 690 * Free memory for analog bank scratch buffers 691 */ 692 static void 693 ar2317RfDetach(struct ath_hal *ah) 694 { 695 struct ath_hal_5212 *ahp = AH5212(ah); 696 697 HALASSERT(ahp->ah_rfHal != AH_NULL); 698 ath_hal_free(ahp->ah_rfHal); 699 ahp->ah_rfHal = AH_NULL; 700 } 701 702 /* 703 * Allocate memory for analog bank scratch buffers 704 * Scratch Buffer will be reinitialized every reset so no need to zero now 705 */ 706 static HAL_BOOL 707 ar2317RfAttach(struct ath_hal *ah, HAL_STATUS *status) 708 { 709 struct ath_hal_5212 *ahp = AH5212(ah); 710 struct ar2317State *priv; 711 712 HALASSERT(ah->ah_magic == AR5212_MAGIC); 713 714 HALASSERT(ahp->ah_rfHal == AH_NULL); 715 priv = ath_hal_malloc(sizeof(struct ar2317State)); 716 if (priv == AH_NULL) { 717 HALDEBUG(ah, HAL_DEBUG_ANY, 718 "%s: cannot allocate private state\n", __func__); 719 *status = HAL_ENOMEM; /* XXX */ 720 return AH_FALSE; 721 } 722 priv->base.rfDetach = ar2317RfDetach; 723 priv->base.writeRegs = ar2317WriteRegs; 724 priv->base.getRfBank = ar2317GetRfBank; 725 priv->base.setChannel = ar2317SetChannel; 726 priv->base.setRfRegs = ar2317SetRfRegs; 727 priv->base.setPowerTable = ar2317SetPowerTable; 728 priv->base.getChannelMaxMinPower = ar2317GetChannelMaxMinPower; 729 priv->base.getNfAdjust = ar5212GetNfAdjust; 730 731 ahp->ah_pcdacTable = priv->pcdacTable; 732 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 733 ahp->ah_rfHal = &priv->base; 734 735 return AH_TRUE; 736 } 737 738 static HAL_BOOL 739 ar2317Probe(struct ath_hal *ah) 740 { 741 return IS_2317(ah); 742 } 743 AH_RF(RF2317, ar2317Probe, ar2317RfAttach);
Cache object: e9def334c80fbfa3adfca2e848a65da1
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]