ar5312_gpio.c

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 /*-
    2  * SPDX-License-Identifier: ISC
    3  *
    4  * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
    5  * Copyright (c) 2002-2008 Atheros Communications, Inc.
    6  *
    7  * Permission to use, copy, modify, and/or distribute this software for any
    8  * purpose with or without fee is hereby granted, provided that the above
    9  * copyright notice and this permission notice appear in all copies.
   10  *
   11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   18  *
   19  * $FreeBSD$
   20  */
   21 #include "opt_ah.h"
   22 
   23 #ifdef AH_SUPPORT_AR5312
   24 
   25 #include "ah.h"
   26 #include "ah_internal.h"
   27 #include "ah_devid.h"
   28 
   29 #include "ar5312/ar5312.h"
   30 #include "ar5312/ar5312reg.h"
   31 #include "ar5312/ar5312phy.h"
   32 
   33 #define AR_NUM_GPIO     6               /* 6 GPIO pins */
   34 #define AR5312_GPIOD_MASK       0x0000002F      /* GPIO data reg r/w mask */
   35 
   36 /*
   37  * Configure GPIO Output lines
   38  */
   39 HAL_BOOL
   40 ar5312GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)
   41 {
   42         uint32_t gpioOffset = (AR5312_GPIO_BASE - ((uint32_t) ah->ah_sh));
   43 
   44         HALASSERT(gpio < AR_NUM_GPIO);
   45 
   46         OS_REG_WRITE(ah, gpioOffset+AR5312_GPIOCR,
   47                   (OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))
   48                 | AR_GPIOCR_CR_A(gpio));
   49 
   50         return AH_TRUE;
   51 }
   52 
   53 /*
   54  * Configure GPIO Input lines
   55  */
   56 HAL_BOOL
   57 ar5312GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
   58 {
   59         uint32_t gpioOffset = (AR5312_GPIO_BASE - ((uint32_t) ah->ah_sh));
   60 
   61         HALASSERT(gpio < AR_NUM_GPIO);
   62 
   63         OS_REG_WRITE(ah, gpioOffset+AR5312_GPIOCR,
   64                   (OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))
   65                 | AR_GPIOCR_CR_N(gpio));
   66 
   67         return AH_TRUE;
   68 }
   69 
   70 /*
   71  * Once configured for I/O - set output lines
   72  */
   73 HAL_BOOL
   74 ar5312GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
   75 {
   76         uint32_t reg;
   77         uint32_t gpioOffset = (AR5312_GPIO_BASE - ((uint32_t) ah->ah_sh));
   78 
   79         HALASSERT(gpio < AR_NUM_GPIO);
   80 
   81         reg =  OS_REG_READ(ah, gpioOffset+AR5312_GPIODO);
   82         reg &= ~(1 << gpio);
   83         reg |= (val&1) << gpio;
   84 
   85         OS_REG_WRITE(ah, gpioOffset+AR5312_GPIODO, reg);
   86         return AH_TRUE;
   87 }
   88 
   89 /*
   90  * Once configured for I/O - get input lines
   91  */
   92 uint32_t
   93 ar5312GpioGet(struct ath_hal *ah, uint32_t gpio)
   94 {
   95         uint32_t gpioOffset = (AR5312_GPIO_BASE - ((uint32_t) ah->ah_sh));
   96 
   97         if (gpio < AR_NUM_GPIO) {
   98                 uint32_t val = OS_REG_READ(ah, gpioOffset+AR5312_GPIODI);
   99                 val = ((val & AR5312_GPIOD_MASK) >> gpio) & 0x1;
  100                 return val;
  101         } else {
  102                 return 0xffffffff;
  103         }
  104 }
  105 
  106 /*
  107  * Set the GPIO Interrupt
  108  */
  109 void
  110 ar5312GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
  111 {
  112         uint32_t val;
  113         uint32_t gpioOffset = (AR5312_GPIO_BASE - ((uint32_t) ah->ah_sh));
  114 
  115         /* XXX bounds check gpio */
  116         val = OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR);
  117         val &= ~(AR_GPIOCR_CR_A(gpio) |
  118                  AR_GPIOCR_INT_MASK | AR_GPIOCR_INT_ENA | AR_GPIOCR_INT_SEL);
  119         val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;
  120         if (ilevel)
  121                 val |= AR_GPIOCR_INT_SELH;      /* interrupt on pin high */
  122         else
  123                 val |= AR_GPIOCR_INT_SELL;      /* interrupt on pin low */
  124 
  125         /* Don't need to change anything for low level interrupt. */
  126         OS_REG_WRITE(ah, gpioOffset+AR5312_GPIOCR, val);
  127 
  128         /* Change the interrupt mask. */
  129         (void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);
  130 }
  131 
  132 #endif /* AH_SUPPORT_AR5312 */

Cache object: da8aea520091b9007eae7e32e76f55c0

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c