ar9287.c

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    1 /*-
    2  * SPDX-License-Identifier: ISC
    3  *
    4  * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
    5  * Copyright (c) 2008 Atheros Communications, Inc.
    6  *
    7  * Permission to use, copy, modify, and/or distribute this software for any
    8  * purpose with or without fee is hereby granted, provided that the above
    9  * copyright notice and this permission notice appear in all copies.
   10  *
   11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   18  *
   19  * $FreeBSD$
   20  */
   21 #include "opt_ah.h"
   22 
   23 /*
   24  * NB: Merlin and later have a simpler RF backend.
   25  */
   26 #include "ah.h"
   27 #include "ah_internal.h"
   28 
   29 #include "ah_eeprom_v14.h"
   30 
   31 #include "ar9002/ar9287.h"
   32 #include "ar5416/ar5416reg.h"
   33 #include "ar5416/ar5416phy.h"
   34 
   35 #define N(a)    (sizeof(a)/sizeof(a[0]))
   36 
   37 struct ar9287State {
   38         RF_HAL_FUNCS    base;           /* public state, must be first */
   39         uint16_t        pcdacTable[1];  /* XXX */
   40 };
   41 #define AR9287(ah)      ((struct ar9287State *) AH5212(ah)->ah_rfHal)
   42 
   43 static HAL_BOOL ar9287GetChannelMaxMinPower(struct ath_hal *,
   44         const struct ieee80211_channel *, int16_t *maxPow,int16_t *minPow);
   45 int16_t ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c);
   46 
   47 static void
   48 ar9287WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
   49         int writes)
   50 {
   51         (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
   52                 freqIndex, writes);
   53 }
   54 
   55 /*
   56  * Take the MHz channel value and set the Channel value
   57  *
   58  * ASSUMES: Writes enabled to analog bus
   59  *
   60  * Actual Expression,
   61  *
   62  * For 2GHz channel, 
   63  * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17) 
   64  * (freq_ref = 40MHz)
   65  *
   66  * For 5GHz channel,
   67  * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
   68  * (freq_ref = 40MHz/(24>>amodeRefSel))
   69  *
   70  * For 5GHz channels which are 5MHz spaced,
   71  * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
   72  * (freq_ref = 40MHz)
   73  */
   74 static HAL_BOOL
   75 ar9287SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
   76 {
   77         uint16_t bMode, fracMode, aModeRefSel = 0;
   78         uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
   79         CHAN_CENTERS centers;
   80         uint32_t refDivA = 24;
   81 
   82         OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
   83 
   84         ar5416GetChannelCenters(ah, chan, &centers);
   85         freq = centers.synth_center;
   86 
   87         reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
   88         reg32 &= 0xc0000000;
   89 
   90         if (freq < 4800) {     /* 2 GHz, fractional mode */
   91                 uint32_t txctl;
   92                 int regWrites = 0;
   93 
   94                 bMode = 1;
   95                 fracMode = 1;
   96                 aModeRefSel = 0;       
   97                 channelSel = (freq * 0x10000)/15;
   98 
   99                 if (AR_SREV_KIWI_11_OR_LATER(ah)) {
  100                         if (freq == 2484) {
  101                                 ath_hal_ini_write(ah,
  102                                     &AH9287(ah)->ah_ini_cckFirJapan2484, 1,
  103                                     regWrites);
  104                         } else {
  105                                 ath_hal_ini_write(ah,
  106                                     &AH9287(ah)->ah_ini_cckFirNormal, 1,
  107                                     regWrites);
  108                         }
  109                 }
  110 
  111                 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
  112                 if (freq == 2484) {
  113                         /* Enable channel spreading for channel 14 */
  114                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
  115                             txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
  116                 } else {
  117                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
  118                             txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
  119                 }     
  120         } else {
  121                 bMode = 0;
  122                 fracMode = 0;
  123 
  124                 if ((freq % 20) == 0) {
  125                         aModeRefSel = 3;
  126                 } else if ((freq % 10) == 0) {
  127                         aModeRefSel = 2;
  128                 } else {
  129                         aModeRefSel = 0;
  130                         /*
  131                          * Enable 2G (fractional) mode for channels which
  132                          * are 5MHz spaced
  133                          */
  134                         fracMode = 1;
  135                         refDivA = 1;
  136                         channelSel = (freq * 0x8000)/15;
  137 
  138                         /* RefDivA setting */
  139                         OS_A_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
  140                             AR_AN_SYNTH9_REFDIVA, refDivA);
  141                 }
  142                 if (!fracMode) {
  143                         ndiv = (freq * (refDivA >> aModeRefSel))/60;
  144                         channelSel =  ndiv & 0x1ff;         
  145                         channelFrac = (ndiv & 0xfffffe00) * 2;
  146                         channelSel = (channelSel << 17) | channelFrac;
  147                 }
  148         }
  149 
  150         reg32 = reg32 | (bMode << 29) | (fracMode << 28) |
  151             (aModeRefSel << 26) | (channelSel);
  152 
  153         OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
  154 
  155         AH_PRIVATE(ah)->ah_curchan = chan;
  156 
  157         return AH_TRUE;
  158 }
  159 
  160 /*
  161  * Return a reference to the requested RF Bank.
  162  */
  163 static uint32_t *
  164 ar9287GetRfBank(struct ath_hal *ah, int bank)
  165 {
  166         HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
  167             __func__, bank);
  168         return AH_NULL;
  169 }
  170 
  171 /*
  172  * Reads EEPROM header info from device structure and programs
  173  * all rf registers
  174  */
  175 static HAL_BOOL
  176 ar9287SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
  177                 uint16_t modesIndex, uint16_t *rfXpdGain)
  178 {
  179         return AH_TRUE;         /* nothing to do */
  180 }
  181 
  182 /*
  183  * Read the transmit power levels from the structures taken from EEPROM
  184  * Interpolate read transmit power values for this channel
  185  * Organize the transmit power values into a table for writing into the hardware
  186  */
  187 
  188 static HAL_BOOL
  189 ar9287SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax, 
  190         const struct ieee80211_channel *chan, uint16_t *rfXpdGain)
  191 {
  192         return AH_TRUE;
  193 }
  194 
  195 #if 0
  196 static int16_t
  197 ar9287GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
  198 {
  199     int i, minIndex;
  200     int16_t minGain,minPwr,minPcdac,retVal;
  201 
  202     /* Assume NUM_POINTS_XPD0 > 0 */
  203     minGain = data->pDataPerXPD[0].xpd_gain;
  204     for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
  205         if (data->pDataPerXPD[i].xpd_gain < minGain) {
  206             minIndex = i;
  207             minGain = data->pDataPerXPD[i].xpd_gain;
  208         }
  209     }
  210     minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
  211     minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
  212     for (i=1; i<NUM_POINTS_XPD0; i++) {
  213         if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
  214             minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
  215             minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
  216         }
  217     }
  218     retVal = minPwr - (minPcdac*2);
  219     return(retVal);
  220 }
  221 #endif
  222 
  223 static HAL_BOOL
  224 ar9287GetChannelMaxMinPower(struct ath_hal *ah,
  225         const struct ieee80211_channel *chan,
  226         int16_t *maxPow, int16_t *minPow)
  227 {
  228 #if 0
  229     struct ath_hal_5212 *ahp = AH5212(ah);
  230     int numChannels=0,i,last;
  231     int totalD, totalF,totalMin;
  232     EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
  233     EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
  234 
  235     *maxPow = 0;
  236     if (IS_CHAN_A(chan)) {
  237         powerArray = ahp->ah_modePowerArray5112;
  238         data = powerArray[headerInfo11A].pDataPerChannel;
  239         numChannels = powerArray[headerInfo11A].numChannels;
  240     } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
  241         /* XXX - is this correct? Should we also use the same power for turbo G? */
  242         powerArray = ahp->ah_modePowerArray5112;
  243         data = powerArray[headerInfo11G].pDataPerChannel;
  244         numChannels = powerArray[headerInfo11G].numChannels;
  245     } else if (IS_CHAN_B(chan)) {
  246         powerArray = ahp->ah_modePowerArray5112;
  247         data = powerArray[headerInfo11B].pDataPerChannel;
  248         numChannels = powerArray[headerInfo11B].numChannels;
  249     } else {
  250         return (AH_TRUE);
  251     }
  252     /* Make sure the channel is in the range of the TP values
  253      *  (freq piers)
  254      */
  255     if ((numChannels < 1) ||
  256         (chan->channel < data[0].channelValue) ||
  257         (chan->channel > data[numChannels-1].channelValue))
  258         return(AH_FALSE);
  259 
  260     /* Linearly interpolate the power value now */
  261     for (last=0,i=0;
  262          (i<numChannels) && (chan->channel > data[i].channelValue);
  263          last=i++);
  264     totalD = data[i].channelValue - data[last].channelValue;
  265     if (totalD > 0) {
  266         totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
  267         *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
  268 
  269         totalMin = ar9287GetMinPower(ah,&data[i]) - ar9287GetMinPower(ah, &data[last]);
  270         *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9287GetMinPower(ah, &data[last])*totalD)/totalD);
  271         return (AH_TRUE);
  272     } else {
  273         if (chan->channel == data[i].channelValue) {
  274             *maxPow = data[i].maxPower_t4;
  275             *minPow = ar9287GetMinPower(ah, &data[i]);
  276             return(AH_TRUE);
  277         } else
  278             return(AH_FALSE);
  279     }
  280 #else
  281         *maxPow = *minPow = 0;
  282         return AH_FALSE;
  283 #endif
  284 }
  285 
  286 /*
  287  * The ordering of nfarray is thus:
  288  *
  289  * nfarray[0]: Chain 0 ctl
  290  * nfarray[1]: Chain 1 ctl
  291  * nfarray[2]: Chain 2 ctl
  292  * nfarray[3]: Chain 0 ext
  293  * nfarray[4]: Chain 1 ext
  294  * nfarray[5]: Chain 2 ext
  295  */
  296 static void
  297 ar9287GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
  298 {
  299         int16_t nf;
  300 
  301         nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
  302         if (nf & 0x100)
  303                 nf = 0 - ((nf ^ 0x1ff) + 1);
  304         HALDEBUG(ah, HAL_DEBUG_NFCAL,
  305             "NF calibrated [ctl] [chain 0] is %d\n", nf);
  306         nfarray[0] = nf;
  307 
  308         nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR);
  309         if (nf & 0x100)
  310                 nf = 0 - ((nf ^ 0x1ff) + 1);
  311         HALDEBUG(ah, HAL_DEBUG_NFCAL,
  312             "NF calibrated [ctl] [chain 1] is %d\n", nf);
  313         nfarray[1] = nf;
  314 
  315         nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
  316         if (nf & 0x100)
  317                 nf = 0 - ((nf ^ 0x1ff) + 1);
  318         HALDEBUG(ah, HAL_DEBUG_NFCAL,
  319             "NF calibrated [ext] [chain 0] is %d\n", nf);
  320         nfarray[3] = nf;
  321 
  322         nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR);
  323         if (nf & 0x100)
  324                 nf = 0 - ((nf ^ 0x1ff) + 1);
  325         HALDEBUG(ah, HAL_DEBUG_NFCAL,
  326             "NF calibrated [ext] [chain 1] is %d\n", nf);
  327         nfarray[4] = nf;
  328 
  329         /* Chain 2 - invalid */
  330         nfarray[2] = 0;
  331         nfarray[5] = 0;
  332 
  333 }
  334 
  335 /*
  336  * Adjust NF based on statistical values for 5GHz frequencies.
  337  * Stubbed:Not used by Fowl
  338  */
  339 int16_t
  340 ar9287GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
  341 {
  342         return 0;
  343 }
  344 
  345 /*
  346  * Free memory for analog bank scratch buffers
  347  */
  348 static void
  349 ar9287RfDetach(struct ath_hal *ah)
  350 {
  351         struct ath_hal_5212 *ahp = AH5212(ah);
  352 
  353         HALASSERT(ahp->ah_rfHal != AH_NULL);
  354         ath_hal_free(ahp->ah_rfHal);
  355         ahp->ah_rfHal = AH_NULL;
  356 }
  357 
  358 HAL_BOOL
  359 ar9287RfAttach(struct ath_hal *ah, HAL_STATUS *status)
  360 {
  361         struct ath_hal_5212 *ahp = AH5212(ah);
  362         struct ar9287State *priv;
  363 
  364         HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__);
  365 
  366         HALASSERT(ahp->ah_rfHal == AH_NULL);
  367         priv = ath_hal_malloc(sizeof(struct ar9287State));
  368         if (priv == AH_NULL) {
  369                 HALDEBUG(ah, HAL_DEBUG_ANY,
  370                     "%s: cannot allocate private state\n", __func__);
  371                 *status = HAL_ENOMEM;           /* XXX */
  372                 return AH_FALSE;
  373         }
  374         priv->base.rfDetach             = ar9287RfDetach;
  375         priv->base.writeRegs            = ar9287WriteRegs;
  376         priv->base.getRfBank            = ar9287GetRfBank;
  377         priv->base.setChannel           = ar9287SetChannel;
  378         priv->base.setRfRegs            = ar9287SetRfRegs;
  379         priv->base.setPowerTable        = ar9287SetPowerTable;
  380         priv->base.getChannelMaxMinPower = ar9287GetChannelMaxMinPower;
  381         priv->base.getNfAdjust          = ar9287GetNfAdjust;
  382 
  383         ahp->ah_pcdacTable = priv->pcdacTable;
  384         ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
  385         ahp->ah_rfHal = &priv->base;
  386         /*
  387          * Set noise floor adjust method; we arrange a
  388          * direct call instead of thunking.
  389          */
  390         AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
  391         AH_PRIVATE(ah)->ah_getNoiseFloor = ar9287GetNoiseFloor;
  392 
  393         return AH_TRUE;
  394 }
  395 
  396 static HAL_BOOL
  397 ar9287RfProbe(struct ath_hal *ah)
  398 {
  399         return (AR_SREV_KIWI(ah));
  400 }
  401 
  402 AH_RF(RF9287, ar9287RfProbe, ar9287RfAttach);
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FreeBSD/Linux Kernel Cross Reference sys/dev/ath/ath_hal/ar9002/ar9287.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/ath/ath_hal/ar9002/ar9287.c
