1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15 * redistribution must be conditioned upon including a substantially
16 * similar Disclaimer requirement for further binary redistribution.
17 *
18 * NO WARRANTY
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
22 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
23 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
24 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
27 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
29 * THE POSSIBILITY OF SUCH DAMAGES.
30 *
31 * $FreeBSD$
32 */
33 #ifndef __IF_ATH_DEBUG_H__
34 #define __IF_ATH_DEBUG_H__
35
36 #ifdef ATH_DEBUG
37
38 enum {
39 ATH_DEBUG_XMIT = 0x000000001ULL, /* basic xmit operation */
40 ATH_DEBUG_XMIT_DESC = 0x000000002ULL, /* xmit descriptors */
41 ATH_DEBUG_RECV = 0x000000004ULL, /* basic recv operation */
42 ATH_DEBUG_RECV_DESC = 0x000000008ULL, /* recv descriptors */
43 ATH_DEBUG_RATE = 0x000000010ULL, /* rate control */
44 ATH_DEBUG_RESET = 0x000000020ULL, /* reset processing */
45 ATH_DEBUG_MODE = 0x000000040ULL, /* mode init/setup */
46 ATH_DEBUG_BEACON = 0x000000080ULL, /* beacon handling */
47 ATH_DEBUG_WATCHDOG = 0x000000100ULL, /* watchdog timeout */
48 ATH_DEBUG_INTR = 0x000001000ULL, /* ISR */
49 ATH_DEBUG_TX_PROC = 0x000002000ULL, /* tx ISR proc */
50 ATH_DEBUG_RX_PROC = 0x000004000ULL, /* rx ISR proc */
51 ATH_DEBUG_BEACON_PROC = 0x000008000ULL, /* beacon ISR proc */
52 ATH_DEBUG_CALIBRATE = 0x000010000ULL, /* periodic calibration */
53 ATH_DEBUG_KEYCACHE = 0x000020000ULL, /* key cache management */
54 ATH_DEBUG_STATE = 0x000040000ULL, /* 802.11 state transitions */
55 ATH_DEBUG_NODE = 0x000080000ULL, /* node management */
56 ATH_DEBUG_LED = 0x000100000ULL, /* led management */
57 ATH_DEBUG_FF = 0x000200000ULL, /* fast frames */
58 ATH_DEBUG_DFS = 0x000400000ULL, /* DFS processing */
59 ATH_DEBUG_TDMA = 0x000800000ULL, /* TDMA processing */
60 ATH_DEBUG_TDMA_TIMER = 0x001000000ULL, /* TDMA timer processing */
61 ATH_DEBUG_REGDOMAIN = 0x002000000ULL, /* regulatory processing */
62 ATH_DEBUG_SW_TX = 0x004000000ULL, /* per-packet software TX */
63 ATH_DEBUG_SW_TX_BAW = 0x008000000ULL, /* BAW handling */
64 ATH_DEBUG_SW_TX_CTRL = 0x010000000ULL, /* queue control */
65 ATH_DEBUG_SW_TX_AGGR = 0x020000000ULL, /* aggregate TX */
66 ATH_DEBUG_SW_TX_RETRIES = 0x040000000ULL, /* software TX retries */
67 ATH_DEBUG_FATAL = 0x080000000ULL, /* fatal errors */
68 ATH_DEBUG_SW_TX_BAR = 0x100000000ULL, /* BAR TX */
69 ATH_DEBUG_EDMA_RX = 0x200000000ULL, /* RX EDMA state */
70 ATH_DEBUG_SW_TX_FILT = 0x400000000ULL, /* SW TX FF */
71 ATH_DEBUG_NODE_PWRSAVE = 0x800000000ULL, /* node powersave */
72 ATH_DEBUG_DIVERSITY = 0x1000000000ULL, /* Diversity logic */
73 ATH_DEBUG_PWRSAVE = 0x2000000000ULL,
74 ATH_DEBUG_BTCOEX = 0x4000000000ULL, /* BT Coex */
75 ATH_DEBUG_QUIETIE = 0x8000000000ULL, /* Quiet time handling */
76
77 ATH_DEBUG_ANY = 0xffffffffffffffffULL
78 };
79
80 enum {
81 ATH_KTR_RXPROC = 0x00000001,
82 ATH_KTR_TXPROC = 0x00000002,
83 ATH_KTR_TXCOMP = 0x00000004,
84 ATH_KTR_SWQ = 0x00000008,
85 ATH_KTR_INTERRUPTS = 0x00000010,
86 ATH_KTR_ERROR = 0x00000020,
87 ATH_KTR_NODE = 0x00000040,
88 ATH_KTR_TX = 0x00000080,
89 };
90
91 #define ATH_KTR(_sc, _km, _kf, ...) do { \
92 if (sc->sc_ktrdebug & (_km)) \
93 CTR##_kf(KTR_DEV, __VA_ARGS__); \
94 } while (0)
95
96 extern uint64_t ath_debug;
97
98 #define IFF_DUMPPKTS(sc, m) (sc->sc_debug & (m))
99 #define DPRINTF(sc, m, ...) do { \
100 if (sc->sc_debug & (m)) \
101 device_printf(sc->sc_dev, __VA_ARGS__); \
102 } while (0)
103 #define KEYPRINTF(sc, ix, hk, mac) do { \
104 if (sc->sc_debug & ATH_DEBUG_KEYCACHE) \
105 ath_keyprint(sc, __func__, ix, hk, mac); \
106 } while (0)
107
108 extern void ath_printrxbuf(struct ath_softc *, const struct ath_buf *bf,
109 u_int ix, int);
110 extern void ath_printtxbuf(struct ath_softc *, const struct ath_buf *bf,
111 u_int qnum, u_int ix, int done);
112 extern void ath_printtxstatbuf(struct ath_softc *sc, const struct ath_buf *bf,
113 const uint32_t *ds, u_int qnum, u_int ix, int done);
114 #else /* ATH_DEBUG */
115 #define ATH_KTR(_sc, _km, _kf, ...) do { } while (0)
116
117 #define IFF_DUMPPKTS(sc, m) (0)
118 #define DPRINTF(sc, m, fmt, ...) do { \
119 (void) sc; \
120 } while (0)
121 #define KEYPRINTF(sc, k, ix, mac) do { \
122 (void) sc; \
123 } while (0)
124 #endif /* ATH_DEBUG */
125
126 #endif
Cache object: 03dbd5b2715b19ee8815e5b423a5474d
|