1 /*-
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 * redistribution must be conditioned upon including a substantially
14 * similar Disclaimer requirement for further binary redistribution.
15 *
16 * NO WARRANTY
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD: releng/11.2/sys/dev/ath/if_ath_pci.c 331722 2018-03-29 02:50:57Z eadler $");
32
33 /*
34 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
35 */
36 #include "opt_ath.h"
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/module.h>
42 #include <sys/kernel.h>
43 #include <sys/lock.h>
44 #include <sys/mutex.h>
45 #include <sys/errno.h>
46
47 #include <machine/bus.h>
48 #include <machine/resource.h>
49 #include <sys/bus.h>
50 #include <sys/rman.h>
51
52 #include <sys/socket.h>
53
54 #include <net/if.h>
55 #include <net/if_media.h>
56 #include <net/if_arp.h>
57 #include <net/ethernet.h>
58
59 #include <net80211/ieee80211_var.h>
60
61 #include <dev/ath/if_athvar.h>
62
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65
66 /* For EEPROM firmware */
67 #ifdef ATH_EEPROM_FIRMWARE
68 #include <sys/linker.h>
69 #include <sys/firmware.h>
70 #endif /* ATH_EEPROM_FIRMWARE */
71
72 /*
73 * PCI glue.
74 */
75
76 struct ath_pci_softc {
77 struct ath_softc sc_sc;
78 struct resource *sc_sr; /* memory resource */
79 struct resource *sc_irq; /* irq resource */
80 void *sc_ih; /* interrupt handler */
81 };
82
83 /*
84 * XXX eventually this should be some system level definition
85 * so modules will have probe/attach information like USB.
86 * But for now..
87 */
88 struct pci_device_id {
89 int vendor_id;
90 int device_id;
91
92 int sub_vendor_id;
93 int sub_device_id;
94
95 int driver_data;
96
97 int match_populated:1;
98 int match_vendor_id:1;
99 int match_device_id:1;
100 int match_sub_vendor_id:1;
101 int match_sub_device_id:1;
102 };
103
104 #define PCI_VDEVICE(v, s) \
105 .vendor_id = (v), \
106 .device_id = (s), \
107 .match_populated = 1, \
108 .match_vendor_id = 1, \
109 .match_device_id = 1
110
111 #define PCI_DEVICE_SUB(v, d, dv, ds) \
112 .match_populated = 1, \
113 .vendor_id = (v), .match_vendor_id = 1, \
114 .device_id = (d), .match_device_id = 1, \
115 .sub_vendor_id = (dv), .match_sub_vendor_id = 1, \
116 .sub_device_id = (ds), .match_sub_device_id = 1
117
118 #define PCI_VENDOR_ID_ATHEROS 0x168c
119 #define PCI_VENDOR_ID_SAMSUNG 0x144d
120 #define PCI_VENDOR_ID_AZWAVE 0x1a3b
121 #define PCI_VENDOR_ID_FOXCONN 0x105b
122 #define PCI_VENDOR_ID_ATTANSIC 0x1969
123 #define PCI_VENDOR_ID_ASUSTEK 0x1043
124 #define PCI_VENDOR_ID_DELL 0x1028
125 #define PCI_VENDOR_ID_QMI 0x1a32
126 #define PCI_VENDOR_ID_LENOVO 0x17aa
127 #define PCI_VENDOR_ID_HP 0x103c
128
129 #include "if_ath_pci_devlist.h"
130
131 /*
132 * Attempt to find a match for the given device in
133 * the given device table.
134 *
135 * Returns the device structure or NULL if no matching
136 * PCI device is found.
137 */
138 static const struct pci_device_id *
139 ath_pci_probe_device(device_t dev, const struct pci_device_id *dev_table, int nentries)
140 {
141 int i;
142 int vendor_id, device_id;
143 int sub_vendor_id, sub_device_id;
144
145 vendor_id = pci_get_vendor(dev);
146 device_id = pci_get_device(dev);
147 sub_vendor_id = pci_get_subvendor(dev);
148 sub_device_id = pci_get_subdevice(dev);
149
150 for (i = 0; i < nentries; i++) {
151 /* Don't match on non-populated (eg empty) entries */
152 if (! dev_table[i].match_populated)
153 continue;
154
155 if (dev_table[i].match_vendor_id &&
156 (dev_table[i].vendor_id != vendor_id))
157 continue;
158 if (dev_table[i].match_device_id &&
159 (dev_table[i].device_id != device_id))
160 continue;
161 if (dev_table[i].match_sub_vendor_id &&
162 (dev_table[i].sub_vendor_id != sub_vendor_id))
163 continue;
164 if (dev_table[i].match_sub_device_id &&
165 (dev_table[i].sub_device_id != sub_device_id))
166 continue;
167
168 /* Match */
169 return (&dev_table[i]);
170 }
171
172 return (NULL);
173 }
174
175 #define BS_BAR 0x10
176 #define PCIR_RETRY_TIMEOUT 0x41
177 #define PCIR_CFG_PMCSR 0x48
178
179 #define DEFAULT_CACHESIZE 32
180
181 static void
182 ath_pci_setup(device_t dev)
183 {
184 uint8_t cz;
185
186 /* XXX TODO: need to override the _system_ saved copies of this */
187
188 /*
189 * If the cache line size is 0, force it to a reasonable
190 * value.
191 */
192 cz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
193 if (cz == 0) {
194 pci_write_config(dev, PCIR_CACHELNSZ,
195 DEFAULT_CACHESIZE / 4, 1);
196 }
197
198 /* Override the system latency timer */
199 pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1);
200
201 /* If a PCI NIC, force wakeup */
202 #ifdef ATH_PCI_WAKEUP_WAR
203 /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
204 if (1) {
205 uint16_t pmcsr;
206 pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
207 pmcsr |= 3;
208 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
209 pmcsr &= ~3;
210 pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
211 }
212 #endif
213
214 /*
215 * Disable retry timeout to keep PCI Tx retries from
216 * interfering with C3 CPU state.
217 */
218 pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
219 }
220
221 static int
222 ath_pci_probe(device_t dev)
223 {
224 const char* devname;
225
226 devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev));
227 if (devname != NULL) {
228 device_set_desc(dev, devname);
229 return BUS_PROBE_DEFAULT;
230 }
231 return ENXIO;
232 }
233
234 static int
235 ath_pci_attach(device_t dev)
236 {
237 struct ath_pci_softc *psc = device_get_softc(dev);
238 struct ath_softc *sc = &psc->sc_sc;
239 int error = ENXIO;
240 int rid;
241 #ifdef ATH_EEPROM_FIRMWARE
242 const struct firmware *fw = NULL;
243 const char *buf;
244 #endif
245 const struct pci_device_id *pd;
246
247 sc->sc_dev = dev;
248
249 /* Do this lookup anyway; figure out what to do with it later */
250 pd = ath_pci_probe_device(dev, ath_pci_id_table, nitems(ath_pci_id_table));
251 if (pd)
252 sc->sc_pci_devinfo = pd->driver_data;
253
254 /*
255 * Enable bus mastering.
256 */
257 pci_enable_busmaster(dev);
258
259 /*
260 * Setup other PCI bus configuration parameters.
261 */
262 ath_pci_setup(dev);
263
264 /*
265 * Setup memory-mapping of PCI registers.
266 */
267 rid = BS_BAR;
268 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
269 RF_ACTIVE);
270 if (psc->sc_sr == NULL) {
271 device_printf(dev, "cannot map register space\n");
272 goto bad;
273 }
274 sc->sc_st = (HAL_BUS_TAG) rman_get_bustag(psc->sc_sr);
275 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr);
276 /*
277 * Mark device invalid so any interrupts (shared or otherwise)
278 * that arrive before the HAL is setup are discarded.
279 */
280 sc->sc_invalid = 1;
281
282 ATH_LOCK_INIT(sc);
283 ATH_PCU_LOCK_INIT(sc);
284 ATH_RX_LOCK_INIT(sc);
285 ATH_TX_LOCK_INIT(sc);
286 ATH_TXSTATUS_LOCK_INIT(sc);
287
288 /*
289 * Arrange interrupt line.
290 */
291 rid = 0;
292 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
293 RF_SHAREABLE|RF_ACTIVE);
294 if (psc->sc_irq == NULL) {
295 device_printf(dev, "could not map interrupt\n");
296 goto bad1;
297 }
298 if (bus_setup_intr(dev, psc->sc_irq,
299 INTR_TYPE_NET | INTR_MPSAFE,
300 NULL, ath_intr, sc, &psc->sc_ih)) {
301 device_printf(dev, "could not establish interrupt\n");
302 goto bad2;
303 }
304
305 /*
306 * Setup DMA descriptor area.
307 */
308 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
309 1, 0, /* alignment, bounds */
310 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
311 BUS_SPACE_MAXADDR, /* highaddr */
312 NULL, NULL, /* filter, filterarg */
313 0x3ffff, /* maxsize XXX */
314 ATH_MAX_SCATTER, /* nsegments */
315 0x3ffff, /* maxsegsize XXX */
316 BUS_DMA_ALLOCNOW, /* flags */
317 NULL, /* lockfunc */
318 NULL, /* lockarg */
319 &sc->sc_dmat)) {
320 device_printf(dev, "cannot allocate DMA tag\n");
321 goto bad3;
322 }
323
324 #ifdef ATH_EEPROM_FIRMWARE
325 /*
326 * If there's an EEPROM firmware image, load that in.
327 */
328 if (resource_string_value(device_get_name(dev), device_get_unit(dev),
329 "eeprom_firmware", &buf) == 0) {
330 if (bootverbose)
331 device_printf(dev, "%s: looking up firmware @ '%s'\n",
332 __func__, buf);
333
334 fw = firmware_get(buf);
335 if (fw == NULL) {
336 device_printf(dev, "%s: couldn't find firmware\n",
337 __func__);
338 goto bad4;
339 }
340
341 device_printf(dev, "%s: EEPROM firmware @ %p\n",
342 __func__, fw->data);
343 sc->sc_eepromdata =
344 malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO);
345 if (! sc->sc_eepromdata) {
346 device_printf(dev, "%s: can't malloc eepromdata\n",
347 __func__);
348 goto bad4;
349 }
350 memcpy(sc->sc_eepromdata, fw->data, fw->datasize);
351 firmware_put(fw, 0);
352 }
353 #endif /* ATH_EEPROM_FIRMWARE */
354
355 error = ath_attach(pci_get_device(dev), sc);
356 if (error == 0) /* success */
357 return 0;
358
359 #ifdef ATH_EEPROM_FIRMWARE
360 bad4:
361 #endif
362 bus_dma_tag_destroy(sc->sc_dmat);
363 bad3:
364 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
365 bad2:
366 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
367 bad1:
368 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
369
370 ATH_TXSTATUS_LOCK_DESTROY(sc);
371 ATH_PCU_LOCK_DESTROY(sc);
372 ATH_RX_LOCK_DESTROY(sc);
373 ATH_TX_LOCK_DESTROY(sc);
374 ATH_LOCK_DESTROY(sc);
375
376 bad:
377 return (error);
378 }
379
380 static int
381 ath_pci_detach(device_t dev)
382 {
383 struct ath_pci_softc *psc = device_get_softc(dev);
384 struct ath_softc *sc = &psc->sc_sc;
385
386 /* check if device was removed */
387 sc->sc_invalid = !bus_child_present(dev);
388
389 /*
390 * Do a config read to clear pre-existing pci error status.
391 */
392 (void) pci_read_config(dev, PCIR_COMMAND, 4);
393
394 ath_detach(sc);
395
396 bus_generic_detach(dev);
397 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih);
398 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq);
399
400 bus_dma_tag_destroy(sc->sc_dmat);
401 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr);
402
403 if (sc->sc_eepromdata)
404 free(sc->sc_eepromdata, M_TEMP);
405
406 ATH_TXSTATUS_LOCK_DESTROY(sc);
407 ATH_PCU_LOCK_DESTROY(sc);
408 ATH_RX_LOCK_DESTROY(sc);
409 ATH_TX_LOCK_DESTROY(sc);
410 ATH_LOCK_DESTROY(sc);
411
412 return (0);
413 }
414
415 static int
416 ath_pci_shutdown(device_t dev)
417 {
418 struct ath_pci_softc *psc = device_get_softc(dev);
419
420 ath_shutdown(&psc->sc_sc);
421 return (0);
422 }
423
424 static int
425 ath_pci_suspend(device_t dev)
426 {
427 struct ath_pci_softc *psc = device_get_softc(dev);
428
429 ath_suspend(&psc->sc_sc);
430
431 return (0);
432 }
433
434 static int
435 ath_pci_resume(device_t dev)
436 {
437 struct ath_pci_softc *psc = device_get_softc(dev);
438
439 /*
440 * Suspend/resume resets the PCI configuration space.
441 */
442 ath_pci_setup(dev);
443
444 ath_resume(&psc->sc_sc);
445
446 return (0);
447 }
448
449 static device_method_t ath_pci_methods[] = {
450 /* Device interface */
451 DEVMETHOD(device_probe, ath_pci_probe),
452 DEVMETHOD(device_attach, ath_pci_attach),
453 DEVMETHOD(device_detach, ath_pci_detach),
454 DEVMETHOD(device_shutdown, ath_pci_shutdown),
455 DEVMETHOD(device_suspend, ath_pci_suspend),
456 DEVMETHOD(device_resume, ath_pci_resume),
457
458 { 0,0 }
459 };
460 static driver_t ath_pci_driver = {
461 "ath",
462 ath_pci_methods,
463 sizeof (struct ath_pci_softc)
464 };
465 static devclass_t ath_devclass;
466 DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0);
467 MODULE_VERSION(ath_pci, 1);
468 MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */
469 MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */
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