chipcvar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
    5  * Copyright (c) 2017 The FreeBSD Foundation
    6  * All rights reserved.
    7  *
    8  * Portions of this software were developed by Landon Fuller
    9  * under sponsorship from the FreeBSD Foundation.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer,
   16  *    without modification.
   17  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
   18  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
   19  *    redistribution must be conditioned upon including a substantially
   20  *    similar Disclaimer requirement for further binary redistribution.
   21  *
   22  * NO WARRANTY
   23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
   24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
   25  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
   26  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
   27  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
   28  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
   31  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   33  * THE POSSIBILITY OF SUCH DAMAGES.
   34  * 
   35  * $FreeBSD$
   36  */
   37 
   38 #ifndef _BHND_CORES_CHIPC_CHIPCVAR_H_
   39 #define _BHND_CORES_CHIPC_CHIPCVAR_H_
   40 
   41 #include <sys/types.h>
   42 #include <sys/rman.h>
   43 
   44 #include <dev/bhnd/nvram/bhnd_spromvar.h>
   45 
   46 #include "chipc.h"
   47 
   48 DECLARE_CLASS(bhnd_chipc_driver);
   49 
   50 struct chipc_region;
   51 
   52 const char      *chipc_flash_name(chipc_flash type);
   53 const char      *chipc_flash_bus_name(chipc_flash type);
   54 const char      *chipc_sflash_device_name(chipc_flash type);
   55 
   56 /* 
   57  * ChipCommon device quirks / features
   58  */
   59 enum {
   60         /** No quirks */
   61         CHIPC_QUIRK_NONE                        = 0,
   62 
   63         /**
   64          * ChipCommon-controlled SPROM/OTP is supported, along with the
   65          * CHIPC_CAP_SPROM capability flag.
   66          */
   67         CHIPC_QUIRK_SUPPORTS_SPROM              = (1<<1),
   68 
   69         /**
   70          * The BCM4706 NAND flash interface is supported, along with the
   71          * CHIPC_CAP_4706_NFLASH capability flag.
   72          */
   73         CHIPC_QUIRK_4706_NFLASH                 = (1<<2),
   74 
   75         /**
   76          * The SPROM is attached via muxed pins. The pins must be switched
   77          * to allow reading/writing.
   78          */
   79         CHIPC_QUIRK_MUX_SPROM                   = (1<<3),
   80 
   81         /**
   82          * Access to the SPROM uses pins shared with the 802.11a external PA.
   83          * 
   84          * On modules using these 4331 packages, the CCTRL4331_EXTPA_EN flag
   85          * must be cleared to allow SPROM access.
   86          */
   87         CHIPC_QUIRK_4331_EXTPA_MUX_SPROM        = (1<<4) |
   88             CHIPC_QUIRK_MUX_SPROM,
   89 
   90         /**
   91          * Access to the SPROM uses pins shared with the 802.11a external PA.
   92          * 
   93          * On modules using these 4331 chip packages, the external PA is
   94          * attached via GPIO 2, 5, and sprom_dout pins.
   95          * 
   96          * When enabling and disabling EXTPA to allow SPROM access, the
   97          * CCTRL4331_EXTPA_ON_GPIO2_5 flag must also be set or cleared,
   98          * respectively.
   99          */
  100         CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM      = (1<<5) |
  101             CHIPC_QUIRK_4331_EXTPA_MUX_SPROM,
  102 
  103         /**
  104          * Access to the SPROM uses pins shared with two 802.11a external PAs.
  105          * 
  106          * When enabling and disabling EXTPA, the CCTRL4331_EXTPA_EN2 must also
  107          * be cleared to allow SPROM access.
  108          */
  109         CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM       = (1<<6) |
  110             CHIPC_QUIRK_4331_EXTPA_MUX_SPROM,
  111 
  112         /**
  113          * SPROM pins are muxed with the FEM control lines on this 4360-family
  114          * device. The muxed pins must be switched to allow reading/writing
  115          * the SPROM.
  116          */
  117         CHIPC_QUIRK_4360_FEM_MUX_SPROM          = (1<<5) |
  118             CHIPC_QUIRK_MUX_SPROM,
  119 
  120         /** Supports CHIPC_CAPABILITIES_EXT register */
  121         CHIPC_QUIRK_SUPPORTS_CAP_EXT            = (1<<6),
  122 
  123         /** Supports HND or IPX OTP registers (CHIPC_OTPST, CHIPC_OTPCTRL,
  124          *  CHIPC_OTPPROG) */
  125         CHIPC_QUIRK_SUPPORTS_OTP                = (1<<7),
  126 
  127         /** Supports HND OTP registers. */
  128         CHIPC_QUIRK_OTP_HND                     = (1<<8) |
  129             CHIPC_QUIRK_SUPPORTS_OTP,
  130 
  131         /** Supports IPX OTP registers. */
  132         CHIPC_QUIRK_OTP_IPX                     = (1<<9) |
  133             CHIPC_QUIRK_SUPPORTS_OTP,
  134 
  135         /** OTP size is defined via CHIPC_OTPLAYOUT register in later
  136          *  ChipCommon revisions using the 'IPX' OTP controller. */
  137         CHIPC_QUIRK_IPX_OTPL_SIZE               = (1<<10)
  138 };
  139 
  140 /**
  141  * chipc child device info.
  142  */
  143 struct chipc_devinfo {
  144         struct resource_list    resources;      /**< child resources */
  145         rman_res_t              irq;            /**< child IRQ, if mapped */
  146         bool                    irq_mapped;     /**< true if IRQ mapped, false otherwise */
  147 };
  148 
  149 /**
  150  * chipc driver instance state.
  151  */
  152 struct chipc_softc {
  153         device_t                dev;
  154 
  155         struct bhnd_resource    *core;          /**< core registers. */
  156         struct chipc_region     *core_region;   /**< region containing core registers */
  157 
  158         uint32_t                 quirks;        /**< chipc quirk flags */
  159         struct chipc_caps        caps;          /**< chipc capabilities */
  160 
  161         struct mtx               mtx;           /**< state mutex. */
  162         size_t                   sprom_refcnt;  /**< SPROM pin enable refcount */
  163         struct rman              mem_rman;      /**< port memory manager */
  164         STAILQ_HEAD(, chipc_region) mem_regions;/**< memory allocation records */
  165 };
  166 
  167 #define CHIPC_LOCK_INIT(sc) \
  168         mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
  169             "BHND chipc driver lock", MTX_DEF)
  170 #define CHIPC_LOCK(sc)                          mtx_lock(&(sc)->mtx)
  171 #define CHIPC_UNLOCK(sc)                        mtx_unlock(&(sc)->mtx)
  172 #define CHIPC_LOCK_ASSERT(sc, what)             mtx_assert(&(sc)->mtx, what)
  173 #define CHIPC_LOCK_DESTROY(sc)                  mtx_destroy(&(sc)->mtx)
  174 
  175 #endif /* _BHND_CORES_CHIPC_CHIPCVAR_H_ */

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FreeBSD/Linux Kernel Cross Reference sys/dev/bhnd/cores/chipc/chipcvar.h

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sys/dev/bhnd/cores/chipc/chipcvar.h