Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/cardbus/njs_cardbus.c
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1 /* $NetBSD: njs_cardbus.c,v 1.2.2.4 2004/08/30 14:08:06 tron Exp $ */ 2 3 /*- 4 * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by ITOH Yasufumi. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: njs_cardbus.c,v 1.2.2.4 2004/08/30 14:08:06 tron Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/scsipi/scsi_all.h> 51 #include <dev/scsipi/scsipi_all.h> 52 #include <dev/scsipi/scsiconf.h> 53 54 #include <dev/cardbus/cardbusvar.h> 55 #include <dev/cardbus/cardbusdevs.h> 56 57 #include <dev/ic/ninjascsi32reg.h> 58 #include <dev/ic/ninjascsi32var.h> 59 60 #define NJSC32_CARDBUS_BASEADDR_IO CARDBUS_BASE0_REG 61 #define NJSC32_CARDBUS_BASEADDR_MEM CARDBUS_BASE1_REG 62 63 struct njsc32_cardbus_softc { 64 struct njsc32_softc sc_njsc32; 65 66 /* CardBus-specific goo */ 67 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 68 int sc_intrline; /* our interrupt line */ 69 cardbustag_t sc_tag; 70 71 bus_space_handle_t sc_regmaph; 72 bus_size_t sc_regmap_size; 73 }; 74 75 static int njs_cardbus_match(struct device *, struct cfdata *, void *); 76 static void njs_cardbus_attach(struct device *, struct device *, void *); 77 static int njs_cardbus_detach(struct device *, int); 78 79 CFATTACH_DECL(njs_cardbus, sizeof(struct njsc32_cardbus_softc), 80 njs_cardbus_match, njs_cardbus_attach, njs_cardbus_detach, NULL); 81 82 static const struct njsc32_cardbus_product { 83 cardbus_vendor_id_t p_vendor; 84 cardbus_product_id_t p_product; 85 njsc32_model_t p_model; 86 int p_clk; /* one of NJSC32_CLK_* */ 87 } njsc32_cardbus_products[] = { 88 { CARDBUS_VENDOR_IODATA, CARDBUS_PRODUCT_IODATA_CBSCII, 89 NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 90 { CARDBUS_VENDOR_WORKBIT, CARDBUS_PRODUCT_WORKBIT_NJSC32BI, 91 NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 92 { CARDBUS_VENDOR_WORKBIT, CARDBUS_PRODUCT_WORKBIT_NJSC32UDE, 93 NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 94 { CARDBUS_VENDOR_WORKBIT, CARDBUS_PRODUCT_WORKBIT_NJSC32BI_KME, 95 NJSC32_MODEL_32BI, NJSC32_CLK_40M }, 96 97 { 0, 0, 98 NJSC32_MODEL_INVALID, 0 }, 99 }; 100 101 static const struct njsc32_cardbus_product * 102 njs_cardbus_lookup(const struct cardbus_attach_args *ca) 103 { 104 const struct njsc32_cardbus_product *p; 105 106 for (p = njsc32_cardbus_products; 107 p->p_model != NJSC32_MODEL_INVALID; p++) { 108 if (CARDBUS_VENDOR(ca->ca_id) == p->p_vendor && 109 CARDBUS_PRODUCT(ca->ca_id) == p->p_product) 110 return p; 111 } 112 113 return NULL; 114 } 115 116 static int 117 njs_cardbus_match(struct device *parent, struct cfdata *match, void *aux) 118 { 119 struct cardbus_attach_args *ca = aux; 120 121 if (njs_cardbus_lookup(ca)) 122 return 1; 123 124 return 0; 125 } 126 127 static void 128 njs_cardbus_attach(struct device *parent, struct device *self, void *aux) 129 { 130 struct cardbus_attach_args *ca = aux; 131 struct njsc32_cardbus_softc *csc = (void *) self; 132 struct njsc32_softc *sc = &csc->sc_njsc32; 133 const struct njsc32_cardbus_product *prod; 134 cardbus_devfunc_t ct = ca->ca_ct; 135 cardbus_chipset_tag_t cc = ct->ct_cc; 136 cardbus_function_tag_t cf = ct->ct_cf; 137 pcireg_t reg; 138 int csr; 139 u_int8_t latency = 0x20; 140 141 if ((prod = njs_cardbus_lookup(ca)) == NULL) 142 panic("njs_cardbus_attach"); 143 144 printf(": Workbit NinjaSCSI-32 SCSI adapter\n"); 145 sc->sc_model = prod->p_model; 146 sc->sc_clk = prod->p_clk; 147 148 csc->sc_ct = ct; 149 csc->sc_tag = ca->ca_tag; 150 csc->sc_intrline = ca->ca_intrline; 151 152 /* 153 * Map the device. 154 */ 155 csr = PCI_COMMAND_MASTER_ENABLE; 156 157 /* 158 * Map registers. 159 * Try memory map first, and then try I/O. 160 */ 161 if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM, 162 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 163 &sc->sc_regt, &csc->sc_regmaph, NULL, &csc->sc_regmap_size) == 0) { 164 if (bus_space_subregion(sc->sc_regt, csc->sc_regmaph, 165 NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) { 166 /* failed -- undo map and try I/O */ 167 Cardbus_mapreg_unmap(csc->sc_ct, 168 NJSC32_CARDBUS_BASEADDR_MEM, 169 sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size); 170 goto try_io; 171 } 172 #ifdef NJSC32_DEBUG 173 printf("%s: memory space mapped\n", sc->sc_dev.dv_xname); 174 #endif 175 csr |= PCI_COMMAND_MEM_ENABLE; 176 sc->sc_flags = NJSC32_MEM_MAPPED; 177 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE); 178 } else { 179 try_io: 180 if (Cardbus_mapreg_map(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO, 181 PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh, 182 NULL, &csc->sc_regmap_size) == 0) { 183 #ifdef NJSC32_DEBUG 184 printf("%s: io space mapped\n", sc->sc_dev.dv_xname); 185 #endif 186 csr |= PCI_COMMAND_IO_ENABLE; 187 sc->sc_flags = NJSC32_IO_MAPPED; 188 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE); 189 } else { 190 printf("%s: unable to map device registers\n", 191 sc->sc_dev.dv_xname); 192 return; 193 } 194 } 195 196 /* Make sure the right access type is on the CardBus bridge. */ 197 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 198 199 /* Enable the appropriate bits in the PCI CSR. */ 200 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 201 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 202 reg |= csr; 203 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 204 205 /* 206 * Make sure the latency timer is set to some reasonable 207 * value. 208 */ 209 reg = cardbus_conf_read(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG); 210 if (CARDBUS_LATTIMER(reg) < latency) { 211 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 212 reg |= (latency << CARDBUS_LATTIMER_SHIFT); 213 cardbus_conf_write(cc, cf, ca->ca_tag, CARDBUS_BHLC_REG, reg); 214 } 215 216 sc->sc_dmat = ca->ca_dmat; 217 218 /* 219 * Establish the interrupt. 220 */ 221 sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 222 njsc32_intr, sc); 223 if (sc->sc_ih == NULL) { 224 printf("%s: unable to establish interrupt at %d\n", 225 sc->sc_dev.dv_xname, ca->ca_intrline); 226 return; 227 } 228 printf("%s: interrupting at %d\n", 229 sc->sc_dev.dv_xname, ca->ca_intrline); 230 231 /* CardBus device cannot supply termination power. */ 232 sc->sc_flags |= NJSC32_CANNOT_SUPPLY_TERMPWR; 233 234 /* attach */ 235 njsc32_attach(sc); 236 } 237 238 static int 239 njs_cardbus_detach(struct device *self, int flags) 240 { 241 struct njsc32_cardbus_softc *csc = (void *) self; 242 struct njsc32_softc *sc = &csc->sc_njsc32; 243 int rv; 244 245 rv = njsc32_detach(sc, flags); 246 if (rv) 247 return rv; 248 249 if (sc->sc_ih) 250 cardbus_intr_disestablish(csc->sc_ct->ct_cc, 251 csc->sc_ct->ct_cf, sc->sc_ih); 252 253 if (sc->sc_flags & NJSC32_IO_MAPPED) 254 Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_IO, 255 sc->sc_regt, sc->sc_regh, csc->sc_regmap_size); 256 if (sc->sc_flags & NJSC32_MEM_MAPPED) 257 Cardbus_mapreg_unmap(csc->sc_ct, NJSC32_CARDBUS_BASEADDR_MEM, 258 sc->sc_regt, csc->sc_regmaph, csc->sc_regmap_size); 259 260 return 0; 261 }
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