The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/cm/smc90cx6reg.h

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    1 /*      $NetBSD: smc90cx6reg.h,v 1.7 1999/02/16 23:34:13 is Exp $ */
    2 /*      $FreeBSD: releng/9.0/sys/dev/cm/smc90cx6reg.h 204520 2010-03-01 16:52:11Z joel $ */
    3 
    4 /*-
    5  * Copyright (c) 1994, 1995, 1998 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Ignatios Souvatzis.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   30  * POSSIBILITY OF SUCH DAMAGE.
   31  */
   32 
   33 /*
   34  * chip offsets and bits for the SMC Arcnet chipset.
   35  */
   36 
   37 #ifndef _SMC90CXVAR_H_
   38 #define _SMC90CXVAR_H_
   39 
   40 #define CM_IO_PORTS 16
   41 #define CM_MEM_SIZE     0x800
   42 
   43 /* register offsets */
   44 
   45 #define CMSTAT  0
   46 #define CMCMD   1
   47 #define CMRESET 8
   48 
   49 /* memory offsets */
   50 #define CMCHECKBYTE 0
   51 #define CMMACOFF 1
   52 
   53 #define CM_TXDIS        0x01
   54 #define CM_RXDIS        0x02
   55 #define CM_TX(x)        (0x03 | ((x)<<3))
   56 #define CM_RX(x)        (0x04 | ((x)<<3))
   57 #define CM_RXBC(x)      (0x84 | ((x)<<3))
   58 
   59 #define CM_CONF(x)      (0x05 | (x))
   60 #define CLR_POR         0x08
   61 #define CLR_RECONFIG    0x10
   62 
   63 #define CM_CLR(x)       (0x06 | (x))
   64 #define CONF_LONG       0x08
   65 #define CONF_SHORT      0x00
   66 
   67 /*
   68  * These are not in the COM90C65 docs. Derived from the arcnet.asm
   69  * packet driver by Philippe Prindeville and Russel Nelson.
   70  */
   71 
   72 #define CM_LDTST(x)     (0x07 | (x))
   73 #define TEST_ON         0x08
   74 #define TEST_OFF        0x00
   75 
   76 #define CM_TA           1       /* int mask also */
   77 #define CM_TMA          2
   78 #define CM_RECON        4       /* int mask also */
   79 #define CM_TEST 8               /* not in the COM90C65 docs (see above) */
   80 #define CM_POR          0x10    /* non maskable interrupt */
   81 #define CM_ET1          0x20    /* timeout value bits, normally 1 */
   82 #define CM_ET2          0x40    /* timeout value bits, normally 1 */
   83 #define CM_RI           0x80    /* int mask also */
   84 
   85 #endif

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