1 /*-
2 * Copyright (c) 2007, 2008 Rui Paulo <rpaulo@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24 * POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /*
28 * Device driver for Intel's On Die thermal sensor via MSR.
29 * First introduced in Intel's Core line of processors.
30 */
31
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34
35 #include <sys/param.h>
36 #include <sys/bus.h>
37 #include <sys/systm.h>
38 #include <sys/types.h>
39 #include <sys/module.h>
40 #include <sys/conf.h>
41 #include <sys/kernel.h>
42 #include <sys/sysctl.h>
43 #include <sys/proc.h> /* for curthread */
44 #include <sys/sched.h>
45
46 #include <machine/specialreg.h>
47 #include <machine/cpufunc.h>
48 #include <machine/md_var.h>
49
50 struct coretemp_softc {
51 device_t sc_dev;
52 int sc_tjmax;
53 struct sysctl_oid *sc_oid;
54 };
55
56 /*
57 * Device methods.
58 */
59 static void coretemp_identify(driver_t *driver, device_t parent);
60 static int coretemp_probe(device_t dev);
61 static int coretemp_attach(device_t dev);
62 static int coretemp_detach(device_t dev);
63
64 static int coretemp_get_temp(device_t dev);
65 static int coretemp_get_temp_sysctl(SYSCTL_HANDLER_ARGS);
66
67 static device_method_t coretemp_methods[] = {
68 /* Device interface */
69 DEVMETHOD(device_identify, coretemp_identify),
70 DEVMETHOD(device_probe, coretemp_probe),
71 DEVMETHOD(device_attach, coretemp_attach),
72 DEVMETHOD(device_detach, coretemp_detach),
73
74 {0, 0}
75 };
76
77 static driver_t coretemp_driver = {
78 "coretemp",
79 coretemp_methods,
80 sizeof(struct coretemp_softc),
81 };
82
83 static devclass_t coretemp_devclass;
84 DRIVER_MODULE(coretemp, cpu, coretemp_driver, coretemp_devclass, NULL, NULL);
85
86 static void
87 coretemp_identify(driver_t *driver, device_t parent)
88 {
89 device_t child;
90 u_int regs[4];
91
92 /* Make sure we're not being doubly invoked. */
93 if (device_find_child(parent, "coretemp", -1) != NULL)
94 return;
95
96 /* Check that CPUID 0x06 is supported and the vendor is Intel.*/
97 if (cpu_high < 6 || strcmp(cpu_vendor, "GenuineIntel"))
98 return;
99 /*
100 * CPUID 0x06 returns 1 if the processor has on-die thermal
101 * sensors. EBX[0:3] contains the number of sensors.
102 */
103 do_cpuid(0x06, regs);
104 if ((regs[0] & 0x1) != 1)
105 return;
106
107 /*
108 * We add a child for each CPU since settings must be performed
109 * on each CPU in the SMP case.
110 */
111 child = device_add_child(parent, "coretemp", -1);
112 if (child == NULL)
113 device_printf(parent, "add coretemp child failed\n");
114 }
115
116 static int
117 coretemp_probe(device_t dev)
118 {
119 if (resource_disabled("coretemp", 0))
120 return (ENXIO);
121
122 device_set_desc(dev, "CPU On-Die Thermal Sensors");
123
124 return (BUS_PROBE_GENERIC);
125 }
126
127 static int
128 coretemp_attach(device_t dev)
129 {
130 struct coretemp_softc *sc = device_get_softc(dev);
131 device_t pdev;
132 uint64_t msr;
133 int cpu_model;
134 int cpu_mask;
135
136 sc->sc_dev = dev;
137 pdev = device_get_parent(dev);
138 cpu_model = (cpu_id >> 4) & 15;
139 /* extended model */
140 cpu_model += ((cpu_id >> 16) & 0xf) << 4;
141 cpu_mask = cpu_id & 15;
142
143 /*
144 * Some CPUs, namely the PIII, don't have thermal sensors, but
145 * report them when the CPUID check is performed in
146 * coretemp_identify(). This leads to a later GPF when the sensor
147 * is queried via a MSR, so we stop here.
148 */
149 if (cpu_model < 0xe)
150 return (ENXIO);
151
152 /*
153 * Check for errata AE18.
154 * "Processor Digital Thermal Sensor (DTS) Readout stops
155 * updating upon returning from C3/C4 state."
156 *
157 * Adapted from the Linux coretemp driver.
158 */
159 if (cpu_model == 0xe && cpu_mask < 0xc) {
160 msr = rdmsr(MSR_BIOS_SIGN);
161 msr = msr >> 32;
162 if (msr < 0x39) {
163 device_printf(dev, "not supported (Intel errata "
164 "AE18), try updating your BIOS\n");
165 return (ENXIO);
166 }
167 }
168 /*
169 * On some Core 2 CPUs, there's an undocumented MSR that
170 * can tell us if Tj(max) is 100 or 85.
171 *
172 * The if-clause for CPUs having the MSR_IA32_EXT_CONFIG was adapted
173 * from the Linux coretemp driver.
174 */
175 sc->sc_tjmax = 100;
176 if ((cpu_model == 0xf && cpu_mask >= 2) || cpu_model == 0xe) {
177 msr = rdmsr(MSR_IA32_EXT_CONFIG);
178 if (msr & (1 << 30))
179 sc->sc_tjmax = 85;
180 }
181
182 /*
183 * Add the "temperature" MIB to dev.cpu.N.
184 */
185 sc->sc_oid = SYSCTL_ADD_PROC(device_get_sysctl_ctx(pdev),
186 SYSCTL_CHILDREN(device_get_sysctl_tree(pdev)),
187 OID_AUTO, "temperature",
188 CTLTYPE_INT | CTLFLAG_RD,
189 dev, 0, coretemp_get_temp_sysctl, "I",
190 "Current temperature in degC");
191
192 return (0);
193 }
194
195 static int
196 coretemp_detach(device_t dev)
197 {
198 struct coretemp_softc *sc = device_get_softc(dev);
199
200 sysctl_remove_oid(sc->sc_oid, 1, 0);
201
202 return (0);
203 }
204
205
206 static int
207 coretemp_get_temp(device_t dev)
208 {
209 uint64_t msr;
210 int temp;
211 int cpu = device_get_unit(dev);
212 struct coretemp_softc *sc = device_get_softc(dev);
213 char stemp[16];
214
215 thread_lock(curthread);
216 sched_bind(curthread, cpu);
217 thread_unlock(curthread);
218
219 /*
220 * The digital temperature reading is located at bit 16
221 * of MSR_THERM_STATUS.
222 *
223 * There is a bit on that MSR that indicates whether the
224 * temperature is valid or not.
225 *
226 * The temperature is computed by subtracting the temperature
227 * reading by Tj(max).
228 */
229 msr = rdmsr(MSR_THERM_STATUS);
230
231 thread_lock(curthread);
232 sched_unbind(curthread);
233 thread_unlock(curthread);
234
235 /*
236 * Check for Thermal Status and Thermal Status Log.
237 */
238 if ((msr & 0x3) == 0x3)
239 device_printf(dev, "PROCHOT asserted\n");
240
241 /*
242 * Bit 31 contains "Reading valid"
243 */
244 if (((msr >> 31) & 0x1) == 1) {
245 /*
246 * Starting on bit 16 and ending on bit 22.
247 */
248 temp = sc->sc_tjmax - ((msr >> 16) & 0x7f);
249 } else
250 temp = -1;
251
252 /*
253 * Check for Critical Temperature Status and Critical
254 * Temperature Log.
255 * It doesn't really matter if the current temperature is
256 * invalid because the "Critical Temperature Log" bit will
257 * tell us if the Critical Temperature has been reached in
258 * past. It's not directly related to the current temperature.
259 *
260 * If we reach a critical level, allow devctl(4) to catch this
261 * and shutdown the system.
262 */
263 if (((msr >> 4) & 0x3) == 0x3) {
264 device_printf(dev, "critical temperature detected, "
265 "suggest system shutdown\n");
266 snprintf(stemp, sizeof(stemp), "%d", temp);
267 devctl_notify("coretemp", "Thermal", stemp, "notify=0xcc");
268 }
269
270 return (temp);
271 }
272
273 static int
274 coretemp_get_temp_sysctl(SYSCTL_HANDLER_ARGS)
275 {
276 device_t dev = (device_t) arg1;
277 int temp;
278
279 temp = coretemp_get_temp(dev);
280
281 return (sysctl_handle_int(oidp, &temp, 0, req));
282 }
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