Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/cpufreq/cpufreq_dt.c
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1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Generic DT based cpufreq driver 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/rman.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 #include <sys/cpu.h> 43 #include <sys/cpuset.h> 44 #include <sys/smp.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/extres/clk/clk.h> 50 #include <dev/extres/regulator/regulator.h> 51 52 #include "cpufreq_if.h" 53 54 #if 0 55 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 56 #else 57 #define DPRINTF(dev, msg...) 58 #endif 59 60 enum opp_version { 61 OPP_V1 = 1, 62 OPP_V2, 63 }; 64 65 struct cpufreq_dt_opp { 66 uint64_t freq; 67 uint32_t uvolt_target; 68 uint32_t uvolt_min; 69 uint32_t uvolt_max; 70 uint32_t uamps; 71 uint32_t clk_latency; 72 bool turbo_mode; 73 bool opp_suspend; 74 }; 75 76 #define CPUFREQ_DT_HAVE_REGULATOR(sc) ((sc)->reg != NULL) 77 78 struct cpufreq_dt_softc { 79 device_t dev; 80 clk_t clk; 81 regulator_t reg; 82 83 struct cpufreq_dt_opp *opp; 84 ssize_t nopp; 85 86 int cpu; 87 cpuset_t cpus; 88 }; 89 90 static void 91 cpufreq_dt_notify(device_t dev, uint64_t freq) 92 { 93 struct cpufreq_dt_softc *sc; 94 struct pcpu *pc; 95 int cpu; 96 97 sc = device_get_softc(dev); 98 99 CPU_FOREACH(cpu) { 100 if (CPU_ISSET(cpu, &sc->cpus)) { 101 pc = pcpu_find(cpu); 102 pc->pc_clock = freq; 103 } 104 } 105 } 106 107 static const struct cpufreq_dt_opp * 108 cpufreq_dt_find_opp(device_t dev, uint64_t freq) 109 { 110 struct cpufreq_dt_softc *sc; 111 ssize_t n; 112 113 sc = device_get_softc(dev); 114 115 DPRINTF(dev, "Looking for freq %ju\n", freq); 116 for (n = 0; n < sc->nopp; n++) 117 if (CPUFREQ_CMP(sc->opp[n].freq, freq)) 118 return (&sc->opp[n]); 119 120 DPRINTF(dev, "Couldn't find one\n"); 121 return (NULL); 122 } 123 124 static void 125 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, 126 struct cf_setting *set) 127 { 128 129 memset(set, 0, sizeof(*set)); 130 set->freq = opp->freq / 1000000; 131 set->volts = opp->uvolt_target / 1000; 132 set->power = CPUFREQ_VAL_UNKNOWN; 133 set->lat = opp->clk_latency; 134 set->dev = dev; 135 } 136 137 static int 138 cpufreq_dt_get(device_t dev, struct cf_setting *set) 139 { 140 struct cpufreq_dt_softc *sc; 141 const struct cpufreq_dt_opp *opp; 142 uint64_t freq; 143 144 sc = device_get_softc(dev); 145 146 DPRINTF(dev, "cpufreq_dt_get\n"); 147 if (clk_get_freq(sc->clk, &freq) != 0) 148 return (ENXIO); 149 150 opp = cpufreq_dt_find_opp(dev, freq); 151 if (opp == NULL) { 152 device_printf(dev, "Can't find the current freq in opp\n"); 153 return (ENOENT); 154 } 155 156 cpufreq_dt_opp_to_setting(dev, opp, set); 157 158 DPRINTF(dev, "Current freq %dMhz\n", set->freq); 159 return (0); 160 } 161 162 static int 163 cpufreq_dt_set(device_t dev, const struct cf_setting *set) 164 { 165 struct cpufreq_dt_softc *sc; 166 const struct cpufreq_dt_opp *opp, *copp; 167 uint64_t freq; 168 int uvolt, error; 169 170 sc = device_get_softc(dev); 171 172 DPRINTF(dev, "Working on cpu %d\n", sc->cpu); 173 DPRINTF(dev, "We have %d cpu on this dev\n", CPU_COUNT(&sc->cpus)); 174 if (!CPU_ISSET(sc->cpu, &sc->cpus)) { 175 DPRINTF(dev, "Not for this CPU\n"); 176 return (0); 177 } 178 179 if (clk_get_freq(sc->clk, &freq) != 0) { 180 device_printf(dev, "Can't get current clk freq\n"); 181 return (ENXIO); 182 } 183 184 /* 185 * Only do the regulator work if it's required. 186 */ 187 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 188 /* Try to get current valtage by using regulator first. */ 189 error = regulator_get_voltage(sc->reg, &uvolt); 190 if (error != 0) { 191 /* 192 * Try oppoints table as backup way. However, 193 * this is insufficient because the actual processor 194 * frequency may not be in the table. PLL frequency 195 * granularity can be different that granularity of 196 * oppoint table. 197 */ 198 copp = cpufreq_dt_find_opp(sc->dev, freq); 199 if (copp == NULL) { 200 device_printf(dev, 201 "Can't find the current freq in opp\n"); 202 return (ENOENT); 203 } 204 uvolt = copp->uvolt_target; 205 } 206 } else 207 uvolt = 0; 208 209 opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000); 210 if (opp == NULL) { 211 device_printf(dev, "Couldn't find an opp for this freq\n"); 212 return (EINVAL); 213 } 214 DPRINTF(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt); 215 DPRINTF(sc->dev, "Target freq %ju, , uvolt: %d\n", 216 opp->freq, opp->uvolt_target); 217 218 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt < opp->uvolt_target)) { 219 DPRINTF(dev, "Changing regulator from %u to %u\n", 220 uvolt, opp->uvolt_target); 221 error = regulator_set_voltage(sc->reg, 222 opp->uvolt_min, 223 opp->uvolt_max); 224 if (error != 0) { 225 DPRINTF(dev, "Failed, backout\n"); 226 return (ENXIO); 227 } 228 } 229 230 DPRINTF(dev, "Setting clk to %ju\n", opp->freq); 231 error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN); 232 if (error != 0) { 233 DPRINTF(dev, "Failed, backout\n"); 234 /* Restore previous voltage (best effort) */ 235 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 236 error = regulator_set_voltage(sc->reg, 237 copp->uvolt_min, 238 copp->uvolt_max); 239 return (ENXIO); 240 } 241 242 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt > opp->uvolt_target)) { 243 DPRINTF(dev, "Changing regulator from %u to %u\n", 244 uvolt, opp->uvolt_target); 245 error = regulator_set_voltage(sc->reg, 246 opp->uvolt_min, 247 opp->uvolt_max); 248 if (error != 0) { 249 DPRINTF(dev, "Failed to switch regulator to %d\n", 250 opp->uvolt_target); 251 /* Restore previous CPU frequency (best effort) */ 252 (void)clk_set_freq(sc->clk, copp->freq, 0); 253 return (ENXIO); 254 } 255 } 256 257 if (clk_get_freq(sc->clk, &freq) == 0) 258 cpufreq_dt_notify(dev, freq); 259 260 return (0); 261 } 262 263 static int 264 cpufreq_dt_type(device_t dev, int *type) 265 { 266 if (type == NULL) 267 return (EINVAL); 268 269 *type = CPUFREQ_TYPE_ABSOLUTE; 270 return (0); 271 } 272 273 static int 274 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) 275 { 276 struct cpufreq_dt_softc *sc; 277 ssize_t n; 278 279 DPRINTF(dev, "cpufreq_dt_settings\n"); 280 if (sets == NULL || count == NULL) 281 return (EINVAL); 282 283 sc = device_get_softc(dev); 284 285 if (*count < sc->nopp) { 286 *count = (int)sc->nopp; 287 return (E2BIG); 288 } 289 290 for (n = 0; n < sc->nopp; n++) 291 cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); 292 293 *count = (int)sc->nopp; 294 295 return (0); 296 } 297 298 static void 299 cpufreq_dt_identify(driver_t *driver, device_t parent) 300 { 301 phandle_t node; 302 303 /* Properties must be listed under node /cpus/cpu@0 */ 304 node = ofw_bus_get_node(parent); 305 306 /* The cpu@0 node must have the following properties */ 307 if (!OF_hasprop(node, "clocks")) 308 return; 309 310 if (!OF_hasprop(node, "operating-points") && 311 !OF_hasprop(node, "operating-points-v2")) 312 return; 313 314 if (device_find_child(parent, "cpufreq_dt", -1) != NULL) 315 return; 316 317 if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", device_get_unit(parent)) 318 == NULL) 319 device_printf(parent, "add cpufreq_dt child failed\n"); 320 } 321 322 static int 323 cpufreq_dt_probe(device_t dev) 324 { 325 phandle_t node; 326 327 node = ofw_bus_get_node(device_get_parent(dev)); 328 329 /* 330 * Note - supply isn't required here for probe; we'll check 331 * it out in more detail during attach. 332 */ 333 if (!OF_hasprop(node, "clocks")) 334 return (ENXIO); 335 336 if (!OF_hasprop(node, "operating-points") && 337 !OF_hasprop(node, "operating-points-v2")) 338 return (ENXIO); 339 340 device_set_desc(dev, "Generic cpufreq driver"); 341 return (BUS_PROBE_GENERIC); 342 } 343 344 static int 345 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node) 346 { 347 uint32_t *opp, lat; 348 ssize_t n; 349 350 sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", 351 sizeof(uint32_t) * 2, (void **)&opp); 352 if (sc->nopp == -1) 353 return (ENXIO); 354 355 if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) 356 lat = CPUFREQ_VAL_UNKNOWN; 357 358 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 359 360 for (n = 0; n < sc->nopp; n++) { 361 sc->opp[n].freq = opp[n * 2 + 0] * 1000; 362 sc->opp[n].uvolt_min = opp[n * 2 + 1]; 363 sc->opp[n].uvolt_max = sc->opp[n].uvolt_min; 364 sc->opp[n].uvolt_target = sc->opp[n].uvolt_min; 365 sc->opp[n].clk_latency = lat; 366 367 if (bootverbose) 368 device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n", 369 sc->opp[n].freq / 1000000, 370 sc->opp[n].freq % 1000000, 371 sc->opp[n].uvolt_target); 372 } 373 free(opp, M_OFWPROP); 374 375 return (0); 376 } 377 378 static int 379 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node) 380 { 381 phandle_t opp, opp_table, opp_xref; 382 pcell_t cell[2]; 383 uint32_t *volts, lat; 384 int nvolt, i; 385 386 /* 387 * operating-points-v2 does not require the voltage entries 388 * and a regulator. So, it's OK if they're not there. 389 */ 390 if (OF_getencprop(node, "operating-points-v2", &opp_xref, 391 sizeof(opp_xref)) == -1) { 392 device_printf(sc->dev, "Cannot get xref to oppv2 table\n"); 393 return (ENXIO); 394 } 395 396 opp_table = OF_node_from_xref(opp_xref); 397 if (opp_table == opp_xref) 398 return (ENXIO); 399 400 if (!OF_hasprop(opp_table, "opp-shared")) { 401 device_printf(sc->dev, "Only opp-shared is supported\n"); 402 return (ENXIO); 403 } 404 405 for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp)) 406 sc->nopp += 1; 407 408 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 409 410 for (i = 0, opp_table = OF_child(opp_table); opp_table > 0; 411 opp_table = OF_peer(opp_table), i++) { 412 /* opp-hz is a required property */ 413 if (OF_getencprop(opp_table, "opp-hz", cell, 414 sizeof(cell)) == -1) 415 continue; 416 417 sc->opp[i].freq = cell[0]; 418 sc->opp[i].freq <<= 32; 419 sc->opp[i].freq |= cell[1]; 420 421 if (OF_getencprop(opp_table, "clock-latency", &lat, 422 sizeof(lat)) == -1) 423 sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN; 424 else 425 sc->opp[i].clk_latency = (int)lat; 426 427 if (OF_hasprop(opp_table, "turbo-mode")) 428 sc->opp[i].turbo_mode = true; 429 if (OF_hasprop(opp_table, "opp-suspend")) 430 sc->opp[i].opp_suspend = true; 431 432 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 433 nvolt = OF_getencprop_alloc_multi(opp_table, 434 "opp-microvolt", sizeof(*volts), (void **)&volts); 435 if (nvolt == 1) { 436 sc->opp[i].uvolt_target = volts[0]; 437 sc->opp[i].uvolt_min = volts[0]; 438 sc->opp[i].uvolt_max = volts[0]; 439 } else if (nvolt == 3) { 440 sc->opp[i].uvolt_target = volts[0]; 441 sc->opp[i].uvolt_min = volts[1]; 442 sc->opp[i].uvolt_max = volts[2]; 443 } else { 444 device_printf(sc->dev, 445 "Wrong count of opp-microvolt property\n"); 446 OF_prop_free(volts); 447 free(sc->opp, M_DEVBUF); 448 return (ENXIO); 449 } 450 OF_prop_free(volts); 451 } else { 452 /* No regulator required; don't add anything */ 453 sc->opp[i].uvolt_target = 0; 454 sc->opp[i].uvolt_min = 0; 455 sc->opp[i].uvolt_max = 0; 456 } 457 458 if (bootverbose) 459 device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n", 460 sc->opp[i].freq / 1000000, 461 sc->opp[i].freq % 1000000, 462 sc->opp[i].uvolt_target); 463 } 464 return (0); 465 } 466 467 static int 468 cpufreq_dt_attach(device_t dev) 469 { 470 struct cpufreq_dt_softc *sc; 471 phandle_t node; 472 phandle_t cnode, opp, copp; 473 int cpu; 474 uint64_t freq; 475 int rv = 0; 476 char device_type[16]; 477 enum opp_version version; 478 479 sc = device_get_softc(dev); 480 sc->dev = dev; 481 node = ofw_bus_get_node(device_get_parent(dev)); 482 sc->cpu = device_get_unit(device_get_parent(dev)); 483 sc->reg = NULL; 484 485 DPRINTF(dev, "cpu=%d\n", sc->cpu); 486 if (sc->cpu >= mp_ncpus) { 487 device_printf(dev, "Not attaching as cpu is not present\n"); 488 rv = ENXIO; 489 goto error; 490 } 491 492 /* 493 * Cache if we have the regulator supply but don't error out 494 * quite yet. If it's operating-points-v2 then regulator 495 * and voltage entries are optional. 496 */ 497 if (regulator_get_by_ofw_property(dev, node, "cpu-supply", 498 &sc->reg) == 0) 499 device_printf(dev, "Found cpu-supply\n"); 500 else if (regulator_get_by_ofw_property(dev, node, "cpu0-supply", 501 &sc->reg) == 0) 502 device_printf(dev, "Found cpu0-supply\n"); 503 504 /* 505 * Determine which operating mode we're in. Error out if we expect 506 * a regulator but we're not getting it. 507 */ 508 if (OF_hasprop(node, "operating-points")) 509 version = OPP_V1; 510 else if (OF_hasprop(node, "operating-points-v2")) 511 version = OPP_V2; 512 else { 513 device_printf(dev, 514 "didn't find a valid operating-points or v2 node\n"); 515 rv = ENXIO; 516 goto error; 517 } 518 519 /* 520 * Now, we only enforce needing a regulator for v1. 521 */ 522 if ((version == OPP_V1) && !CPUFREQ_DT_HAVE_REGULATOR(sc)) { 523 device_printf(dev, "no regulator for %s\n", 524 ofw_bus_get_name(device_get_parent(dev))); 525 rv = ENXIO; 526 goto error; 527 } 528 529 if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { 530 device_printf(dev, "no clock for %s\n", 531 ofw_bus_get_name(device_get_parent(dev))); 532 rv = ENXIO; 533 goto error; 534 } 535 536 if (version == OPP_V1) { 537 rv = cpufreq_dt_oppv1_parse(sc, node); 538 if (rv != 0) { 539 device_printf(dev, "Failed to parse opp-v1 table\n"); 540 goto error; 541 } 542 OF_getencprop(node, "operating-points", &opp, 543 sizeof(opp)); 544 } else if (version == OPP_V2) { 545 rv = cpufreq_dt_oppv2_parse(sc, node); 546 if (rv != 0) { 547 device_printf(dev, "Failed to parse opp-v2 table\n"); 548 goto error; 549 } 550 OF_getencprop(node, "operating-points-v2", &opp, 551 sizeof(opp)); 552 } else { 553 device_printf(dev, "operating points version is incorrect\n"); 554 goto error; 555 } 556 557 /* 558 * Find all CPUs that share the same opp table 559 */ 560 CPU_ZERO(&sc->cpus); 561 cnode = OF_parent(node); 562 for (cpu = 0, cnode = OF_child(cnode); cnode > 0; cnode = OF_peer(cnode)) { 563 if (OF_getprop(cnode, "device_type", device_type, sizeof(device_type)) <= 0) 564 continue; 565 if (strcmp(device_type, "cpu") != 0) 566 continue; 567 if (cpu == sc->cpu) { 568 DPRINTF(dev, "Skipping our cpu\n"); 569 CPU_SET(cpu, &sc->cpus); 570 cpu++; 571 continue; 572 } 573 DPRINTF(dev, "Testing CPU %d\n", cpu); 574 copp = -1; 575 if (version == OPP_V1) 576 OF_getencprop(cnode, "operating-points", &copp, 577 sizeof(copp)); 578 else if (version == OPP_V2) 579 OF_getencprop(cnode, "operating-points-v2", 580 &copp, sizeof(copp)); 581 if (opp == copp) { 582 DPRINTF(dev, "CPU %d is using the same opp as this one (%d)\n", 583 cpu, sc->cpu); 584 CPU_SET(cpu, &sc->cpus); 585 } 586 cpu++; 587 } 588 589 if (clk_get_freq(sc->clk, &freq) == 0) 590 cpufreq_dt_notify(dev, freq); 591 592 cpufreq_register(dev); 593 594 return (0); 595 error: 596 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 597 regulator_release(sc->reg); 598 return (rv); 599 } 600 601 static device_method_t cpufreq_dt_methods[] = { 602 /* Device interface */ 603 DEVMETHOD(device_identify, cpufreq_dt_identify), 604 DEVMETHOD(device_probe, cpufreq_dt_probe), 605 DEVMETHOD(device_attach, cpufreq_dt_attach), 606 607 /* cpufreq interface */ 608 DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), 609 DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), 610 DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), 611 DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), 612 613 DEVMETHOD_END 614 }; 615 616 static driver_t cpufreq_dt_driver = { 617 "cpufreq_dt", 618 cpufreq_dt_methods, 619 sizeof(struct cpufreq_dt_softc), 620 }; 621 622 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, 0, 0); 623 MODULE_VERSION(cpufreq_dt, 1);
Cache object: c5b0e3b1e1e8fefa60657b19d0cd0dcf
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