Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/cpufreq/cpufreq_dt.c
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1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Generic DT based cpufreq driver 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/rman.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 #include <sys/cpu.h> 43 #include <sys/cpuset.h> 44 #include <sys/smp.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/extres/clk/clk.h> 50 #include <dev/extres/regulator/regulator.h> 51 52 #include "cpufreq_if.h" 53 54 #if 0 55 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 56 #else 57 #define DPRINTF(dev, msg...) 58 #endif 59 60 enum opp_version { 61 OPP_V1 = 1, 62 OPP_V2, 63 }; 64 65 struct cpufreq_dt_opp { 66 uint64_t freq; 67 uint32_t uvolt_target; 68 uint32_t uvolt_min; 69 uint32_t uvolt_max; 70 uint32_t uamps; 71 uint32_t clk_latency; 72 bool turbo_mode; 73 bool opp_suspend; 74 }; 75 76 struct cpufreq_dt_softc { 77 device_t dev; 78 clk_t clk; 79 regulator_t reg; 80 81 struct cpufreq_dt_opp *opp; 82 ssize_t nopp; 83 84 int cpu; 85 cpuset_t cpus; 86 }; 87 88 static void 89 cpufreq_dt_notify(device_t dev, uint64_t freq) 90 { 91 struct cpufreq_dt_softc *sc; 92 struct pcpu *pc; 93 int cpu; 94 95 sc = device_get_softc(dev); 96 97 CPU_FOREACH(cpu) { 98 if (CPU_ISSET(cpu, &sc->cpus)) { 99 pc = pcpu_find(cpu); 100 pc->pc_clock = freq; 101 } 102 } 103 } 104 105 static const struct cpufreq_dt_opp * 106 cpufreq_dt_find_opp(device_t dev, uint64_t freq) 107 { 108 struct cpufreq_dt_softc *sc; 109 ssize_t n; 110 111 sc = device_get_softc(dev); 112 113 DPRINTF(dev, "Looking for freq %ju\n", freq); 114 for (n = 0; n < sc->nopp; n++) 115 if (CPUFREQ_CMP(sc->opp[n].freq, freq)) 116 return (&sc->opp[n]); 117 118 DPRINTF(dev, "Couldn't find one\n"); 119 return (NULL); 120 } 121 122 static void 123 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, 124 struct cf_setting *set) 125 { 126 struct cpufreq_dt_softc *sc; 127 128 sc = device_get_softc(dev); 129 130 memset(set, 0, sizeof(*set)); 131 set->freq = opp->freq / 1000000; 132 set->volts = opp->uvolt_target / 1000; 133 set->power = CPUFREQ_VAL_UNKNOWN; 134 set->lat = opp->clk_latency; 135 set->dev = dev; 136 } 137 138 static int 139 cpufreq_dt_get(device_t dev, struct cf_setting *set) 140 { 141 struct cpufreq_dt_softc *sc; 142 const struct cpufreq_dt_opp *opp; 143 uint64_t freq; 144 145 sc = device_get_softc(dev); 146 147 DPRINTF(dev, "cpufreq_dt_get\n"); 148 if (clk_get_freq(sc->clk, &freq) != 0) 149 return (ENXIO); 150 151 opp = cpufreq_dt_find_opp(dev, freq); 152 if (opp == NULL) { 153 device_printf(dev, "Can't find the current freq in opp\n"); 154 return (ENOENT); 155 } 156 157 cpufreq_dt_opp_to_setting(dev, opp, set); 158 159 DPRINTF(dev, "Current freq %dMhz\n", set->freq); 160 return (0); 161 } 162 163 static int 164 cpufreq_dt_set(device_t dev, const struct cf_setting *set) 165 { 166 struct cpufreq_dt_softc *sc; 167 const struct cpufreq_dt_opp *opp, *copp; 168 uint64_t freq; 169 int uvolt, error; 170 171 sc = device_get_softc(dev); 172 173 DPRINTF(dev, "Working on cpu %d\n", sc->cpu); 174 DPRINTF(dev, "We have %d cpu on this dev\n", CPU_COUNT(&sc->cpus)); 175 if (!CPU_ISSET(sc->cpu, &sc->cpus)) { 176 DPRINTF(dev, "Not for this CPU\n"); 177 return (0); 178 } 179 180 if (clk_get_freq(sc->clk, &freq) != 0) { 181 device_printf(dev, "Can't get current clk freq\n"); 182 return (ENXIO); 183 } 184 /* Try to get current valtage by using regulator first. */ 185 error = regulator_get_voltage(sc->reg, &uvolt); 186 if (error != 0) { 187 /* 188 * Try oppoints table as backup way. However, 189 * this is insufficient because the actual processor 190 * frequency may not be in the table. PLL frequency 191 * granularity can be different that granularity of 192 * oppoint table. 193 */ 194 copp = cpufreq_dt_find_opp(sc->dev, freq); 195 if (copp == NULL) { 196 device_printf(dev, 197 "Can't find the current freq in opp\n"); 198 return (ENOENT); 199 } 200 uvolt = copp->uvolt_target; 201 } 202 203 opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000); 204 if (opp == NULL) { 205 device_printf(dev, "Couldn't find an opp for this freq\n"); 206 return (EINVAL); 207 } 208 DPRINTF(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt); 209 DPRINTF(sc->dev, "Target freq %ju, , uvolt: %d\n", 210 opp->freq, opp->uvolt_target); 211 212 if (uvolt < opp->uvolt_target) { 213 DPRINTF(dev, "Changing regulator from %u to %u\n", 214 uvolt, opp->uvolt_target); 215 error = regulator_set_voltage(sc->reg, 216 opp->uvolt_min, 217 opp->uvolt_max); 218 if (error != 0) { 219 DPRINTF(dev, "Failed, backout\n"); 220 return (ENXIO); 221 } 222 } 223 224 DPRINTF(dev, "Setting clk to %ju\n", opp->freq); 225 error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN); 226 if (error != 0) { 227 DPRINTF(dev, "Failed, backout\n"); 228 /* Restore previous voltage (best effort) */ 229 error = regulator_set_voltage(sc->reg, 230 copp->uvolt_min, 231 copp->uvolt_max); 232 return (ENXIO); 233 } 234 235 if (uvolt > opp->uvolt_target) { 236 DPRINTF(dev, "Changing regulator from %u to %u\n", 237 uvolt, opp->uvolt_target); 238 error = regulator_set_voltage(sc->reg, 239 opp->uvolt_min, 240 opp->uvolt_max); 241 if (error != 0) { 242 DPRINTF(dev, "Failed to switch regulator to %d\n", 243 opp->uvolt_target); 244 /* Restore previous CPU frequency (best effort) */ 245 (void)clk_set_freq(sc->clk, copp->freq, 0); 246 return (ENXIO); 247 } 248 } 249 250 if (clk_get_freq(sc->clk, &freq) == 0) 251 cpufreq_dt_notify(dev, freq); 252 253 return (0); 254 } 255 256 static int 257 cpufreq_dt_type(device_t dev, int *type) 258 { 259 if (type == NULL) 260 return (EINVAL); 261 262 *type = CPUFREQ_TYPE_ABSOLUTE; 263 return (0); 264 } 265 266 static int 267 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) 268 { 269 struct cpufreq_dt_softc *sc; 270 ssize_t n; 271 272 DPRINTF(dev, "cpufreq_dt_settings\n"); 273 if (sets == NULL || count == NULL) 274 return (EINVAL); 275 276 sc = device_get_softc(dev); 277 278 if (*count < sc->nopp) { 279 *count = (int)sc->nopp; 280 return (E2BIG); 281 } 282 283 for (n = 0; n < sc->nopp; n++) 284 cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); 285 286 *count = (int)sc->nopp; 287 288 return (0); 289 } 290 291 static void 292 cpufreq_dt_identify(driver_t *driver, device_t parent) 293 { 294 phandle_t node; 295 296 /* Properties must be listed under node /cpus/cpu@0 */ 297 node = ofw_bus_get_node(parent); 298 299 /* The cpu@0 node must have the following properties */ 300 if (!OF_hasprop(node, "clocks") || 301 (!OF_hasprop(node, "cpu-supply") && 302 !OF_hasprop(node, "cpu0-supply"))) 303 return; 304 305 if (!OF_hasprop(node, "operating-points") && 306 !OF_hasprop(node, "operating-points-v2")) 307 return; 308 309 if (device_find_child(parent, "cpufreq_dt", -1) != NULL) 310 return; 311 312 if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", -1) == NULL) 313 device_printf(parent, "add cpufreq_dt child failed\n"); 314 } 315 316 static int 317 cpufreq_dt_probe(device_t dev) 318 { 319 phandle_t node; 320 321 node = ofw_bus_get_node(device_get_parent(dev)); 322 323 if (!OF_hasprop(node, "clocks") || 324 (!OF_hasprop(node, "cpu-supply") && 325 !OF_hasprop(node, "cpu0-supply"))) 326 327 return (ENXIO); 328 329 if (!OF_hasprop(node, "operating-points") && 330 !OF_hasprop(node, "operating-points-v2")) 331 return (ENXIO); 332 333 device_set_desc(dev, "Generic cpufreq driver"); 334 return (BUS_PROBE_GENERIC); 335 } 336 337 static int 338 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node) 339 { 340 uint32_t *opp, lat; 341 ssize_t n; 342 343 sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", 344 sizeof(uint32_t) * 2, (void **)&opp); 345 if (sc->nopp == -1) 346 return (ENXIO); 347 348 if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) 349 lat = CPUFREQ_VAL_UNKNOWN; 350 351 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 352 353 for (n = 0; n < sc->nopp; n++) { 354 sc->opp[n].freq = opp[n * 2 + 0] * 1000; 355 sc->opp[n].uvolt_min = opp[n * 2 + 1]; 356 sc->opp[n].uvolt_max = sc->opp[n].uvolt_min; 357 sc->opp[n].uvolt_target = sc->opp[n].uvolt_min; 358 sc->opp[n].clk_latency = lat; 359 360 if (bootverbose) 361 device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n", 362 sc->opp[n].freq / 1000000, 363 sc->opp[n].freq % 1000000, 364 sc->opp[n].uvolt_target); 365 } 366 free(opp, M_OFWPROP); 367 368 return (0); 369 } 370 371 static int 372 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node) 373 { 374 phandle_t opp, opp_table, opp_xref; 375 pcell_t cell[2]; 376 uint32_t *volts, lat; 377 int nvolt, i; 378 379 if (OF_getencprop(node, "operating-points-v2", &opp_xref, 380 sizeof(opp_xref)) == -1) { 381 device_printf(sc->dev, "Cannot get xref to oppv2 table\n"); 382 return (ENXIO); 383 } 384 385 opp_table = OF_node_from_xref(opp_xref); 386 if (opp_table == opp_xref) 387 return (ENXIO); 388 389 if (!OF_hasprop(opp_table, "opp-shared")) { 390 device_printf(sc->dev, "Only opp-shared is supported\n"); 391 return (ENXIO); 392 } 393 394 for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp)) 395 sc->nopp += 1; 396 397 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 398 399 for (i = 0, opp_table = OF_child(opp_table); opp_table > 0; 400 opp_table = OF_peer(opp_table), i++) { 401 /* opp-hz is a required property */ 402 if (OF_getencprop(opp_table, "opp-hz", cell, 403 sizeof(cell)) == -1) 404 continue; 405 406 sc->opp[i].freq = cell[0]; 407 sc->opp[i].freq <<= 32; 408 sc->opp[i].freq |= cell[1]; 409 410 if (OF_getencprop(opp_table, "clock-latency", &lat, 411 sizeof(lat)) == -1) 412 sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN; 413 else 414 sc->opp[i].clk_latency = (int)lat; 415 416 if (OF_hasprop(opp_table, "turbo-mode")) 417 sc->opp[i].turbo_mode = true; 418 if (OF_hasprop(opp_table, "opp-suspend")) 419 sc->opp[i].opp_suspend = true; 420 421 nvolt = OF_getencprop_alloc_multi(opp_table, "opp-microvolt", 422 sizeof(*volts), (void **)&volts); 423 if (nvolt == 1) { 424 sc->opp[i].uvolt_target = volts[0]; 425 sc->opp[i].uvolt_min = volts[0]; 426 sc->opp[i].uvolt_max = volts[0]; 427 } else if (nvolt == 3) { 428 sc->opp[i].uvolt_target = volts[0]; 429 sc->opp[i].uvolt_min = volts[1]; 430 sc->opp[i].uvolt_max = volts[2]; 431 } else { 432 device_printf(sc->dev, 433 "Wrong count of opp-microvolt property\n"); 434 OF_prop_free(volts); 435 free(sc->opp, M_DEVBUF); 436 return (ENXIO); 437 } 438 OF_prop_free(volts); 439 440 if (bootverbose) 441 device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n", 442 sc->opp[i].freq / 1000000, 443 sc->opp[i].freq % 1000000, 444 sc->opp[i].uvolt_target); 445 } 446 return (0); 447 } 448 449 static int 450 cpufreq_dt_attach(device_t dev) 451 { 452 struct cpufreq_dt_softc *sc; 453 phandle_t node; 454 phandle_t cnode, opp, copp; 455 int cpu; 456 uint64_t freq; 457 int rv = 0; 458 char device_type[16]; 459 enum opp_version version; 460 461 sc = device_get_softc(dev); 462 sc->dev = dev; 463 node = ofw_bus_get_node(device_get_parent(dev)); 464 sc->cpu = device_get_unit(device_get_parent(dev)); 465 466 DPRINTF(dev, "cpu=%d\n", sc->cpu); 467 if (sc->cpu >= mp_ncpus) { 468 device_printf(dev, "Not attaching as cpu is not present\n"); 469 return (ENXIO); 470 } 471 472 if (regulator_get_by_ofw_property(dev, node, 473 "cpu-supply", &sc->reg) != 0) { 474 if (regulator_get_by_ofw_property(dev, node, 475 "cpu0-supply", &sc->reg) != 0) { 476 device_printf(dev, "no regulator for %s\n", 477 ofw_bus_get_name(device_get_parent(dev))); 478 return (ENXIO); 479 } 480 } 481 482 if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { 483 device_printf(dev, "no clock for %s\n", 484 ofw_bus_get_name(device_get_parent(dev))); 485 regulator_release(sc->reg); 486 return (ENXIO); 487 } 488 489 if (OF_hasprop(node, "operating-points")) { 490 version = OPP_V1; 491 rv = cpufreq_dt_oppv1_parse(sc, node); 492 if (rv != 0) { 493 device_printf(dev, "Failed to parse opp-v1 table\n"); 494 return (rv); 495 } 496 OF_getencprop(node, "operating-points", &opp, 497 sizeof(opp)); 498 } else { 499 version = OPP_V2; 500 rv = cpufreq_dt_oppv2_parse(sc, node); 501 if (rv != 0) { 502 device_printf(dev, "Failed to parse opp-v2 table\n"); 503 return (rv); 504 } 505 OF_getencprop(node, "operating-points-v2", &opp, 506 sizeof(opp)); 507 } 508 509 /* 510 * Find all CPUs that share the same opp table 511 */ 512 CPU_ZERO(&sc->cpus); 513 cnode = OF_parent(node); 514 for (cpu = 0, cnode = OF_child(cnode); cnode > 0; cnode = OF_peer(cnode)) { 515 if (OF_getprop(cnode, "device_type", device_type, sizeof(device_type)) <= 0) 516 continue; 517 if (strcmp(device_type, "cpu") != 0) 518 continue; 519 if (cpu == sc->cpu) { 520 DPRINTF(dev, "Skipping our cpu\n"); 521 CPU_SET(cpu, &sc->cpus); 522 cpu++; 523 continue; 524 } 525 DPRINTF(dev, "Testing CPU %d\n", cpu); 526 copp = -1; 527 if (version == OPP_V1) 528 OF_getencprop(cnode, "operating-points", &copp, 529 sizeof(copp)); 530 else if (version == OPP_V2) 531 OF_getencprop(cnode, "operating-points-v2", 532 &copp, sizeof(copp)); 533 if (opp == copp) { 534 DPRINTF(dev, "CPU %d is using the same opp as this one (%d)\n", 535 cpu, sc->cpu); 536 CPU_SET(cpu, &sc->cpus); 537 } 538 cpu++; 539 } 540 541 if (clk_get_freq(sc->clk, &freq) == 0) 542 cpufreq_dt_notify(dev, freq); 543 544 cpufreq_register(dev); 545 546 return (0); 547 } 548 549 static device_method_t cpufreq_dt_methods[] = { 550 /* Device interface */ 551 DEVMETHOD(device_identify, cpufreq_dt_identify), 552 DEVMETHOD(device_probe, cpufreq_dt_probe), 553 DEVMETHOD(device_attach, cpufreq_dt_attach), 554 555 /* cpufreq interface */ 556 DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), 557 DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), 558 DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), 559 DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), 560 561 DEVMETHOD_END 562 }; 563 564 static driver_t cpufreq_dt_driver = { 565 "cpufreq_dt", 566 cpufreq_dt_methods, 567 sizeof(struct cpufreq_dt_softc), 568 }; 569 570 static devclass_t cpufreq_dt_devclass; 571 572 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, cpufreq_dt_devclass, 0, 0); 573 MODULE_VERSION(cpufreq_dt, 1);
Cache object: d0bdb0dad3b2ece610ecaf7f48d93a73
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