Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/ct/ct_isa.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /* $FreeBSD: releng/5.1/sys/dev/ct/ct_isa.c 114562 2003-05-03 02:04:58Z nyan $ */ 2 /* $NecBSD: ct_isa.c,v 1.6 1999/07/26 06:32:01 honda Exp $ */ 3 /* $NetBSD$ */ 4 5 /* 6 * [NetBSD for NEC PC-98 series] 7 * Copyright (c) 1995, 1996, 1997, 1998 8 * NetBSD/pc98 porting staff. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #define SCSIBUS_RESCAN 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/bio.h> 40 #include <sys/buf.h> 41 #include <sys/queue.h> 42 #include <sys/malloc.h> 43 #include <sys/device_port.h> 44 #include <sys/errno.h> 45 46 #include <vm/vm.h> 47 48 #ifdef __NetBSD__ 49 #include <machine/bus.h> 50 #include <machine/intr.h> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsipi_all.h> 54 #include <dev/scsipi/scsiconf.h> 55 #include <dev/scsipi/scsi_disk.h> 56 57 #include <dev/isa/isareg.h> 58 #include <dev/isa/isavar.h> 59 #include <dev/isa/isadmavar.h> 60 61 #include <machine/dvcfg.h> 62 #include <machine/physio_proc.h> 63 #include <machine/syspmgr.h> 64 65 #include <i386/Cbus/dev/scsi_low.h> 66 67 #include <dev/ic/wd33c93reg.h> 68 #include <i386/Cbus/dev/ct/ctvar.h> 69 #include <i386/Cbus/dev/ct/bshwvar.h> 70 #endif /* __NetBSD__ */ 71 72 #ifdef __FreeBSD__ 73 #include <machine/bus.h> 74 #include <machine/resource.h> 75 #include <sys/bus.h> 76 #include <sys/rman.h> 77 #include <machine/md_var.h> 78 79 #include <pc98/pc98/pc98.h> 80 #include <isa/isavar.h> 81 82 #include <machine/dvcfg.h> 83 #include <machine/physio_proc.h> 84 85 #include <cam/scsi/scsi_low.h> 86 87 #include <dev/ic/wd33c93reg.h> 88 #include <dev/ct/ctvar.h> 89 #include <dev/ct/bshwvar.h> 90 #endif /* __FreeBSD__ */ 91 92 #define BSHW_IOSZ 0x08 93 #define BSHW_IOBASE 0xcc0 94 #define BSHW_MEMSZ (PAGE_SIZE * 2) 95 96 static int ct_isa_match(device_t); 97 static int ct_isa_attach(device_t); 98 static int ct_space_map(device_t, struct bshw *, 99 struct resource **, struct resource **); 100 static void ct_space_unmap(device_t, struct ct_softc *); 101 static struct bshw *ct_find_hw(device_t); 102 static void ct_dmamap(void *, bus_dma_segment_t *, int, int); 103 static void ct_isa_bus_access_weight(struct ct_bus_access_handle *); 104 static void ct_isa_dmasync_before(struct ct_softc *); 105 static void ct_isa_dmasync_after(struct ct_softc *); 106 107 struct ct_isa_softc { 108 struct ct_softc sc_ct; 109 struct bshw_softc sc_bshw; 110 }; 111 112 static struct isa_pnp_id ct_pnp_ids[] = { 113 { 0x0100e7b1, "Logitec LHA-301" }, 114 { 0x110154dc, "I-O DATA SC-98III" }, 115 { 0x4120acb4, "MELCO IFC-NN" }, 116 { 0, NULL } 117 }; 118 119 static device_method_t ct_isa_methods[] = { 120 /* Device interface */ 121 DEVMETHOD(device_probe, ct_isa_match), 122 DEVMETHOD(device_attach, ct_isa_attach), 123 { 0, 0 } 124 }; 125 126 static driver_t ct_isa_driver = { 127 "ct", ct_isa_methods, sizeof(struct ct_isa_softc), 128 }; 129 130 static devclass_t ct_devclass; 131 132 DRIVER_MODULE(ct, isa, ct_isa_driver, ct_devclass, 0, 0); 133 134 static int 135 ct_isa_match(device_t dev) 136 { 137 struct bshw *hw; 138 struct resource *port_res, *mem_res; 139 struct ct_bus_access_handle ch; 140 int rv; 141 142 if (ISA_PNP_PROBE(device_get_parent(dev), dev, ct_pnp_ids) == ENXIO) 143 return ENXIO; 144 145 switch (isa_get_logicalid(dev)) { 146 case 0x0100e7b1: /* LHA-301 */ 147 case 0x110154dc: /* SC-98III */ 148 case 0x4120acb4: /* IFC-NN */ 149 /* XXX - force to SMIT mode */ 150 device_set_flags(dev, device_get_flags(dev) | 0x40000); 151 break; 152 } 153 154 if (isa_get_port(dev) == -1) 155 bus_set_resource(dev, SYS_RES_IOPORT, 0, 156 BSHW_IOBASE, BSHW_IOSZ); 157 158 if ((hw = ct_find_hw(dev)) == NULL) 159 return ENXIO; 160 if (ct_space_map(dev, hw, &port_res, &mem_res) != 0) 161 return ENXIO; 162 163 bzero(&ch, sizeof(ch)); 164 ch.ch_iot = rman_get_bustag(port_res); 165 ch.ch_ioh = rman_get_bushandle(port_res), 166 ch.ch_bus_weight = ct_isa_bus_access_weight; 167 168 rv = ctprobesubr(&ch, 0, BSHW_DEFAULT_HOSTID, 169 BSHW_DEFAULT_CHIPCLK, NULL); 170 if (rv != 0) 171 { 172 struct bshw_softc bshw_tab; 173 struct bshw_softc *bs = &bshw_tab; 174 175 memset(bs, 0, sizeof(*bs)); 176 bshw_read_settings(&ch, bs); 177 bus_set_resource(dev, SYS_RES_IRQ, 0, bs->sc_irq, 1); 178 bus_set_resource(dev, SYS_RES_DRQ, 0, bs->sc_drq, 1); 179 } 180 181 bus_release_resource(dev, SYS_RES_IOPORT, 0, port_res); 182 if (mem_res != NULL) 183 bus_release_resource(dev, SYS_RES_MEMORY, 0, mem_res); 184 185 if (rv != 0) 186 return 0; 187 return ENXIO; 188 } 189 190 static int 191 ct_isa_attach(device_t dev) 192 { 193 struct ct_isa_softc *pct = device_get_softc(dev); 194 struct ct_softc *ct = &pct->sc_ct; 195 struct ct_bus_access_handle *chp = &ct->sc_ch; 196 struct scsi_low_softc *slp = &ct->sc_sclow; 197 struct bshw_softc *bs = &pct->sc_bshw; 198 struct bshw *hw; 199 int irq_rid, drq_rid, chiprev; 200 u_int8_t *vaddr; 201 bus_addr_t addr; 202 intrmask_t s; 203 204 hw = ct_find_hw(dev); 205 if (ct_space_map(dev, hw, &ct->port_res, &ct->mem_res) != 0) { 206 device_printf(dev, "bus io mem map failed\n"); 207 return ENXIO; 208 } 209 210 bzero(chp, sizeof(*chp)); 211 chp->ch_iot = rman_get_bustag(ct->port_res); 212 chp->ch_ioh = rman_get_bushandle(ct->port_res); 213 if (ct->mem_res) { 214 chp->ch_memt = rman_get_bustag(ct->mem_res); 215 chp->ch_memh = rman_get_bushandle(ct->mem_res); 216 } 217 chp->ch_bus_weight = ct_isa_bus_access_weight; 218 219 irq_rid = 0; 220 ct->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &irq_rid, 0, ~0, 221 1, RF_ACTIVE); 222 drq_rid = 0; 223 ct->drq_res = bus_alloc_resource(dev, SYS_RES_DRQ, &drq_rid, 0, ~0, 224 1, RF_ACTIVE); 225 if (ct->irq_res == NULL || ct->drq_res == NULL) { 226 ct_space_unmap(dev, ct); 227 return ENXIO; 228 } 229 230 if (ctprobesubr(chp, 0, BSHW_DEFAULT_HOSTID, 231 BSHW_DEFAULT_CHIPCLK, &chiprev) == 0) 232 { 233 device_printf(dev, "hardware missing\n"); 234 ct_space_unmap(dev, ct); 235 return ENXIO; 236 } 237 238 /* setup DMA map */ 239 if (bus_dma_tag_create(NULL, 1, 0, 240 BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR, 241 NULL, NULL, MAXBSIZE, 1, 242 BUS_SPACE_MAXSIZE_32BIT, 243 BUS_DMA_ALLOCNOW, &ct->sc_dmat) != 0) { 244 device_printf(dev, "can't set up ISA DMA map\n"); 245 ct_space_unmap(dev, ct); 246 return ENXIO; 247 } 248 249 if (bus_dmamem_alloc(ct->sc_dmat, (void **)&vaddr, BUS_DMA_NOWAIT, 250 &ct->sc_dmamapt) != 0) { 251 device_printf(dev, "can't set up ISA DMA map\n"); 252 ct_space_unmap(dev, ct); 253 return ENXIO; 254 } 255 256 bus_dmamap_load(ct->sc_dmat, ct->sc_dmamapt, vaddr, MAXBSIZE, 257 ct_dmamap, &addr, 0); 258 259 /* setup machdep softc */ 260 bs->sc_hw = hw; 261 bs->sc_io_control = 0; 262 bs->sc_bounce_phys = (u_int8_t *)addr; 263 bs->sc_bounce_addr = vaddr; 264 bs->sc_bounce_size = MAXBSIZE; 265 bs->sc_minphys = (1 << 24); 266 bs->sc_dmasync_before = ct_isa_dmasync_before; 267 bs->sc_dmasync_after = ct_isa_dmasync_after; 268 bshw_read_settings(chp, bs); 269 270 /* setup ct driver softc */ 271 ct->ct_hw = bs; 272 ct->ct_dma_xfer_start = bshw_dma_xfer_start; 273 ct->ct_pio_xfer_start = bshw_smit_xfer_start; 274 ct->ct_dma_xfer_stop = bshw_dma_xfer_stop; 275 ct->ct_pio_xfer_stop = bshw_smit_xfer_stop; 276 ct->ct_bus_reset = bshw_bus_reset; 277 ct->ct_synch_setup = bshw_synch_setup; 278 279 ct->sc_xmode = CT_XMODE_DMA; 280 if (chp->ch_memh != NULL) 281 ct->sc_xmode |= CT_XMODE_PIO; 282 283 ct->sc_chiprev = chiprev; 284 switch (chiprev) 285 { 286 case CT_WD33C93: 287 /* s = "WD33C93"; */ 288 ct->sc_chipclk = 8; 289 break; 290 case CT_WD33C93_A: 291 if (DVCFG_MAJOR(device_get_flags(dev)) > 0) 292 { 293 /* s = "AM33C93_A"; */ 294 ct->sc_chipclk = 20; 295 ct->sc_chiprev = CT_AM33C93_A; 296 } 297 else 298 { 299 /* s = "WD33C93_A"; */ 300 ct->sc_chipclk = 10; 301 } 302 break; 303 304 case CT_AM33C93_A: 305 /* s = "AM33C93_A"; */ 306 ct->sc_chipclk = 20; 307 break; 308 309 default: 310 case CT_WD33C93_B: 311 /* s = "WD33C93_B"; */ 312 ct->sc_chipclk = 20; 313 break; 314 } 315 #if 0 316 printf("%s: chiprev %s chipclk %d Mhz\n", 317 slp->sl_dev.dv_xname, s, ct->sc_chipclk); 318 #endif 319 320 slp->sl_dev = dev; 321 slp->sl_hostid = bs->sc_hostid; 322 slp->sl_irq = isa_get_irq(dev); 323 slp->sl_cfgflags = device_get_flags(dev); 324 325 s = splcam(); 326 ctattachsubr(ct); 327 splx(s); 328 329 if (bus_setup_intr(dev, ct->irq_res, INTR_TYPE_CAM, 330 (driver_intr_t *)ctintr, ct, &ct->sc_ih)) { 331 ct_space_unmap(dev, ct); 332 return ENXIO; 333 } 334 335 return 0; 336 } 337 338 static struct bshw * 339 ct_find_hw(device_t dev) 340 { 341 return DVCFG_HW(&bshw_hwsel, DVCFG_MAJOR(device_get_flags(dev))); 342 } 343 344 static int 345 ct_space_map(device_t dev, struct bshw *hw, 346 struct resource **iohp, struct resource **memhp) 347 { 348 int port_rid, mem_rid; 349 350 *memhp = NULL; 351 352 port_rid = 0; 353 *iohp = bus_alloc_resource(dev, SYS_RES_IOPORT, &port_rid, 0, ~0, 354 BSHW_IOSZ, RF_ACTIVE); 355 if (*iohp == NULL) 356 return ENXIO; 357 358 if ((hw->hw_flags & BSHW_SMFIFO) == 0 || isa_get_maddr(dev) == -1) 359 return 0; 360 361 mem_rid = 0; 362 *memhp = bus_alloc_resource(dev, SYS_RES_MEMORY, &mem_rid, 0, ~0, 363 BSHW_MEMSZ, RF_ACTIVE); 364 if (*memhp == NULL) { 365 bus_release_resource(dev, SYS_RES_IOPORT, port_rid, *iohp); 366 return ENXIO; 367 } 368 369 return 0; 370 } 371 372 static void 373 ct_space_unmap(device_t dev, struct ct_softc *ct) 374 { 375 if (ct->port_res != NULL) 376 bus_release_resource(dev, SYS_RES_IOPORT, 0, ct->port_res); 377 if (ct->mem_res != NULL) 378 bus_release_resource(dev, SYS_RES_MEMORY, 0, ct->mem_res); 379 if (ct->irq_res != NULL) 380 bus_release_resource(dev, SYS_RES_IRQ, 0, ct->irq_res); 381 if (ct->drq_res != NULL) 382 bus_release_resource(dev, SYS_RES_DRQ, 0, ct->drq_res); 383 } 384 385 static void 386 ct_dmamap(void *arg, bus_dma_segment_t *seg, int nseg, int error) 387 { 388 bus_addr_t *addr = (bus_addr_t *)arg; 389 390 *addr = seg->ds_addr; 391 } 392 393 static void 394 ct_isa_bus_access_weight(chp) 395 struct ct_bus_access_handle *chp; 396 { 397 398 outb(0x5f, 0); 399 } 400 401 static void 402 ct_isa_dmasync_before(ct) 403 struct ct_softc *ct; 404 { 405 406 if (need_pre_dma_flush) 407 wbinvd(); 408 } 409 410 static void 411 ct_isa_dmasync_after(ct) 412 struct ct_softc *ct; 413 { 414 415 if (need_post_dma_flush) 416 invd(); 417 }
Cache object: 90e6aa42653822d393a62f8101868f66
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]