The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ct/ctvar.h

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    1 /* $FreeBSD: releng/11.2/sys/dev/ct/ctvar.h 274760 2014-11-20 20:50:05Z jhb $ */
    2 /*      $NecBSD: ctvar.h,v 1.4.14.3 2001/06/20 06:13:34 honda Exp $     */
    3 /*      $NetBSD$        */
    4 
    5 /*-
    6  * [NetBSD for NEC PC-98 series]
    7  *  Copyright (c) 1995, 1996, 1997, 1998, 1999, 2000, 2001
    8  *      NetBSD/pc98 porting staff. All rights reserved.
    9  *  Copyright (c) 1995, 1996, 1997, 1998, 1999, 2000, 2001
   10  *      Naofumi HONDA. All rights reserved.
   11  * 
   12  *  Redistribution and use in source and binary forms, with or without
   13  *  modification, are permitted provided that the following conditions
   14  *  are met:
   15  *  1. Redistributions of source code must retain the above copyright
   16  *     notice, this list of conditions and the following disclaimer.
   17  *  2. Redistributions in binary form must reproduce the above copyright
   18  *     notice, this list of conditions and the following disclaimer in the
   19  *     documentation and/or other materials provided with the distribution.
   20  *  3. The name of the author may not be used to endorse or promote products
   21  *     derived from this software without specific prior written permission.
   22  * 
   23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   26  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   27  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   29  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   31  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   32  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   33  * POSSIBILITY OF SUCH DAMAGE.
   34  */
   35 
   36 #ifndef _CTVAR_H_
   37 #define _CTVAR_H_
   38 /*
   39  * ctvar.h
   40  * Generic wd33c93 chip driver's definitions
   41  */
   42 
   43 /*****************************************************************
   44  * Host adapter structure
   45  *****************************************************************/
   46 struct ct_bus_access_handle {
   47         struct resource *ch_io;                 /* core chip ctrl port */
   48         struct resource *ch_mem;                /* data port (shm) */
   49 
   50         void (*ch_bus_weight)(struct ct_bus_access_handle *);
   51 
   52 #ifdef  CT_USE_RELOCATE_OFFSET
   53         bus_addr_t ch_offset[4];
   54 #endif  /* CT_USE_RELOCATE_OFFSET */
   55 };
   56 
   57 struct ct_softc {
   58         struct scsi_low_softc sc_sclow;         /* generic data */
   59 
   60         struct ct_bus_access_handle sc_ch;      /* bus access handle */
   61 
   62         struct resource *port_res;
   63         struct resource *mem_res;
   64         struct resource *irq_res;
   65         struct resource *drq_res;
   66 
   67         bus_dma_tag_t sc_dmat;                  /* data DMA tag */
   68         bus_dmamap_t sc_dmamapt;                /* data DMAMAP tag */
   69 
   70         void *sc_ih;
   71 
   72         int sc_chiprev;                 /* chip version */      
   73 #define CT_WD33C93                      0x00000
   74 #define CT_WD33C93_A                    0x10000
   75 #define CT_AM33C93_A                    0x10001
   76 #define CT_WD33C93_B                    0x20000
   77 #define CT_WD33C93_C                    0x30000
   78 
   79         int sc_xmode;
   80 #define CT_XMODE_PIO                    1
   81 #define CT_XMODE_DMA                    2
   82 
   83         int sc_dma;                     /* dma transfer start */
   84 #define CT_DMA_PIOSTART                 1
   85 #define CT_DMA_DMASTART                 2
   86 
   87         int sc_satgo;                   /* combination cmd start */
   88 #define CT_SAT_GOING                    1
   89 
   90         int sc_tmaxcnt;
   91         int sc_atten;                   /* attention */
   92         u_int8_t sc_creg;               /* control register value */
   93 
   94         int sc_chipclk;                 /* chipclk 0, 10, 15, 20 */
   95         struct ct_synch_data {
   96                 u_int cs_period;
   97                 u_int cs_syncr;
   98         } *sc_sdp;                      /* synchronous data table pt */
   99 
  100         struct ct_synch_data sc_default_sdt[16];
  101 
  102         /*
  103          * Machdep stuff.
  104          */
  105         void *ct_hw;                    /* point to bshw_softc etc ... */
  106         int (*ct_dma_xfer_start)(struct ct_softc *);
  107         int (*ct_pio_xfer_start)(struct ct_softc *);
  108         void (*ct_dma_xfer_stop)(struct ct_softc *);
  109         void (*ct_pio_xfer_stop)(struct ct_softc *);
  110         void (*ct_bus_reset)(struct ct_softc *);
  111         void (*ct_synch_setup)(struct ct_softc *, struct targ_info *);
  112 };
  113 
  114 /*****************************************************************
  115  * Lun information 
  116  *****************************************************************/
  117 struct ct_targ_info {
  118         struct targ_info cti_ti;
  119         
  120         u_int8_t cti_syncreg;
  121 };
  122 
  123 /*****************************************************************
  124  * PROTO
  125  *****************************************************************/
  126 int ctprobesubr(struct ct_bus_access_handle *, u_int, int, u_int, int *);
  127 void ctattachsubr(struct ct_softc *);
  128 void ctintr(void *);
  129 #endif  /* !_CTVAR_H_ */

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