The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/cxgb/cxgb_ioctl.h

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    1 /**************************************************************************
    2 
    3 Copyright (c) 2007-2008, Chelsio Inc.
    4 All rights reserved.
    5 
    6 Redistribution and use in source and binary forms, with or without
    7 modification, are permitted provided that the following conditions are met:
    8 
    9  1. Redistributions of source code must retain the above copyright notice,
   10     this list of conditions and the following disclaimer.
   11 
   12  2. Neither the name of the Chelsio Corporation nor the names of its
   13     contributors may be used to endorse or promote products derived from
   14     this software without specific prior written permission.
   15 
   16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   26 POSSIBILITY OF SUCH DAMAGE.
   27 
   28 $FreeBSD$
   29 
   30 ***************************************************************************/
   31 #ifndef __CHIOCTL_H__
   32 #define __CHIOCTL_H__
   33 
   34 /*
   35  * Ioctl commands specific to this driver.
   36  */
   37 enum {
   38         CH_SETREG = 0x40,
   39         CH_GETREG,
   40         CH_GETMTUTAB,
   41         CH_SETMTUTAB,
   42         CH_SET_PM,
   43         CH_GET_PM,
   44         CH_READ_TCAM_WORD,
   45         CH_GET_MEM,
   46         CH_GET_SGE_CONTEXT,
   47         CH_GET_SGE_DESC,
   48         CH_LOAD_FW,
   49         CH_SET_TRACE_FILTER,
   50         CH_GET_QSET_PARAMS,
   51         CH_GET_QSET_NUM,
   52         CH_SET_PKTSCHED,
   53         CH_IFCONF_GETREGS,
   54         CH_GET_MIIREG,
   55         CH_SET_MIIREG,
   56         CH_GET_EEPROM,
   57         CH_SET_HW_SCHED,
   58         CH_LOAD_BOOT,
   59         CH_CLEAR_STATS,
   60 };
   61 
   62 /* statistics categories */
   63 enum {
   64         STATS_PORT  = 1 << 1,
   65         STATS_QUEUE = 1 << 2,
   66 };
   67  
   68 struct ch_reg {
   69         uint32_t addr;
   70         uint32_t val;
   71 };
   72 
   73 struct ch_cntxt {
   74         uint32_t cntxt_type;
   75         uint32_t cntxt_id;
   76         uint32_t data[4];
   77 };
   78 
   79 /* context types */
   80 enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ };
   81 
   82 struct ch_desc {
   83         uint32_t queue_num;
   84         uint32_t idx;
   85         uint32_t size;
   86         uint8_t  data[128];
   87 };
   88 
   89 struct ch_mem_range {
   90         uint32_t mem_id;
   91         uint32_t addr;
   92         uint32_t len;
   93         uint32_t version;
   94         uint8_t  *buf;
   95 };
   96 
   97 enum { MEM_CM, MEM_PMRX, MEM_PMTX };   /* ch_mem_range.mem_id values */
   98 
   99 struct ch_qset_params {
  100         uint32_t qset_idx;
  101         int32_t  txq_size[3];
  102         int32_t  rspq_size;
  103         int32_t  fl_size[2];
  104         int32_t  intr_lat;
  105         int32_t  polling;
  106         int32_t  lro;
  107         int32_t  cong_thres;
  108         int32_t  vector;
  109         int32_t  qnum;
  110 };
  111 
  112 struct ch_pktsched_params {
  113         uint8_t  sched;
  114         uint8_t  idx;
  115         uint8_t  min;
  116         uint8_t  max;
  117         uint8_t  binding;
  118 };
  119 
  120 struct ch_hw_sched {
  121         uint8_t  sched;
  122         int8_t   mode;
  123         int8_t   channel;
  124         int32_t  kbps;        /* rate in Kbps */
  125         int32_t  class_ipg;   /* tenths of nanoseconds */
  126         int32_t  flow_ipg;    /* usec */
  127 };
  128 
  129 struct ch_mtus {
  130         uint32_t nmtus;
  131         uint16_t mtus[NMTUS];
  132 };
  133 
  134 struct ch_pm {
  135         uint32_t tx_pg_sz;
  136         uint32_t tx_num_pg;
  137         uint32_t rx_pg_sz;
  138         uint32_t rx_num_pg;
  139         uint32_t pm_total;
  140 };
  141 
  142 struct ch_tcam_word {
  143         uint32_t addr;
  144         uint32_t buf[3];
  145 };
  146 
  147 struct ch_trace {
  148         uint32_t sip;
  149         uint32_t sip_mask;
  150         uint32_t dip;
  151         uint32_t dip_mask;
  152         uint16_t sport;
  153         uint16_t sport_mask;
  154         uint16_t dport;
  155         uint16_t dport_mask;
  156         uint32_t vlan:12;
  157         uint32_t vlan_mask:12;
  158         uint32_t intf:4;
  159         uint32_t intf_mask:4;
  160         uint8_t  proto;
  161         uint8_t  proto_mask;
  162         uint8_t  invert_match:1;
  163         uint8_t  config_tx:1;
  164         uint8_t  config_rx:1;
  165         uint8_t  trace_tx:1;
  166         uint8_t  trace_rx:1;
  167 };
  168 
  169 #define REGDUMP_SIZE  (4 * 1024)
  170 
  171 struct ch_ifconf_regs {
  172         uint32_t  version;
  173         uint32_t  len; /* bytes */
  174         uint8_t   *data;
  175 };
  176 
  177 struct ch_mii_data {
  178         uint32_t phy_id;
  179         uint32_t reg_num;
  180         uint32_t val_in;
  181         uint32_t val_out;
  182 };
  183 
  184 struct ch_eeprom {
  185         uint32_t magic;
  186         uint32_t offset;
  187         uint32_t len;
  188         uint8_t  *data;
  189 };
  190 
  191 #define CHELSIO_SETREG          _IOW('f', CH_SETREG, struct ch_reg)
  192 #define CHELSIO_GETREG          _IOWR('f', CH_GETREG, struct ch_reg)
  193 #define CHELSIO_GETMTUTAB       _IOR('f', CH_GETMTUTAB, struct ch_mtus)
  194 #define CHELSIO_SETMTUTAB       _IOW('f', CH_SETMTUTAB, struct ch_mtus)
  195 #define CHELSIO_SET_PM          _IOW('f', CH_SET_PM, struct ch_pm)
  196 #define CHELSIO_GET_PM          _IOR('f', CH_GET_PM, struct ch_pm)
  197 #define CHELSIO_READ_TCAM_WORD  _IOWR('f', CH_READ_TCAM_WORD, struct ch_tcam_word)
  198 #define CHELSIO_GET_MEM         _IOWR('f', CH_GET_MEM, struct ch_mem_range)
  199 #define CHELSIO_GET_SGE_CONTEXT _IOWR('f', CH_GET_SGE_CONTEXT, struct ch_cntxt)
  200 #define CHELSIO_GET_SGE_DESC    _IOWR('f', CH_GET_SGE_DESC, struct ch_desc)
  201 #define CHELSIO_LOAD_FW         _IOWR('f', CH_LOAD_FW, struct ch_mem_range)
  202 #define CHELSIO_SET_TRACE_FILTER _IOW('f', CH_SET_TRACE_FILTER, struct ch_trace)
  203 #define CHELSIO_GET_QSET_PARAMS _IOWR('f', CH_GET_QSET_PARAMS, struct ch_qset_params)
  204 #define CHELSIO_GET_QSET_NUM    _IOR('f', CH_GET_QSET_NUM, struct ch_reg)
  205 #define CHELSIO_SET_PKTSCHED    _IOW('f', CH_SET_PKTSCHED, struct ch_pktsched_params)
  206 #define CHELSIO_SET_HW_SCHED    _IOW('f', CH_SET_HW_SCHED, struct ch_hw_sched)
  207 #define CHELSIO_LOAD_BOOT       _IOW('f', CH_LOAD_BOOT, struct ch_mem_range)
  208 #define CHELSIO_CLEAR_STATS     _IO('f', CH_CLEAR_STATS)
  209 #define CHELSIO_IFCONF_GETREGS  _IOWR('f', CH_IFCONF_GETREGS, struct ch_ifconf_regs)
  210 #define CHELSIO_GET_MIIREG      _IOWR('f', CH_GET_MIIREG, struct ch_mii_data)
  211 #define CHELSIO_SET_MIIREG      _IOW('f', CH_SET_MIIREG, struct ch_mii_data)
  212 #define CHELSIO_GET_EEPROM      _IOWR('f', CH_GET_EEPROM, struct ch_eeprom)
  213 #endif

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