The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/cxgbe/t4_smt.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2018 Chelsio Communications, Inc.
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  * $FreeBSD$
   29  *
   30  */
   31 
   32 #ifndef __T4_SMT_H
   33 #define __T4_SMT_H
   34 
   35 /* identifies sync vs async SMT_WRITE_REQs */
   36 #define S_SYNC_WR    12
   37 #define V_SYNC_WR(x) ((x) << S_SYNC_WR)
   38 #define F_SYNC_WR    V_SYNC_WR(1)
   39 
   40 enum { SMT_SIZE = 256 };     /* # of SMT entries */
   41 
   42 enum {
   43         SMT_STATE_SWITCHING,    /* entry is being used by a switching filter */
   44         SMT_STATE_UNUSED,       /* entry not in use */
   45         SMT_STATE_ERROR         /* entry is in error state */
   46 };
   47 
   48 struct smt_entry {
   49         uint16_t state;                 /* entry state */
   50         uint16_t idx;                   /* entry index */
   51         uint32_t iqid;                  /* iqid for reply to write_sme */
   52         struct sge_wrq *wrq;            /* queue to use for write_sme */
   53         uint16_t pfvf;                  /* pfvf number */
   54         volatile int refcnt;            /* entry reference count */
   55         uint8_t smac[ETHER_ADDR_LEN];   /* source MAC address */
   56         struct mtx lock;
   57 };
   58 
   59 struct smt_data {
   60         struct rwlock lock;
   61         u_int smt_size;
   62         struct smt_entry smtab[];
   63 };
   64 
   65 
   66 int t4_init_smt(struct adapter *, int);
   67 int t4_free_smt(struct smt_data *);
   68 struct smt_entry *t4_find_or_alloc_sme(struct smt_data *, uint8_t *);
   69 struct smt_entry *t4_smt_alloc_switching(struct smt_data *, uint8_t *);
   70 int t4_smt_set_switching(struct adapter *, struct smt_entry *,
   71                                         uint16_t, uint8_t *);
   72 int t4_write_sme(struct smt_entry *);
   73 int do_smt_write_rpl(struct sge_iq *, const struct rss_header *, struct mbuf *);
   74 
   75 static inline void
   76 t4_smt_release(struct smt_entry *e)
   77 {
   78         MPASS(e != NULL);
   79         if (atomic_fetchadd_int(&e->refcnt, -1) == 1) {
   80                 mtx_lock(&e->lock);
   81                 e->state = SMT_STATE_UNUSED;
   82                 mtx_unlock(&e->lock);
   83         }
   84 
   85 }
   86 
   87 int sysctl_smt(SYSCTL_HANDLER_ARGS);
   88 
   89 #endif  /* __T4_SMT_H */

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