1 /*-
2 * Copyright (c) 2012 Semihalf.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include "opt_platform.h"
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
34 #include <sys/bus.h>
35 #include <sys/lock.h>
36 #include <sys/module.h>
37 #include <sys/mutex.h>
38 #include <sys/proc.h>
39 #include <sys/pcpu.h>
40 #include <sys/sched.h>
41
42 #include <machine/bus.h>
43 #include <machine/tlb.h>
44
45 #include <dev/ofw/ofw_bus.h>
46 #include <dev/ofw/ofw_bus_subr.h>
47
48 #include <powerpc/mpc85xx/mpc85xx.h>
49
50 #include "bman.h"
51 #include "portals.h"
52
53 t_Handle bman_portal_setup(struct bman_softc *);
54
55 struct dpaa_portals_softc *bp_sc;
56
57 int
58 bman_portals_attach(device_t dev)
59 {
60 struct dpaa_portals_softc *sc;
61
62 sc = bp_sc = device_get_softc(dev);
63
64 /* Map bman portal to physical address space */
65 if (law_enable(OCP85XX_TGTIF_BMAN, sc->sc_dp_pa, sc->sc_dp_size)) {
66 bman_portals_detach(dev);
67 return (ENXIO);
68 }
69 /* Set portal properties for XX_VirtToPhys() */
70 XX_PortalSetInfo(dev);
71
72 return (bus_generic_attach(dev));
73 }
74
75 int
76 bman_portals_detach(device_t dev)
77 {
78 struct dpaa_portals_softc *sc;
79 int i;
80
81 bp_sc = NULL;
82 sc = device_get_softc(dev);
83
84 for (i = 0; i < ARRAY_SIZE(sc->sc_dp); i++) {
85 if (sc->sc_dp[i].dp_ph != NULL) {
86 thread_lock(curthread);
87 sched_bind(curthread, i);
88 thread_unlock(curthread);
89
90 BM_PORTAL_Free(sc->sc_dp[i].dp_ph);
91
92 thread_lock(curthread);
93 sched_unbind(curthread);
94 thread_unlock(curthread);
95 }
96
97 if (sc->sc_dp[i].dp_ires != NULL) {
98 XX_DeallocIntr((uintptr_t)sc->sc_dp[i].dp_ires);
99 bus_release_resource(dev, SYS_RES_IRQ,
100 sc->sc_dp[i].dp_irid, sc->sc_dp[i].dp_ires);
101 }
102 }
103 for (i = 0; i < ARRAY_SIZE(sc->sc_rres); i++) {
104 if (sc->sc_rres[i] != NULL)
105 bus_release_resource(dev, SYS_RES_MEMORY,
106 sc->sc_rrid[i],
107 sc->sc_rres[i]);
108 }
109
110 return (0);
111 }
112
113 t_Handle
114 bman_portal_setup(struct bman_softc *bsc)
115 {
116 struct dpaa_portals_softc *sc;
117 t_BmPortalParam bpp;
118 t_Handle portal;
119 unsigned int cpu;
120 uintptr_t p;
121
122 /* Return NULL if we're not ready or while detach */
123 if (bp_sc == NULL)
124 return (NULL);
125
126 sc = bp_sc;
127
128 sched_pin();
129 portal = NULL;
130 cpu = PCPU_GET(cpuid);
131
132 /* Check if portal is ready */
133 while (atomic_cmpset_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph,
134 0, -1) == 0) {
135 p = atomic_load_acq_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph);
136
137 /* Return if portal is already initialized */
138 if (p != 0 && p != -1) {
139 sched_unpin();
140 return ((t_Handle)p);
141 }
142
143 /* Not inititialized and "owned" by another thread */
144 thread_lock(curthread);
145 mi_switch(SW_VOL);
146 }
147
148 /* Map portal registers */
149 dpaa_portal_map_registers(sc);
150
151 /* Configure and initialize portal */
152 bpp.ceBaseAddress = rman_get_bushandle(sc->sc_rres[0]);
153 bpp.ciBaseAddress = rman_get_bushandle(sc->sc_rres[1]);
154 bpp.h_Bm = bsc->sc_bh;
155 bpp.swPortalId = cpu;
156 bpp.irq = (uintptr_t)sc->sc_dp[cpu].dp_ires;
157
158 portal = BM_PORTAL_Config(&bpp);
159 if (portal == NULL)
160 goto err;
161
162 if (BM_PORTAL_Init(portal) != E_OK)
163 goto err;
164
165 atomic_store_rel_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, (uintptr_t)portal);
166
167 sched_unpin();
168
169 return (portal);
170
171 err:
172 if (portal != NULL)
173 BM_PORTAL_Free(portal);
174
175 atomic_store_rel_ptr((uintptr_t *)&sc->sc_dp[cpu].dp_ph, 0);
176 sched_unpin();
177
178 return (NULL);
179 }
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