Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/dpaa2/dpaa2_cmd_if.m
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1 #- 2 # SPDX-License-Identifier: BSD-2-Clause 3 # 4 # Copyright © 2021-2022 Dmitry Salychev 5 # 6 # Redistribution and use in source and binary forms, with or without 7 # modification, are permitted provided that the following conditions 8 # are met: 9 # 1. Redistributions of source code must retain the above copyright 10 # notice, this list of conditions and the following disclaimer. 11 # 2. Redistributions in binary form must reproduce the above copyright 12 # notice, this list of conditions and the following disclaimer in the 13 # documentation and/or other materials provided with the distribution. 14 # 15 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 # ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 # FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 # DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 # OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 # HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 # LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 # OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 # SUCH DAMAGE. 26 # 27 28 #include <machine/bus.h> 29 #include <dev/dpaa2/dpaa2_types.h> 30 #include <dev/dpaa2/dpaa2_mc.h> 31 #include <dev/dpaa2/dpaa2_mcp.h> 32 33 /** 34 * @brief DPAA2 MC command interface. 35 * 36 * The primary purpose of the MC provided DPAA2 objects is to simplify DPAA2 37 * hardware block usage through abstraction and encapsulation. 38 */ 39 INTERFACE dpaa2_cmd; 40 41 # 42 # Default implementation of the commands. 43 # 44 CODE { 45 static void 46 panic_on_mc(device_t dev) 47 { 48 if (strcmp(device_get_name(dev), "dpaa2_mc") == 0) 49 panic("No one can handle a command above DPAA2 MC"); 50 } 51 52 static int 53 bypass_mng_get_version(device_t dev, device_t child, struct dpaa2_cmd *cmd, 54 uint32_t *major, uint32_t *minor, uint32_t *rev) 55 { 56 panic_on_mc(dev); 57 if (device_get_parent(dev) != NULL) 58 return (DPAA2_CMD_MNG_GET_VERSION(device_get_parent(dev), child, 59 cmd, major, minor, rev)); 60 return (ENXIO); 61 } 62 static int 63 bypass_mng_get_soc_version(device_t dev, device_t child, struct dpaa2_cmd *cmd, 64 uint32_t *pvr, uint32_t *svr) 65 { 66 panic_on_mc(dev); 67 if (device_get_parent(dev) != NULL) 68 return (DPAA2_CMD_MNG_GET_SOC_VERSION( 69 device_get_parent(dev), child, cmd, pvr, svr)); 70 return (ENXIO); 71 } 72 static int 73 bypass_mng_get_container_id(device_t dev, device_t child, struct dpaa2_cmd *cmd, 74 uint32_t *cont_id) 75 { 76 panic_on_mc(dev); 77 if (device_get_parent(dev) != NULL) 78 return (DPAA2_CMD_MNG_GET_CONTAINER_ID( 79 device_get_parent(dev), child, cmd, cont_id)); 80 return (ENXIO); 81 } 82 static int 83 bypass_rc_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t cont_id, 84 uint16_t *token) 85 { 86 panic_on_mc(dev); 87 if (device_get_parent(dev) != NULL) 88 return (DPAA2_CMD_RC_OPEN( 89 device_get_parent(dev), child, cmd, cont_id, token)); 90 return (ENXIO); 91 } 92 static int 93 bypass_rc_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 94 { 95 panic_on_mc(dev); 96 if (device_get_parent(dev) != NULL) 97 return (DPAA2_CMD_RC_CLOSE( 98 device_get_parent(dev), child, cmd)); 99 return (ENXIO); 100 } 101 static int 102 bypass_rc_get_obj_count(device_t dev, device_t child, struct dpaa2_cmd *cmd, 103 uint32_t *obj_count) 104 { 105 panic_on_mc(dev); 106 if (device_get_parent(dev) != NULL) 107 return (DPAA2_CMD_RC_GET_OBJ_COUNT( 108 device_get_parent(dev), child, cmd, obj_count)); 109 return (ENXIO); 110 } 111 static int 112 bypass_rc_get_obj(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t obj_idx, 113 struct dpaa2_obj *obj) 114 { 115 panic_on_mc(dev); 116 if (device_get_parent(dev) != NULL) 117 return (DPAA2_CMD_RC_GET_OBJ( 118 device_get_parent(dev), child, cmd, obj_idx, obj)); 119 return (ENXIO); 120 } 121 static int 122 bypass_rc_get_obj_descriptor(device_t dev, device_t child, struct dpaa2_cmd *cmd, 123 uint32_t obj_id, enum dpaa2_dev_type type, struct dpaa2_obj *obj) 124 { 125 panic_on_mc(dev); 126 if (device_get_parent(dev) != NULL) 127 return (DPAA2_CMD_RC_GET_OBJ_DESCRIPTOR( 128 device_get_parent(dev), child, cmd, obj_id, type, obj)); 129 return (ENXIO); 130 } 131 static int 132 bypass_rc_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 133 struct dpaa2_rc_attr *attr) 134 { 135 panic_on_mc(dev); 136 if (device_get_parent(dev) != NULL) 137 return (DPAA2_CMD_RC_GET_ATTRIBUTES( 138 device_get_parent(dev), child, cmd, attr)); 139 return (ENXIO); 140 } 141 static int 142 bypass_rc_get_obj_region(device_t dev, device_t child, struct dpaa2_cmd *cmd, 143 uint32_t obj_id, uint8_t reg_idx, enum dpaa2_dev_type type, 144 struct dpaa2_rc_obj_region *reg) 145 { 146 panic_on_mc(dev); 147 if (device_get_parent(dev) != NULL) 148 return (DPAA2_CMD_RC_GET_OBJ_REGION( 149 device_get_parent(dev), child, cmd, obj_id, reg_idx, 150 type, reg)); 151 return (ENXIO); 152 } 153 static int 154 bypass_rc_get_api_version(device_t dev, device_t child, struct dpaa2_cmd *cmd, 155 uint16_t *major, uint16_t *minor) 156 { 157 panic_on_mc(dev); 158 if (device_get_parent(dev) != NULL) 159 return (DPAA2_CMD_RC_GET_API_VERSION( 160 device_get_parent(dev), child, cmd, major, minor)); 161 return (ENXIO); 162 } 163 static int 164 bypass_rc_set_irq_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd, 165 uint8_t irq_idx, uint8_t enable) 166 { 167 panic_on_mc(dev); 168 if (device_get_parent(dev) != NULL) 169 return (DPAA2_CMD_RC_SET_IRQ_ENABLE( 170 device_get_parent(dev), child, cmd, irq_idx, enable)); 171 return (ENXIO); 172 } 173 static int 174 bypass_rc_set_obj_irq(device_t dev, device_t child, struct dpaa2_cmd *cmd, 175 uint8_t irq_idx, uint64_t addr, uint32_t data, uint32_t irq_usr, 176 uint32_t obj_id, enum dpaa2_dev_type type) 177 { 178 panic_on_mc(dev); 179 if (device_get_parent(dev) != NULL) 180 return (DPAA2_CMD_RC_SET_OBJ_IRQ( 181 device_get_parent(dev), child, cmd, irq_idx, addr, data, 182 irq_usr, obj_id, type)); 183 return (ENXIO); 184 } 185 static int 186 bypass_rc_get_conn(device_t dev, device_t child, struct dpaa2_cmd *cmd, 187 struct dpaa2_ep_desc *ep1_desc, struct dpaa2_ep_desc *ep2_desc, 188 uint32_t *link_stat) 189 { 190 panic_on_mc(dev); 191 if (device_get_parent(dev) != NULL) 192 return (DPAA2_CMD_RC_GET_CONN( 193 device_get_parent(dev), child, cmd, ep1_desc, ep2_desc, 194 link_stat)); 195 return (ENXIO); 196 } 197 198 static int 199 bypass_ni_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t dpni_id, 200 uint16_t *token) 201 { 202 panic_on_mc(dev); 203 if (device_get_parent(dev) != NULL) 204 return (DPAA2_CMD_NI_OPEN( 205 device_get_parent(dev), child, cmd, dpni_id, token)); 206 return (ENXIO); 207 } 208 static int 209 bypass_ni_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 210 { 211 panic_on_mc(dev); 212 if (device_get_parent(dev) != NULL) 213 return (DPAA2_CMD_NI_CLOSE( 214 device_get_parent(dev), child, cmd)); 215 return (ENXIO); 216 } 217 static int 218 bypass_ni_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 219 { 220 panic_on_mc(dev); 221 if (device_get_parent(dev) != NULL) 222 return (DPAA2_CMD_NI_ENABLE( 223 device_get_parent(dev), child, cmd)); 224 return (ENXIO); 225 } 226 static int 227 bypass_ni_disable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 228 { 229 panic_on_mc(dev); 230 if (device_get_parent(dev) != NULL) 231 return (DPAA2_CMD_NI_DISABLE( 232 device_get_parent(dev), child, cmd)); 233 return (ENXIO); 234 } 235 static int 236 bypass_ni_get_api_version(device_t dev, device_t child, struct dpaa2_cmd *cmd, 237 uint16_t *major, uint16_t *minor) 238 { 239 panic_on_mc(dev); 240 if (device_get_parent(dev) != NULL) 241 return (DPAA2_CMD_NI_GET_API_VERSION( 242 device_get_parent(dev), child, cmd, major, minor)); 243 return (ENXIO); 244 } 245 static int 246 bypass_ni_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 247 { 248 panic_on_mc(dev); 249 if (device_get_parent(dev) != NULL) 250 return (DPAA2_CMD_NI_RESET( 251 device_get_parent(dev), child, cmd)); 252 return (ENXIO); 253 } 254 static int 255 bypass_ni_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 256 struct dpaa2_ni_attr *attr) 257 { 258 panic_on_mc(dev); 259 if (device_get_parent(dev) != NULL) 260 return (DPAA2_CMD_NI_GET_ATTRIBUTES( 261 device_get_parent(dev), child, cmd, attr)); 262 return (ENXIO); 263 } 264 static int 265 bypass_ni_set_buf_layout(device_t dev, device_t child, struct dpaa2_cmd *cmd, 266 struct dpaa2_ni_buf_layout *bl) 267 { 268 panic_on_mc(dev); 269 if (device_get_parent(dev) != NULL) 270 return (DPAA2_CMD_NI_SET_BUF_LAYOUT( 271 device_get_parent(dev), child, cmd, bl)); 272 return (ENXIO); 273 } 274 static int 275 bypass_ni_get_tx_data_off(device_t dev, device_t child, struct dpaa2_cmd *cmd, 276 uint16_t *offset) 277 { 278 panic_on_mc(dev); 279 if (device_get_parent(dev) != NULL) 280 return (DPAA2_CMD_NI_GET_TX_DATA_OFF( 281 device_get_parent(dev), child, cmd, offset)); 282 return (ENXIO); 283 } 284 static int 285 bypass_ni_set_link_cfg(device_t dev, device_t child, struct dpaa2_cmd *cmd, 286 struct dpaa2_ni_link_cfg *cfg) 287 { 288 panic_on_mc(dev); 289 if (device_get_parent(dev) != NULL) 290 return (DPAA2_CMD_NI_SET_LINK_CFG( 291 device_get_parent(dev), child, cmd, cfg)); 292 return (ENXIO); 293 } 294 static int 295 bypass_ni_get_link_cfg(device_t dev, device_t child, struct dpaa2_cmd *cmd, 296 struct dpaa2_ni_link_cfg *cfg) 297 { 298 panic_on_mc(dev); 299 if (device_get_parent(dev) != NULL) 300 return (DPAA2_CMD_NI_GET_LINK_CFG( 301 device_get_parent(dev), child, cmd, cfg)); 302 return (ENXIO); 303 } 304 static int 305 bypass_ni_get_link_state(device_t dev, device_t child, struct dpaa2_cmd *cmd, 306 struct dpaa2_ni_link_state *state) 307 { 308 panic_on_mc(dev); 309 if (device_get_parent(dev) != NULL) 310 return (DPAA2_CMD_NI_GET_LINK_STATE( 311 device_get_parent(dev), child, cmd, state)); 312 return (ENXIO); 313 } 314 static int 315 bypass_ni_get_port_mac_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, 316 uint8_t *mac) 317 { 318 panic_on_mc(dev); 319 if (device_get_parent(dev) != NULL) 320 return (DPAA2_CMD_NI_GET_PORT_MAC_ADDR( 321 device_get_parent(dev), child, cmd, mac)); 322 return (ENXIO); 323 } 324 static int 325 bypass_ni_set_prim_mac_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, 326 uint8_t *mac) 327 { 328 panic_on_mc(dev); 329 if (device_get_parent(dev) != NULL) 330 return (DPAA2_CMD_NI_SET_PRIM_MAC_ADDR( 331 device_get_parent(dev), child, cmd, mac)); 332 return (ENXIO); 333 } 334 static int 335 bypass_ni_get_prim_mac_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, 336 uint8_t *mac) 337 { 338 panic_on_mc(dev); 339 if (device_get_parent(dev) != NULL) 340 return (DPAA2_CMD_NI_GET_PRIM_MAC_ADDR( 341 device_get_parent(dev), child, cmd, mac)); 342 return (ENXIO); 343 } 344 static int 345 bypass_ni_set_qos_table(device_t dev, device_t child, struct dpaa2_cmd *cmd, 346 struct dpaa2_ni_qos_table *tbl) 347 { 348 panic_on_mc(dev); 349 if (device_get_parent(dev) != NULL) 350 return (DPAA2_CMD_NI_SET_QOS_TABLE( 351 device_get_parent(dev), child, cmd, tbl)); 352 return (ENXIO); 353 } 354 static int 355 bypass_ni_clear_qos_table(device_t dev, device_t child, struct dpaa2_cmd *cmd) 356 { 357 panic_on_mc(dev); 358 if (device_get_parent(dev) != NULL) 359 return (DPAA2_CMD_NI_CLEAR_QOS_TABLE( 360 device_get_parent(dev), child, cmd)); 361 return (ENXIO); 362 } 363 static int 364 bypass_ni_set_pools(device_t dev, device_t child, struct dpaa2_cmd *cmd, 365 struct dpaa2_ni_pools_cfg *cfg) 366 { 367 panic_on_mc(dev); 368 if (device_get_parent(dev) != NULL) 369 return (DPAA2_CMD_NI_SET_POOLS( 370 device_get_parent(dev), child, cmd, cfg)); 371 return (ENXIO); 372 } 373 static int 374 bypass_ni_set_err_behavior(device_t dev, device_t child, struct dpaa2_cmd *cmd, 375 struct dpaa2_ni_err_cfg *cfg) 376 { 377 panic_on_mc(dev); 378 if (device_get_parent(dev) != NULL) 379 return (DPAA2_CMD_NI_SET_ERR_BEHAVIOR( 380 device_get_parent(dev), child, cmd, cfg)); 381 return (ENXIO); 382 } 383 static int 384 bypass_ni_get_queue(device_t dev, device_t child, struct dpaa2_cmd *cmd, 385 struct dpaa2_ni_queue_cfg *cfg) 386 { 387 panic_on_mc(dev); 388 if (device_get_parent(dev) != NULL) 389 return (DPAA2_CMD_NI_GET_QUEUE( 390 device_get_parent(dev), child, cmd, cfg)); 391 return (ENXIO); 392 } 393 static int 394 bypass_ni_set_queue(device_t dev, device_t child, struct dpaa2_cmd *cmd, 395 struct dpaa2_ni_queue_cfg *cfg) 396 { 397 panic_on_mc(dev); 398 if (device_get_parent(dev) != NULL) 399 return (DPAA2_CMD_NI_SET_QUEUE( 400 device_get_parent(dev), child, cmd, cfg)); 401 return (ENXIO); 402 } 403 static int 404 bypass_ni_get_qdid(device_t dev, device_t child, struct dpaa2_cmd *cmd, 405 enum dpaa2_ni_queue_type type, uint16_t *qdid) 406 { 407 panic_on_mc(dev); 408 if (device_get_parent(dev) != NULL) 409 return (DPAA2_CMD_NI_GET_QDID( 410 device_get_parent(dev), child, cmd, type, qdid)); 411 return (ENXIO); 412 } 413 static int 414 bypass_ni_add_mac_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, 415 uint8_t *mac) 416 { 417 panic_on_mc(dev); 418 if (device_get_parent(dev) != NULL) 419 return (DPAA2_CMD_NI_ADD_MAC_ADDR( 420 device_get_parent(dev), child, cmd, mac)); 421 return (ENXIO); 422 } 423 static int 424 bypass_ni_remove_mac_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, 425 uint8_t *mac) 426 { 427 panic_on_mc(dev); 428 if (device_get_parent(dev) != NULL) 429 return (DPAA2_CMD_NI_REMOVE_MAC_ADDR( 430 device_get_parent(dev), child, cmd, mac)); 431 return (ENXIO); 432 } 433 static int 434 bypass_ni_clear_mac_filters(device_t dev, device_t child, struct dpaa2_cmd *cmd, 435 bool rm_uni, bool rm_multi) 436 { 437 panic_on_mc(dev); 438 if (device_get_parent(dev) != NULL) 439 return (DPAA2_CMD_NI_CLEAR_MAC_FILTERS( 440 device_get_parent(dev), child, cmd, rm_uni, rm_multi)); 441 return (ENXIO); 442 } 443 static int 444 bypass_ni_set_mfl(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint16_t length) 445 { 446 panic_on_mc(dev); 447 if (device_get_parent(dev) != NULL) 448 return (DPAA2_CMD_NI_SET_MFL( 449 device_get_parent(dev), child, cmd, length)); 450 return (ENXIO); 451 } 452 static int 453 bypass_ni_set_offload(device_t dev, device_t child, struct dpaa2_cmd *cmd, 454 enum dpaa2_ni_ofl_type ofl_type, bool en) 455 { 456 panic_on_mc(dev); 457 if (device_get_parent(dev) != NULL) 458 return (DPAA2_CMD_NI_SET_OFFLOAD( 459 device_get_parent(dev), child, cmd, ofl_type, en)); 460 return (ENXIO); 461 } 462 static int 463 bypass_ni_set_irq_mask(device_t dev, device_t child, struct dpaa2_cmd *cmd, 464 uint8_t irq_idx, uint32_t mask) 465 { 466 panic_on_mc(dev); 467 if (device_get_parent(dev) != NULL) 468 return (DPAA2_CMD_NI_SET_IRQ_MASK( 469 device_get_parent(dev), child, cmd, irq_idx, mask)); 470 return (ENXIO); 471 } 472 static int 473 bypass_ni_set_irq_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd, 474 uint8_t irq_idx, bool en) 475 { 476 panic_on_mc(dev); 477 if (device_get_parent(dev) != NULL) 478 return (DPAA2_CMD_NI_SET_IRQ_ENABLE( 479 device_get_parent(dev), child, cmd, irq_idx, en)); 480 return (ENXIO); 481 } 482 static int 483 bypass_ni_get_irq_status(device_t dev, device_t child, struct dpaa2_cmd *cmd, 484 uint8_t irq_idx, uint32_t *status) 485 { 486 panic_on_mc(dev); 487 if (device_get_parent(dev) != NULL) 488 return (DPAA2_CMD_NI_GET_IRQ_STATUS( 489 device_get_parent(dev), child, cmd, irq_idx, status)); 490 return (ENXIO); 491 } 492 static int 493 bypass_ni_set_uni_promisc(device_t dev, device_t child, struct dpaa2_cmd *cmd, bool en) 494 { 495 panic_on_mc(dev); 496 if (device_get_parent(dev) != NULL) 497 return (DPAA2_CMD_NI_SET_UNI_PROMISC( 498 device_get_parent(dev), child, cmd, en)); 499 return (ENXIO); 500 } 501 static int 502 bypass_ni_set_multi_promisc(device_t dev, device_t child, struct dpaa2_cmd *cmd, bool en) 503 { 504 panic_on_mc(dev); 505 if (device_get_parent(dev) != NULL) 506 return (DPAA2_CMD_NI_SET_MULTI_PROMISC( 507 device_get_parent(dev), child, cmd, en)); 508 return (ENXIO); 509 } 510 static int 511 bypass_ni_get_statistics(device_t dev, device_t child, struct dpaa2_cmd *cmd, 512 uint8_t page, uint16_t param, uint64_t *cnt) 513 { 514 panic_on_mc(dev); 515 if (device_get_parent(dev) != NULL) 516 return (DPAA2_CMD_NI_GET_STATISTICS( 517 device_get_parent(dev), child, cmd, page, param, cnt)); 518 return (ENXIO); 519 } 520 static int 521 bypass_ni_set_rx_tc_dist(device_t dev, device_t child, struct dpaa2_cmd *cmd, 522 uint16_t dist_size, uint8_t tc, enum dpaa2_ni_dist_mode dist_mode, 523 bus_addr_t key_cfg_buf) 524 { 525 panic_on_mc(dev); 526 if (device_get_parent(dev) != NULL) 527 return (DPAA2_CMD_NI_SET_RX_TC_DIST( 528 device_get_parent(dev), child, cmd, dist_size, tc, 529 dist_mode, key_cfg_buf)); 530 return (ENXIO); 531 } 532 533 static int 534 bypass_io_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t dpio_id, 535 uint16_t *token) 536 { 537 panic_on_mc(dev); 538 if (device_get_parent(dev) != NULL) 539 return (DPAA2_CMD_IO_OPEN( 540 device_get_parent(dev), child, cmd, dpio_id, token)); 541 return (ENXIO); 542 } 543 static int 544 bypass_io_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 545 { 546 panic_on_mc(dev); 547 if (device_get_parent(dev) != NULL) 548 return (DPAA2_CMD_IO_CLOSE( 549 device_get_parent(dev), child, cmd)); 550 return (ENXIO); 551 } 552 static int 553 bypass_io_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 554 { 555 panic_on_mc(dev); 556 if (device_get_parent(dev) != NULL) 557 return (DPAA2_CMD_IO_ENABLE( 558 device_get_parent(dev), child, cmd)); 559 return (ENXIO); 560 } 561 static int 562 bypass_io_disable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 563 { 564 panic_on_mc(dev); 565 if (device_get_parent(dev) != NULL) 566 return (DPAA2_CMD_IO_DISABLE( 567 device_get_parent(dev), child, cmd)); 568 return (ENXIO); 569 } 570 static int 571 bypass_io_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 572 { 573 panic_on_mc(dev); 574 if (device_get_parent(dev) != NULL) 575 return (DPAA2_CMD_IO_RESET( 576 device_get_parent(dev), child, cmd)); 577 return (ENXIO); 578 } 579 static int 580 bypass_io_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 581 struct dpaa2_io_attr *attr) 582 { 583 panic_on_mc(dev); 584 if (device_get_parent(dev) != NULL) 585 return (DPAA2_CMD_IO_GET_ATTRIBUTES( 586 device_get_parent(dev), child, cmd, attr)); 587 return (ENXIO); 588 } 589 static int 590 bypass_io_set_irq_mask(device_t dev, device_t child, struct dpaa2_cmd *cmd, 591 uint8_t irq_idx, uint32_t mask) 592 { 593 panic_on_mc(dev); 594 if (device_get_parent(dev) != NULL) 595 return (DPAA2_CMD_IO_SET_IRQ_MASK( 596 device_get_parent(dev), child, cmd, irq_idx, mask)); 597 return (ENXIO); 598 } 599 static int 600 bypass_io_get_irq_status(device_t dev, device_t child, struct dpaa2_cmd *cmd, 601 uint8_t irq_idx, uint32_t *status) 602 { 603 panic_on_mc(dev); 604 if (device_get_parent(dev) != NULL) 605 return (DPAA2_CMD_IO_GET_IRQ_STATUS( 606 device_get_parent(dev), child, cmd, irq_idx, status)); 607 return (ENXIO); 608 } 609 static int 610 bypass_io_set_irq_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd, 611 uint8_t irq_idx, bool en) 612 { 613 panic_on_mc(dev); 614 if (device_get_parent(dev) != NULL) 615 return (DPAA2_CMD_IO_SET_IRQ_ENABLE( 616 device_get_parent(dev), child, cmd, irq_idx, en)); 617 return (ENXIO); 618 } 619 static int 620 bypass_io_add_static_dq_chan(device_t dev, device_t child, struct dpaa2_cmd *cmd, 621 uint32_t dpcon_id, uint8_t *chan_idx) 622 { 623 panic_on_mc(dev); 624 if (device_get_parent(dev) != NULL) 625 return (DPAA2_CMD_IO_ADD_STATIC_DQ_CHAN( 626 device_get_parent(dev), child, cmd, dpcon_id, chan_idx)); 627 return (ENXIO); 628 } 629 630 static int 631 bypass_bp_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t dpbp_id, 632 uint16_t *token) 633 { 634 panic_on_mc(dev); 635 if (device_get_parent(dev) != NULL) 636 return (DPAA2_CMD_BP_OPEN( 637 device_get_parent(dev), child, cmd, dpbp_id, token)); 638 return (ENXIO); 639 } 640 static int 641 bypass_bp_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 642 { 643 panic_on_mc(dev); 644 if (device_get_parent(dev) != NULL) 645 return (DPAA2_CMD_BP_CLOSE( 646 device_get_parent(dev), child, cmd)); 647 return (ENXIO); 648 } 649 static int 650 bypass_bp_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 651 { 652 panic_on_mc(dev); 653 if (device_get_parent(dev) != NULL) 654 return (DPAA2_CMD_BP_ENABLE( 655 device_get_parent(dev), child, cmd)); 656 return (ENXIO); 657 } 658 static int 659 bypass_bp_disable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 660 { 661 panic_on_mc(dev); 662 if (device_get_parent(dev) != NULL) 663 return (DPAA2_CMD_BP_DISABLE( 664 device_get_parent(dev), child, cmd)); 665 return (ENXIO); 666 } 667 static int 668 bypass_bp_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 669 { 670 panic_on_mc(dev); 671 if (device_get_parent(dev) != NULL) 672 return (DPAA2_CMD_BP_RESET( 673 device_get_parent(dev), child, cmd)); 674 return (ENXIO); 675 } 676 static int 677 bypass_bp_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 678 struct dpaa2_bp_attr *attr) 679 { 680 panic_on_mc(dev); 681 if (device_get_parent(dev) != NULL) 682 return (DPAA2_CMD_BP_GET_ATTRIBUTES( 683 device_get_parent(dev), child, cmd, attr)); 684 return (ENXIO); 685 } 686 687 static int 688 bypass_mac_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t dpmac_id, 689 uint16_t *token) 690 { 691 panic_on_mc(dev); 692 if (device_get_parent(dev) != NULL) 693 return (DPAA2_CMD_MAC_OPEN( 694 device_get_parent(dev), child, cmd, dpmac_id, token)); 695 return (ENXIO); 696 } 697 static int 698 bypass_mac_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 699 { 700 panic_on_mc(dev); 701 if (device_get_parent(dev) != NULL) 702 return (DPAA2_CMD_MAC_CLOSE( 703 device_get_parent(dev), child, cmd)); 704 return (ENXIO); 705 } 706 static int 707 bypass_mac_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 708 { 709 panic_on_mc(dev); 710 if (device_get_parent(dev) != NULL) 711 return (DPAA2_CMD_MAC_RESET( 712 device_get_parent(dev), child, cmd)); 713 return (ENXIO); 714 } 715 static int 716 bypass_mac_mdio_read(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint8_t phy, 717 uint16_t reg, uint16_t *val) 718 { 719 panic_on_mc(dev); 720 if (device_get_parent(dev) != NULL) 721 return (DPAA2_CMD_MAC_MDIO_READ( 722 device_get_parent(dev), child, cmd, phy, reg, val)); 723 return (ENXIO); 724 } 725 static int 726 bypass_mac_mdio_write(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint8_t phy, 727 uint16_t reg, uint16_t val) 728 { 729 panic_on_mc(dev); 730 if (device_get_parent(dev) != NULL) 731 return (DPAA2_CMD_MAC_MDIO_WRITE( 732 device_get_parent(dev), child, cmd, phy, reg, val)); 733 return (ENXIO); 734 } 735 static int 736 bypass_mac_get_addr(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint8_t *mac) 737 { 738 panic_on_mc(dev); 739 if (device_get_parent(dev) != NULL) 740 return (DPAA2_CMD_MAC_GET_ADDR( 741 device_get_parent(dev), child, cmd, mac)); 742 return (ENXIO); 743 } 744 static int 745 bypass_mac_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 746 struct dpaa2_mac_attr *attr) 747 { 748 panic_on_mc(dev); 749 if (device_get_parent(dev) != NULL) 750 return (DPAA2_CMD_MAC_GET_ATTRIBUTES( 751 device_get_parent(dev), child, cmd, attr)); 752 return (ENXIO); 753 } 754 static int 755 bypass_mac_set_link_state(device_t dev, device_t child, struct dpaa2_cmd *cmd, 756 struct dpaa2_mac_link_state *state) 757 { 758 panic_on_mc(dev); 759 if (device_get_parent(dev) != NULL) 760 return (DPAA2_CMD_MAC_SET_LINK_STATE( 761 device_get_parent(dev), child, cmd, state)); 762 return (ENXIO); 763 } 764 static int 765 bypass_mac_set_irq_mask(device_t dev, device_t child, struct dpaa2_cmd *cmd, 766 uint8_t irq_idx, uint32_t mask) 767 { 768 panic_on_mc(dev); 769 if (device_get_parent(dev) != NULL) 770 return (DPAA2_CMD_MAC_SET_IRQ_MASK( 771 device_get_parent(dev), child, cmd, irq_idx, mask)); 772 return (ENXIO); 773 } 774 static int 775 bypass_mac_set_irq_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd, 776 uint8_t irq_idx, bool en) 777 { 778 panic_on_mc(dev); 779 if (device_get_parent(dev) != NULL) 780 return (DPAA2_CMD_MAC_SET_IRQ_ENABLE( 781 device_get_parent(dev), child, cmd, irq_idx, en)); 782 return (ENXIO); 783 } 784 static int 785 bypass_mac_get_irq_status(device_t dev, device_t child, struct dpaa2_cmd *cmd, 786 uint8_t irq_idx, uint32_t *status) 787 { 788 panic_on_mc(dev); 789 if (device_get_parent(dev) != NULL) 790 return (DPAA2_CMD_MAC_GET_IRQ_STATUS( 791 device_get_parent(dev), child, cmd, irq_idx, status)); 792 return (ENXIO); 793 } 794 795 static int 796 bypass_con_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, uint32_t dpcon_id, 797 uint16_t *token) 798 { 799 panic_on_mc(dev); 800 if (device_get_parent(dev) != NULL) 801 return (DPAA2_CMD_CON_OPEN( 802 device_get_parent(dev), child, cmd, dpcon_id, token)); 803 return (ENXIO); 804 } 805 static int 806 bypass_con_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 807 { 808 panic_on_mc(dev); 809 if (device_get_parent(dev) != NULL) 810 return (DPAA2_CMD_CON_CLOSE( 811 device_get_parent(dev), child, cmd)); 812 return (ENXIO); 813 } 814 static int 815 bypass_con_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 816 { 817 panic_on_mc(dev); 818 if (device_get_parent(dev) != NULL) 819 return (DPAA2_CMD_CON_RESET( 820 device_get_parent(dev), child, cmd)); 821 return (ENXIO); 822 } 823 static int 824 bypass_con_enable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 825 { 826 panic_on_mc(dev); 827 if (device_get_parent(dev) != NULL) 828 return (DPAA2_CMD_CON_ENABLE( 829 device_get_parent(dev), child, cmd)); 830 return (ENXIO); 831 } 832 static int 833 bypass_con_disable(device_t dev, device_t child, struct dpaa2_cmd *cmd) 834 { 835 panic_on_mc(dev); 836 if (device_get_parent(dev) != NULL) 837 return (DPAA2_CMD_CON_DISABLE( 838 device_get_parent(dev), child, cmd)); 839 return (ENXIO); 840 } 841 static int 842 bypass_con_get_attributes(device_t dev, device_t child, struct dpaa2_cmd *cmd, 843 struct dpaa2_con_attr *attr) 844 { 845 panic_on_mc(dev); 846 if (device_get_parent(dev) != NULL) 847 return (DPAA2_CMD_CON_GET_ATTRIBUTES( 848 device_get_parent(dev), child, cmd, attr)); 849 return (ENXIO); 850 } 851 static int 852 bypass_con_set_notif(device_t dev, device_t child, struct dpaa2_cmd *cmd, 853 struct dpaa2_con_notif_cfg *cfg) 854 { 855 panic_on_mc(dev); 856 if (device_get_parent(dev) != NULL) 857 return (DPAA2_CMD_CON_SET_NOTIF( 858 device_get_parent(dev), child, cmd, cfg)); 859 return (ENXIO); 860 } 861 862 /* Data Path MC Portal (DPMCP) commands. */ 863 864 static int 865 bypass_mcp_create(device_t dev, device_t child, struct dpaa2_cmd *cmd, 866 uint32_t portal_id, uint32_t options, uint32_t *dpmcp_id) 867 { 868 panic_on_mc(dev); 869 if (device_get_parent(dev) != NULL) 870 return (DPAA2_CMD_MCP_CREATE( 871 device_get_parent(dev), child, cmd, portal_id, 872 options, dpmcp_id)); 873 return (ENXIO); 874 } 875 static int 876 bypass_mcp_destroy(device_t dev, device_t child, struct dpaa2_cmd *cmd, 877 uint32_t dpmcp_id) 878 { 879 panic_on_mc(dev); 880 if (device_get_parent(dev) != NULL) 881 return (DPAA2_CMD_MCP_DESTROY( 882 device_get_parent(dev), child, cmd, dpmcp_id)); 883 return (ENXIO); 884 } 885 static int 886 bypass_mcp_open(device_t dev, device_t child, struct dpaa2_cmd *cmd, 887 uint32_t dpmcp_id, uint16_t *token) 888 { 889 panic_on_mc(dev); 890 if (device_get_parent(dev) != NULL) 891 return (DPAA2_CMD_MCP_OPEN( 892 device_get_parent(dev), child, cmd, dpmcp_id, 893 token)); 894 return (ENXIO); 895 } 896 static int 897 bypass_mcp_close(device_t dev, device_t child, struct dpaa2_cmd *cmd) 898 { 899 panic_on_mc(dev); 900 if (device_get_parent(dev) != NULL) 901 return (DPAA2_CMD_MCP_CLOSE( 902 device_get_parent(dev), child, cmd)); 903 return (ENXIO); 904 } 905 static int 906 bypass_mcp_reset(device_t dev, device_t child, struct dpaa2_cmd *cmd) 907 { 908 panic_on_mc(dev); 909 if (device_get_parent(dev) != NULL) 910 return (DPAA2_CMD_MCP_RESET( 911 device_get_parent(dev), child, cmd)); 912 return (ENXIO); 913 } 914 }; 915 916 /** 917 * @brief Data Path Management (DPMNG) commands. 918 */ 919 920 METHOD int mng_get_version { 921 device_t dev; 922 device_t child; 923 struct dpaa2_cmd *cmd; 924 uint32_t *major; 925 uint32_t *minor; 926 uint32_t *rev; 927 } DEFAULT bypass_mng_get_version; 928 929 METHOD int mng_get_soc_version { 930 device_t dev; 931 device_t child; 932 struct dpaa2_cmd *cmd; 933 uint32_t *pvr; 934 uint32_t *svr; 935 } DEFAULT bypass_mng_get_soc_version; 936 937 METHOD int mng_get_container_id { 938 device_t dev; 939 device_t child; 940 struct dpaa2_cmd *cmd; 941 uint32_t *cont_id; 942 } DEFAULT bypass_mng_get_container_id; 943 944 /** 945 * @brief Data Path Resource Containter (DPRC) commands. 946 */ 947 948 METHOD int rc_open { 949 device_t dev; 950 device_t child; 951 struct dpaa2_cmd *cmd; 952 uint32_t cont_id; 953 uint16_t *token; 954 } DEFAULT bypass_rc_open; 955 956 METHOD int rc_close { 957 device_t dev; 958 device_t child; 959 struct dpaa2_cmd *cmd; 960 } DEFAULT bypass_rc_close; 961 962 METHOD int rc_get_obj_count { 963 device_t dev; 964 device_t child; 965 struct dpaa2_cmd *cmd; 966 uint32_t *obj_count; 967 } DEFAULT bypass_rc_get_obj_count; 968 969 METHOD int rc_get_obj { 970 device_t dev; 971 device_t child; 972 struct dpaa2_cmd *cmd; 973 uint32_t obj_idx; 974 struct dpaa2_obj *obj; 975 } DEFAULT bypass_rc_get_obj; 976 977 METHOD int rc_get_obj_descriptor { 978 device_t dev; 979 device_t child; 980 struct dpaa2_cmd *cmd; 981 uint32_t obj_id; 982 enum dpaa2_dev_type type; 983 struct dpaa2_obj *obj; 984 } DEFAULT bypass_rc_get_obj_descriptor; 985 986 METHOD int rc_get_attributes { 987 device_t dev; 988 device_t child; 989 struct dpaa2_cmd *cmd; 990 struct dpaa2_rc_attr *attr; 991 } DEFAULT bypass_rc_get_attributes; 992 993 METHOD int rc_get_obj_region { 994 device_t dev; 995 device_t child; 996 struct dpaa2_cmd *cmd; 997 uint32_t obj_id; 998 uint8_t reg_idx; 999 enum dpaa2_dev_type type; 1000 struct dpaa2_rc_obj_region *reg; 1001 } DEFAULT bypass_rc_get_obj_region; 1002 1003 METHOD int rc_get_api_version { 1004 device_t dev; 1005 device_t child; 1006 struct dpaa2_cmd *cmd; 1007 uint16_t *major; 1008 uint16_t *minor; 1009 } DEFAULT bypass_rc_get_api_version; 1010 1011 METHOD int rc_set_irq_enable { 1012 device_t dev; 1013 device_t child; 1014 struct dpaa2_cmd *cmd; 1015 uint8_t irq_idx; 1016 uint8_t enable; 1017 } DEFAULT bypass_rc_set_irq_enable; 1018 1019 METHOD int rc_set_obj_irq { 1020 device_t dev; 1021 device_t child; 1022 struct dpaa2_cmd *cmd; 1023 uint8_t irq_idx; 1024 uint64_t addr; 1025 uint32_t data; 1026 uint32_t irq_usr; 1027 uint32_t obj_id; 1028 enum dpaa2_dev_type type; 1029 } DEFAULT bypass_rc_set_obj_irq; 1030 1031 METHOD int rc_get_conn { 1032 device_t dev; 1033 device_t child; 1034 struct dpaa2_cmd *cmd; 1035 struct dpaa2_ep_desc *ep1_desc; 1036 struct dpaa2_ep_desc *ep2_desc; 1037 uint32_t *link_stat; 1038 } DEFAULT bypass_rc_get_conn; 1039 1040 /** 1041 * @brief Data Path Network Interface (DPNI) commands. 1042 */ 1043 1044 METHOD int ni_open { 1045 device_t dev; 1046 device_t child; 1047 struct dpaa2_cmd *cmd; 1048 uint32_t dpni_id; 1049 uint16_t *token; 1050 } DEFAULT bypass_ni_open; 1051 1052 METHOD int ni_close { 1053 device_t dev; 1054 device_t child; 1055 struct dpaa2_cmd *cmd; 1056 } DEFAULT bypass_ni_close; 1057 1058 METHOD int ni_enable { 1059 device_t dev; 1060 device_t child; 1061 struct dpaa2_cmd *cmd; 1062 } DEFAULT bypass_ni_enable; 1063 1064 METHOD int ni_disable { 1065 device_t dev; 1066 device_t child; 1067 struct dpaa2_cmd *cmd; 1068 } DEFAULT bypass_ni_disable; 1069 1070 METHOD int ni_get_api_version { 1071 device_t dev; 1072 device_t child; 1073 struct dpaa2_cmd *cmd; 1074 uint16_t *major; 1075 uint16_t *minor; 1076 } DEFAULT bypass_ni_get_api_version; 1077 1078 METHOD int ni_reset { 1079 device_t dev; 1080 device_t child; 1081 struct dpaa2_cmd *cmd; 1082 } DEFAULT bypass_ni_reset; 1083 1084 METHOD int ni_get_attributes { 1085 device_t dev; 1086 device_t child; 1087 struct dpaa2_cmd *cmd; 1088 struct dpaa2_ni_attr *attr; 1089 } DEFAULT bypass_ni_get_attributes; 1090 1091 METHOD int ni_set_buf_layout { 1092 device_t dev; 1093 device_t child; 1094 struct dpaa2_cmd *cmd; 1095 struct dpaa2_ni_buf_layout *bl; 1096 } DEFAULT bypass_ni_set_buf_layout; 1097 1098 METHOD int ni_get_tx_data_off { 1099 device_t dev; 1100 device_t child; 1101 struct dpaa2_cmd *cmd; 1102 uint16_t *offset; 1103 } DEFAULT bypass_ni_get_tx_data_off; 1104 1105 METHOD int ni_set_link_cfg { 1106 device_t dev; 1107 device_t child; 1108 struct dpaa2_cmd *cmd; 1109 struct dpaa2_ni_link_cfg *cfg; 1110 } DEFAULT bypass_ni_set_link_cfg; 1111 1112 METHOD int ni_get_link_cfg { 1113 device_t dev; 1114 device_t child; 1115 struct dpaa2_cmd *cmd; 1116 struct dpaa2_ni_link_cfg *cfg; 1117 } DEFAULT bypass_ni_get_link_cfg; 1118 1119 METHOD int ni_get_link_state { 1120 device_t dev; 1121 device_t child; 1122 struct dpaa2_cmd *cmd; 1123 struct dpaa2_ni_link_state *state; 1124 } DEFAULT bypass_ni_get_link_state; 1125 1126 METHOD int ni_get_port_mac_addr { 1127 device_t dev; 1128 device_t child; 1129 struct dpaa2_cmd *cmd; 1130 uint8_t *mac; 1131 } DEFAULT bypass_ni_get_port_mac_addr; 1132 1133 METHOD int ni_set_prim_mac_addr { 1134 device_t dev; 1135 device_t child; 1136 struct dpaa2_cmd *cmd; 1137 uint8_t *mac; 1138 } DEFAULT bypass_ni_set_prim_mac_addr; 1139 1140 METHOD int ni_get_prim_mac_addr { 1141 device_t dev; 1142 device_t child; 1143 struct dpaa2_cmd *cmd; 1144 uint8_t *mac; 1145 } DEFAULT bypass_ni_get_prim_mac_addr; 1146 1147 METHOD int ni_set_qos_table { 1148 device_t dev; 1149 device_t child; 1150 struct dpaa2_cmd *cmd; 1151 struct dpaa2_ni_qos_table *tbl; 1152 } DEFAULT bypass_ni_set_qos_table; 1153 1154 METHOD int ni_clear_qos_table { 1155 device_t dev; 1156 device_t child; 1157 struct dpaa2_cmd *cmd; 1158 } DEFAULT bypass_ni_clear_qos_table; 1159 1160 METHOD int ni_set_pools { 1161 device_t dev; 1162 device_t child; 1163 struct dpaa2_cmd *cmd; 1164 struct dpaa2_ni_pools_cfg *cfg; 1165 } DEFAULT bypass_ni_set_pools; 1166 1167 METHOD int ni_set_err_behavior { 1168 device_t dev; 1169 device_t child; 1170 struct dpaa2_cmd *cmd; 1171 struct dpaa2_ni_err_cfg *cfg; 1172 } DEFAULT bypass_ni_set_err_behavior; 1173 1174 METHOD int ni_get_queue { 1175 device_t dev; 1176 device_t child; 1177 struct dpaa2_cmd *cmd; 1178 struct dpaa2_ni_queue_cfg *cfg; 1179 } DEFAULT bypass_ni_get_queue; 1180 1181 METHOD int ni_set_queue { 1182 device_t dev; 1183 device_t child; 1184 struct dpaa2_cmd *cmd; 1185 struct dpaa2_ni_queue_cfg *cfg; 1186 } DEFAULT bypass_ni_set_queue; 1187 1188 METHOD int ni_get_qdid { 1189 device_t dev; 1190 device_t child; 1191 struct dpaa2_cmd *cmd; 1192 enum dpaa2_ni_queue_type type; 1193 uint16_t *qdid; 1194 } DEFAULT bypass_ni_get_qdid; 1195 1196 METHOD int ni_add_mac_addr { 1197 device_t dev; 1198 device_t child; 1199 struct dpaa2_cmd *cmd; 1200 uint8_t *mac; 1201 } DEFAULT bypass_ni_add_mac_addr; 1202 1203 METHOD int ni_remove_mac_addr { 1204 device_t dev; 1205 device_t child; 1206 struct dpaa2_cmd *cmd; 1207 uint8_t *mac; 1208 } DEFAULT bypass_ni_remove_mac_addr; 1209 1210 METHOD int ni_clear_mac_filters { 1211 device_t dev; 1212 device_t child; 1213 struct dpaa2_cmd *cmd; 1214 bool rm_uni; 1215 bool rm_multi; 1216 } DEFAULT bypass_ni_clear_mac_filters; 1217 1218 METHOD int ni_set_mfl { 1219 device_t dev; 1220 device_t child; 1221 struct dpaa2_cmd *cmd; 1222 uint16_t length; 1223 } DEFAULT bypass_ni_set_mfl; 1224 1225 METHOD int ni_set_offload { 1226 device_t dev; 1227 device_t child; 1228 struct dpaa2_cmd *cmd; 1229 enum dpaa2_ni_ofl_type ofl_type; 1230 bool en; 1231 } DEFAULT bypass_ni_set_offload; 1232 1233 METHOD int ni_set_irq_mask { 1234 device_t dev; 1235 device_t child; 1236 struct dpaa2_cmd *cmd; 1237 uint8_t irq_idx; 1238 uint32_t mask; 1239 } DEFAULT bypass_ni_set_irq_mask; 1240 1241 METHOD int ni_set_irq_enable { 1242 device_t dev; 1243 device_t child; 1244 struct dpaa2_cmd *cmd; 1245 uint8_t irq_idx; 1246 bool en; 1247 } DEFAULT bypass_ni_set_irq_enable; 1248 1249 METHOD int ni_get_irq_status { 1250 device_t dev; 1251 device_t child; 1252 struct dpaa2_cmd *cmd; 1253 uint8_t irq_idx; 1254 uint32_t *status; 1255 } DEFAULT bypass_ni_get_irq_status; 1256 1257 METHOD int ni_set_uni_promisc { 1258 device_t dev; 1259 device_t child; 1260 struct dpaa2_cmd *cmd; 1261 bool en; 1262 } DEFAULT bypass_ni_set_uni_promisc; 1263 1264 METHOD int ni_set_multi_promisc { 1265 device_t dev; 1266 device_t child; 1267 struct dpaa2_cmd *cmd; 1268 bool en; 1269 } DEFAULT bypass_ni_set_multi_promisc; 1270 1271 METHOD int ni_get_statistics { 1272 device_t dev; 1273 device_t child; 1274 struct dpaa2_cmd *cmd; 1275 uint8_t page; 1276 uint16_t param; 1277 uint64_t *cnt; 1278 } DEFAULT bypass_ni_get_statistics; 1279 1280 METHOD int ni_set_rx_tc_dist { 1281 device_t dev; 1282 device_t child; 1283 struct dpaa2_cmd *cmd; 1284 uint16_t dist_size; 1285 uint8_t tc; 1286 enum dpaa2_ni_dist_mode dist_mode; 1287 bus_addr_t key_cfg_buf; 1288 } DEFAULT bypass_ni_set_rx_tc_dist; 1289 1290 /** 1291 * @brief Data Path I/O (DPIO) commands. 1292 */ 1293 1294 METHOD int io_open { 1295 device_t dev; 1296 device_t child; 1297 struct dpaa2_cmd *cmd; 1298 uint32_t dpio_id; 1299 uint16_t *token; 1300 } DEFAULT bypass_io_open; 1301 1302 METHOD int io_close { 1303 device_t dev; 1304 device_t child; 1305 struct dpaa2_cmd *cmd; 1306 } DEFAULT bypass_io_close; 1307 1308 METHOD int io_enable { 1309 device_t dev; 1310 device_t child; 1311 struct dpaa2_cmd *cmd; 1312 } DEFAULT bypass_io_enable; 1313 1314 METHOD int io_disable { 1315 device_t dev; 1316 device_t child; 1317 struct dpaa2_cmd *cmd; 1318 } DEFAULT bypass_io_disable; 1319 1320 METHOD int io_reset { 1321 device_t dev; 1322 device_t child; 1323 struct dpaa2_cmd *cmd; 1324 } DEFAULT bypass_io_reset; 1325 1326 METHOD int io_get_attributes { 1327 device_t dev; 1328 device_t child; 1329 struct dpaa2_cmd *cmd; 1330 struct dpaa2_io_attr *attr; 1331 } DEFAULT bypass_io_get_attributes; 1332 1333 METHOD int io_set_irq_mask { 1334 device_t dev; 1335 device_t child; 1336 struct dpaa2_cmd *cmd; 1337 uint8_t irq_idx; 1338 uint32_t mask; 1339 } DEFAULT bypass_io_set_irq_mask; 1340 1341 METHOD int io_get_irq_status { 1342 device_t dev; 1343 device_t child; 1344 struct dpaa2_cmd *cmd; 1345 uint8_t irq_idx; 1346 uint32_t *status; 1347 } DEFAULT bypass_io_get_irq_status; 1348 1349 METHOD int io_set_irq_enable { 1350 device_t dev; 1351 device_t child; 1352 struct dpaa2_cmd *cmd; 1353 uint8_t irq_idx; 1354 bool en; 1355 } DEFAULT bypass_io_set_irq_enable; 1356 1357 METHOD int io_add_static_dq_chan { 1358 device_t dev; 1359 device_t child; 1360 struct dpaa2_cmd *cmd; 1361 uint32_t dpcon_id; 1362 uint8_t *chan_idx; 1363 } DEFAULT bypass_io_add_static_dq_chan; 1364 1365 /** 1366 * @brief Data Path Buffer Pool (DPBP) commands. 1367 */ 1368 1369 METHOD int bp_open { 1370 device_t dev; 1371 device_t child; 1372 struct dpaa2_cmd *cmd; 1373 uint32_t dpbp_id; 1374 uint16_t *token; 1375 } DEFAULT bypass_bp_open; 1376 1377 METHOD int bp_close { 1378 device_t dev; 1379 device_t child; 1380 struct dpaa2_cmd *cmd; 1381 } DEFAULT bypass_bp_close; 1382 1383 METHOD int bp_enable { 1384 device_t dev; 1385 device_t child; 1386 struct dpaa2_cmd *cmd; 1387 } DEFAULT bypass_bp_enable; 1388 1389 METHOD int bp_disable { 1390 device_t dev; 1391 device_t child; 1392 struct dpaa2_cmd *cmd; 1393 } DEFAULT bypass_bp_disable; 1394 1395 METHOD int bp_reset { 1396 device_t dev; 1397 device_t child; 1398 struct dpaa2_cmd *cmd; 1399 } DEFAULT bypass_bp_reset; 1400 1401 METHOD int bp_get_attributes { 1402 device_t dev; 1403 device_t child; 1404 struct dpaa2_cmd *cmd; 1405 struct dpaa2_bp_attr *attr; 1406 } DEFAULT bypass_bp_get_attributes; 1407 1408 /** 1409 * @brief Data Path MAC (DPMAC) commands. 1410 */ 1411 1412 METHOD int mac_open { 1413 device_t dev; 1414 device_t child; 1415 struct dpaa2_cmd *cmd; 1416 uint32_t dpmac_id; 1417 uint16_t *token; 1418 } DEFAULT bypass_mac_open; 1419 1420 METHOD int mac_close { 1421 device_t dev; 1422 device_t child; 1423 struct dpaa2_cmd *cmd; 1424 } DEFAULT bypass_mac_close; 1425 1426 METHOD int mac_reset { 1427 device_t dev; 1428 device_t child; 1429 struct dpaa2_cmd *cmd; 1430 } DEFAULT bypass_mac_reset; 1431 1432 METHOD int mac_mdio_read { 1433 device_t dev; 1434 device_t child; 1435 struct dpaa2_cmd *cmd; 1436 uint8_t phy; 1437 uint16_t reg; 1438 uint16_t *val; 1439 } DEFAULT bypass_mac_mdio_read; 1440 1441 METHOD int mac_mdio_write { 1442 device_t dev; 1443 device_t child; 1444 struct dpaa2_cmd *cmd; 1445 uint8_t phy; 1446 uint16_t reg; 1447 uint16_t val; 1448 } DEFAULT bypass_mac_mdio_write; 1449 1450 METHOD int mac_get_addr { 1451 device_t dev; 1452 device_t child; 1453 struct dpaa2_cmd *cmd; 1454 uint8_t *mac; 1455 } DEFAULT bypass_mac_get_addr; 1456 1457 METHOD int mac_get_attributes { 1458 device_t dev; 1459 device_t child; 1460 struct dpaa2_cmd *cmd; 1461 struct dpaa2_mac_attr *attr; 1462 } DEFAULT bypass_mac_get_attributes; 1463 1464 METHOD int mac_set_link_state { 1465 device_t dev; 1466 device_t child; 1467 struct dpaa2_cmd *cmd; 1468 struct dpaa2_mac_link_state *state; 1469 } DEFAULT bypass_mac_set_link_state; 1470 1471 METHOD int mac_set_irq_mask { 1472 device_t dev; 1473 device_t child; 1474 struct dpaa2_cmd *cmd; 1475 uint8_t irq_idx; 1476 uint32_t mask; 1477 } DEFAULT bypass_mac_set_irq_mask; 1478 1479 METHOD int mac_set_irq_enable { 1480 device_t dev; 1481 device_t child; 1482 struct dpaa2_cmd *cmd; 1483 uint8_t irq_idx; 1484 bool en; 1485 } DEFAULT bypass_mac_set_irq_enable; 1486 1487 METHOD int mac_get_irq_status { 1488 device_t dev; 1489 device_t child; 1490 struct dpaa2_cmd *cmd; 1491 uint8_t irq_idx; 1492 uint32_t *status; 1493 } DEFAULT bypass_mac_get_irq_status; 1494 1495 /** 1496 * @brief Data Path Concentrator (DPCON) commands. 1497 */ 1498 1499 METHOD int con_open { 1500 device_t dev; 1501 device_t child; 1502 struct dpaa2_cmd *cmd; 1503 uint32_t dpcon_id; 1504 uint16_t *token; 1505 } DEFAULT bypass_con_open; 1506 1507 METHOD int con_close { 1508 device_t dev; 1509 device_t child; 1510 struct dpaa2_cmd *cmd; 1511 } DEFAULT bypass_con_close; 1512 1513 METHOD int con_reset { 1514 device_t dev; 1515 device_t child; 1516 struct dpaa2_cmd *cmd; 1517 } DEFAULT bypass_con_reset; 1518 1519 METHOD int con_enable { 1520 device_t dev; 1521 device_t child; 1522 struct dpaa2_cmd *cmd; 1523 } DEFAULT bypass_con_enable; 1524 1525 METHOD int con_disable { 1526 device_t dev; 1527 device_t child; 1528 struct dpaa2_cmd *cmd; 1529 } DEFAULT bypass_con_disable; 1530 1531 METHOD int con_get_attributes { 1532 device_t dev; 1533 device_t child; 1534 struct dpaa2_cmd *cmd; 1535 struct dpaa2_con_attr *attr; 1536 } DEFAULT bypass_con_get_attributes; 1537 1538 METHOD int con_set_notif { 1539 device_t dev; 1540 device_t child; 1541 struct dpaa2_cmd *cmd; 1542 struct dpaa2_con_notif_cfg *cfg; 1543 } DEFAULT bypass_con_set_notif; 1544 1545 /** 1546 * @brief Data Path MC Portal (DPMCP) commands. 1547 */ 1548 1549 METHOD int mcp_create { 1550 device_t dev; 1551 device_t child; 1552 struct dpaa2_cmd *cmd; 1553 uint32_t portal_id; 1554 uint32_t options; 1555 uint32_t *dpmcp_id; 1556 } DEFAULT bypass_mcp_create; 1557 1558 METHOD int mcp_destroy { 1559 device_t dev; 1560 device_t child; 1561 struct dpaa2_cmd *cmd; 1562 uint32_t dpmcp_id; 1563 } DEFAULT bypass_mcp_destroy; 1564 1565 METHOD int mcp_open { 1566 device_t dev; 1567 device_t child; 1568 struct dpaa2_cmd *cmd; 1569 uint32_t dpmcp_id; 1570 uint16_t *token; 1571 } DEFAULT bypass_mcp_open; 1572 1573 METHOD int mcp_close { 1574 device_t dev; 1575 device_t child; 1576 struct dpaa2_cmd *cmd; 1577 } DEFAULT bypass_mcp_close; 1578 1579 METHOD int mcp_reset { 1580 device_t dev; 1581 device_t child; 1582 struct dpaa2_cmd *cmd; 1583 } DEFAULT bypass_mcp_reset;
Cache object: 2f41beb2793f4f93e6178cc3478471aa
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