The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/dpt/dpt.h

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    1 /*
    2  *
    3  * Copyright (c) 1997 by Simon Shapiro
    4  *       All Rights Reserved
    5  *
    6  * Redistribution and use in source and binary forms, with or without
    7  * modification, are permitted provided that the following conditions
    8  * are met:
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions, and the following disclaimer,
   11  *    without modification, immediately at the beginning of the file.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. The name of the author may not be used to endorse or promote products
   16  *    derived from this software without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
   22  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 /*
   32  *
   33  *  dpt.h:      Definitions and constants used by the SCSI side of the DPT
   34  *
   35  *  credits:    Mike Neuffer;   DPT low level code and in other areas as well.
   36  *              Mark Salyzyn;   Many vital bits of info and diagnostics.
   37  *              Justin Gibbs;   FreeBSD API, debugging and style
   38  *              Ron McDaniels;  SCSI Software Interrupts
   39  *              FreeBSD.ORG;    Great O/S to work on and for.
   40  */
   41 
   42 
   43 #ident "$FreeBSD: src/sys/dev/dpt/dpt.h,v 1.1.2.5 1999/09/05 08:09:10 peter Exp $"
   44 
   45 #ifndef _DPT_H
   46 #define _DPT_H
   47 
   48 extern u_long dpt_unit;
   49 
   50 #define DPT_RELEASE                     1
   51 #define DPT_VERSION                     2
   52 #define DPT_PATCH                       4
   53 #define DPT_MONTH                       8
   54 #define DPT_DAY                         23
   55 #define DPT_YEAR                        17      /* 1997 - 1980 */
   56 
   57 #define DPT_CTL_RELEASE                 1
   58 #define DPT_CTL_VERSION                 0
   59 #define DPT_CTL_PATCH                   1
   60 
   61 #ifndef PAGESIZ
   62 #define PAGESIZ                         4096
   63 #endif
   64 
   65 #ifndef physaddr
   66 typedef void *physaddr;
   67 #endif
   68 
   69 #undef  DPT_INQUIRE_DEVICES     /* We have no buyers for this function       */
   70 #define DPT_SUPPORT_POLLING     /* Use polled mode at boot (must be ON!)     */
   71 #define DPT_OPENNINGS                   8 /* Commands-in-progress per device */
   72 
   73 #define DPT_RETRIES                     5  /* Times to retry failed commands */
   74 #undef  DPT_DISABLE_SG
   75 #define DPT_HAS_OPEN
   76 
   77 /* Arguments to dpt_run_queue() can be: */
   78 
   79 #define DPT_FREE_LIST_INCREMENT         64
   80 #define DPT_CMD_LEN                     12
   81 #define DPT_MAX_SEGS                    1024 /* How many segments do we want in
   82                                               * a Scatter/Gather list?
   83                                               * Some HBA's can  do 16,
   84                                               * Some 8192. Since we
   85                                               * pre-allocate them in fixed
   86                                               * increments, we need to put a
   87                                               * practical limit on these. A
   88                                               * passed parameter (from
   89                                               * kernel boot or lkm) will help
   90                                               */
   91 
   92 /* Debug levels */
   93 
   94 #undef  DPT_DEBUG_PCI
   95 #undef  DPT_DEBUG_INIT
   96 #undef  DPT_DEBUG_SETUP
   97 #undef  DPT_DEBUG_STATES
   98 #undef  DPT_DEBUG_CONFIG
   99 #undef  DPT_DEBUG_QUEUES
  100 #undef  DPT_DEBUG_SCSI_CMD
  101 #undef  DPT_DEBUG_SOFTINTR
  102 #undef  DPT_DEBUG_HARDINTR
  103 #undef  DPT_DEBUG_HEX_DUMPS
  104 #undef  DPT_DEBUG_POLLING
  105 #undef  DPT_DEBUG_INQUIRE
  106 #undef  DPT_DEBUG_COMPLETION
  107 #undef  DPT_DEBUG_COMPLETION_ERRORS
  108 #undef  DPT_DEBUG_MINPHYS
  109 #undef  DPT_DEBUG_SG
  110 #undef  DPT_DEBUG_SG_SHOW_DATA
  111 #undef  DPT_DEBUG_SCSI_CMD_NAME
  112 #undef  DPT_DEBUG_CONTROL
  113 #undef  DPT_DEBUG_TIMEOUTS
  114 #undef  DPT_DEBUG_SHUTDOWN
  115 #define DPT_DEBUG_USER_CMD
  116 
  117 /*
  118  * Misc. definitions
  119  */
  120 #undef TRUE
  121 #undef FALSE
  122 #define TRUE 1
  123 #define FALSE 0
  124 
  125 #define MAX_CHANNELS                    3
  126 
  127 /* Map minor numbers to device identity */
  128 #define TARGET_MASK                     0x000f
  129 #define BUS_MASK                        0x0030
  130 #define HBA_MASK                        0x01c0
  131 #define LUN_MASK                        0x0e00
  132 
  133 #define minor2target(minor)             ( minor & TARGET_MASK )
  134 #define minor2bus(minor)                ( (minor & BUS_MASK) >> 4 )
  135 #define minor2hba(minor)                ( (minor & HBA_MASK) >> 6 )
  136 #define minor2lun(minor)                ( (minor & LUN_MASK) >> 9 )
  137 
  138 /*
  139  * Valid values for cache_type
  140  */
  141 #define DPT_NO_CACHE                    0
  142 #define DPT_CACHE_WRITETHROUGH          1
  143 #define DPT_CACHE_WRITEBACK             2
  144 
  145 #define min(a,b) ((a<b)?(a):(b))
  146 
  147 #define MAXISA                          4
  148 #define MAXEISA                         16
  149 #define MAXPCI                          16
  150 #define MAXIRQ                          16
  151 #define MAXTARGET                       16
  152 
  153 #define IS_ISA                          'I'
  154 #define IS_EISA                         'E'
  155 #define IS_PCI                          'P'
  156 
  157 #define BROKEN_INQUIRY  1
  158 
  159 #define BUSMASTER                       0xff
  160 #define PIO                             0xfe
  161 
  162 #define EATA_SIGNATURE                  0x41544145 /* little ENDIAN "EATA" */
  163 #define DPT_BLINK_INDICATOR             0x42445054
  164 
  165 #define DPT_ID1                         0x12
  166 #define DPT_ID2                         0x1
  167 #define ATT_ID1                         0x06
  168 #define ATT_ID2                         0x94
  169 #define ATT_ID3                         0x0
  170 
  171 #define NEC_ID1                         0x38
  172 #define NEC_ID2                         0xa3
  173 #define NEC_ID3                         0x82
  174 
  175 #define DPT_MAX_ADAPTERS                16
  176 #define MAX_PCI_DEVICES                 32 /* Maximum # Of Devices Per Bus */
  177 #define MAX_METHOD_2                    16 /* Max Devices For Method 2 */
  178 #define MAX_PCI_BUS                     16 /* Maximum # Of Busses Allowed */
  179 
  180 #define SG_SIZE                         64
  181 #define SG_SIZE_BIG                     252   /* max. 8096 elements, 64k */
  182 
  183 #define DPT_MAX_RETRIES                 2
  184 
  185 #define READ                            0
  186 #define WRITE                           1
  187 #define OTHER                           2
  188 
  189 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
  190 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
  191 #define SD(host) ((hostdata *)&(host->hostdata))
  192 
  193 #define BaseRegister(dpt)               ((dpt->v_membase == NULL)            \
  194                                 ? (u_int32_t)dpt->io_base                    \
  195                                 : (u_int32_t)dpt->v_membase )
  196 
  197 /*
  198  * EATA Command & Register definitions
  199  */
  200     
  201 #define PCI_REG_DPTconfig                       0x40
  202 #define PCI_REG_PumpModeAddress                 0x44
  203 #define PCI_REG_PumpModeData                    0x48
  204 #define PCI_REG_ConfigParam1                    0x50
  205 #define PCI_REG_ConfigParam2                    0x54
  206 
  207 #define EATA_CMD_PIO_SETUPTEST                  0xc6
  208 #define EATA_CMD_PIO_READ_CONFIG                0xf0
  209 #define EATA_CMD_PIO_SET_CONFIG                 0xf1
  210 #define EATA_CMD_PIO_SEND_CP                    0xf2
  211 #define EATA_CMD_PIO_RECEIVE_SP                 0xf3
  212 #define EATA_CMD_PIO_TRUNC                      0xf4
  213 
  214 #define EATA_CMD_RESET                          0xf9
  215 #define EATA_CMD_IMMEDIATE                      0xfa
  216 
  217 #define EATA_CMD_DMA_READ_CONFIG                0xfd
  218 #define EATA_CMD_DMA_SET_CONFIG                 0xfe
  219 #define EATA_CMD_DMA_SEND_CP                    0xff
  220 
  221 #define ECS_EMULATE_SENSE                       0xd4
  222 
  223 /*
  224  * Immediate Commands
  225  * Beware of this enumeration.  Not all commands are in sequence!
  226  */
  227 
  228 enum {
  229     EATA_GENERIC_ABORT,
  230     EATA_SPECIFIC_RESET,
  231     EATA_BUS_RESET,
  232     EATA_SPECIFIC_ABORT,
  233     EATA_QUIET_INTR,
  234     EATA_SMART_ROM_DL_EN,
  235     EATA_COLD_BOOT_HBA, /* Only as a last resort        */
  236     EATA_FORCE_IO,
  237     EATA_SCSI_BUS_OFFLINE,
  238     EATA_RESET_MASKED_BUS,
  239     EATA_POWER_OFF_WARN
  240 } dpt_immediate_cmd;
  241 
  242 #define HA_CTRLREG              0x206 /* control register for HBA */
  243 #define HA_CTRL_DISINT          0x02  /* CTRLREG: disable interrupts */
  244 #define HA_CTRL_RESCPU          0x04  /* CTRLREG: reset processo */
  245 #define HA_CTRL_8HEADS          0x08  /* CTRLREG: set for drives with
  246                                        * >=8 heads
  247                                        * (WD1003 rudimentary :-) */
  248 
  249 #define HA_WCOMMAND             0x07  /* command register offset        */
  250 #define HA_WIFC                 0x06  /* immediate command offset       */
  251 #define HA_WCODE                0x05
  252 #define HA_WCODE2               0x04
  253 #define HA_WDMAADDR             0x02  /* DMA address LSB offset */
  254 #define HA_RERROR               0x01  /* Error Register, offset 1 from base */
  255 #define HA_RAUXSTAT             0x08  /* aux status register offset */
  256 #define HA_RSTATUS              0x07  /* status register offset */
  257 #define HA_RDATA                0x00  /* data register (16bit)  */
  258 #define HA_WDATA                0x00  /* data register (16bit)  */
  259 
  260 #define HA_ABUSY                0x01  /* aux busy bit           */
  261 #define HA_AIRQ                 0x02  /* aux IRQ pending bit    */
  262 #define HA_SERROR               0x01  /* pr. command ended in error */
  263 #define HA_SMORE                0x02  /* more data soon to come */
  264 #define HA_SCORR                0x04  /* datio_addra corrected          */
  265 #define HA_SDRQ                 0x08  /* data request active    */
  266 #define HA_SSC                  0x10  /* seek complete          */
  267 #define HA_SFAULT               0x20  /* write fault            */
  268 #define HA_SREADY               0x40  /* drive ready            */
  269 #define HA_SBUSY                0x80  /* drive busy             */
  270 #define HA_SDRDY                HA_SSC+HA_SREADY+HA_SDRQ
  271 
  272 /*
  273  * Message definitions  
  274  */
  275 
  276 enum {
  277         HA_NO_ERROR,            /* No Error                             */
  278         HA_ERR_SEL_TO,          /* Selection Timeout                    */
  279         HA_ERR_CMD_TO,          /* Command Timeout                      */
  280         HA_SCSIBUS_RESET,
  281         HA_HBA_POWER_UP,        /* Initial Controller Power-up          */
  282         HA_UNX_BUSPHASE,        /* Unexpected Bus Phase                 */
  283         HA_UNX_BUS_FREE,        /* Unexpected Bus Free                  */
  284         HA_BUS_PARITY,          /* Bus Parity Error                     */
  285         HA_SCSI_HUNG,           /* SCSI Hung                            */
  286         HA_UNX_MSGRJCT,         /* Unexpected Message Rejected          */
  287         HA_RESET_STUCK,         /* SCSI Bus Reset Stuck                 */
  288         HA_RSENSE_FAIL,         /* Auto Request-Sense Failed            */
  289         HA_PARITY_ERR,          /* Controller Ram Parity Error          */
  290         HA_CP_ABORT_NA,         /* Abort Message sent to non-active cmd */
  291         HA_CP_ABORTED,          /* Abort Message sent to active cmd     */
  292         HA_CP_RESET_NA,         /* Reset Message sent to non-active cmd */
  293         HA_CP_RESET,            /* Reset Message sent to active cmd     */
  294         HA_ECC_ERR,             /* Controller Ram ECC Error             */
  295         HA_PCI_PARITY,          /* PCI Parity Error                     */
  296         HA_PCI_MABORT,          /* PCI Master Abort                     */
  297         HA_PCI_TABORT,          /* PCI Target Abort                     */
  298         HA_PCI_STABORT          /* PCI Signaled Target Abort            */
  299 } dpt_message;
  300 
  301 #define HA_INTR_OFF                     1
  302 #define HA_INTR_ON                      0
  303 
  304 /* IOCTL List */
  305 
  306 #define DPT_RW_CMD_LEN                  32
  307 #define DPT_RW_CMD_DUMP_SOFTC           "dump softc"
  308 #define DPT_RW_CMD_DUMP_SYSINFO         "dump sysinfo"
  309 #define DPT_RW_CMD_DUMP_METRICS         "dump metrics"
  310 #define DPT_RW_CMD_CLEAR_METRICS        "clear metrics"
  311 #define DPT_RW_CMD_SHOW_LED             "show LED"
  312 
  313 #define DPT_IOCTL_DRIVER                0X80000000
  314 #define DPT_IOCTL_INTERNAL_METRICS      (DPT_IOCTL_DRIVER | 0x00000001)
  315 #define DPT_IOCTL_SOFTC                 (DPT_IOCTL_DRIVER | 0x00000002)
  316 #define DPT_IOCTL_SEND                  (DPT_IOCTL_DRIVER | 0x00000004)
  317 
  318 /*
  319  *      Other   definitions
  320  */
  321 
  322 #define DptChannel(unit, bus)   ((bus) % (((unit) + 1) * 4))
  323 #define DPT_HCP_LENGTH(page)    (ntohs(*(int16_t *)(void *)(&page[2]))+4)
  324 #define DPT_HCP_FIRST(page)     (&page[4])
  325 #define DPT_HCP_NEXT(param)     (&param[3 + param[3] + 1])
  326 #define DPT_HCP_CODE(param)     (ntohs(*(int16_t *)(void *)param))
  327 
  328 /* HBA's Status port (register) bitmap */
  329 typedef struct reg_bit { /* reading this one will clear the interrupt */
  330     u_int8_t    error:1,        /* previous command ended in an error */
  331         more:1,         /* More DATA coming soon
  332                          * Poll BSY & DRQ (PIO)
  333                          */
  334         corr:1,         /*
  335                          * data read was successfully corrected with
  336                          * ECC
  337                          */
  338         drq:1,          /* data request active */
  339         sc:1,           /* seek complete */
  340         fault:1,        /* write fault */
  341         ready:1,        /* drive ready */
  342         busy:1;         /* controller busy */
  343 } dpt_status_reg_t;
  344 
  345 /* HBA's Auxiliary status port (register) bitmap */
  346 typedef struct reg_abit { /* reading this won't clear the interrupt */
  347     u_int8_t    abusy:1,        /* auxiliary busy */
  348         irq:1,                  /* set when drive interrupt is asserted */
  349         dummy:6;
  350 } dpt_aux_status_t;
  351 
  352 /* The whole Register Set as a structure */
  353 typedef struct eata_register {  /* EATA register set */
  354     u_int8_t    data_reg[2];    /* R, couldn't figure this one out */
  355     u_int8_t    cp_addr[4];     /* W, CP address register */
  356     union {
  357         u_int8_t        command;        /* 
  358                                         * W, command code: [read|set] conf,
  359                                         * send CP
  360                                         */
  361         struct reg_bit status; /* R, see register_bit1 */
  362         u_int8_t        statusbyte;
  363     } ovr;
  364     struct reg_abit aux_stat;   /* R, see register_bit2                 */
  365   }eata_reg_t;
  366 
  367 /* Holds the results of a READ_CONFIGURATION command
  368  * Beware of data items which are larger than 1 byte.
  369  * these come from the DPT in network order.
  370  * On an Intel ``CPU'' they will be upside down and backwards!
  371  * The dpt_get_conf function is normally responsible for flipping
  372  * Everything back.
  373  */
  374 typedef struct get_conf {  /* Read Configuration Array */
  375     union {
  376         struct {
  377             u_int8_t foo_DevType;
  378             u_int8_t foo_PageCode;
  379             u_int8_t foo_Reserved0; 
  380             u_int8_t foo_len;
  381         } foo;
  382         u_int32_t foo_length;   /* Should return 0x22, 0x24, etc */
  383     } bar;
  384 
  385 #define gcs_length              bar.foo_length
  386 #define gcs_PageCode            bar.foo.foo_DevType
  387 #define gcs_reserved0           bar.foo.foo_Reserved0
  388 #define gcs_len                 bar.foo.foo_len
  389 
  390     u_int32_t signature;        /* Signature MUST be "EATA".    ntohl()`ed */
  391         
  392     u_int8_t    version2:4,
  393         version:4;      /* EATA Version level */
  394 
  395     u_int8_t    OCS_enabled:1, /* Overlap Command Support enabled */
  396         TAR_support:1,  /* SCSI Target Mode supported */
  397         TRNXFR:1,       /* 
  398                          * Truncate Transfer Cmd not necessary Only
  399                          * used in PIO Mode
  400                          */
  401         MORE_support:1, /* MORE supported (only PIO Mode) */
  402         DMA_support:1,  /* DMA supported Driver uses only this mode */
  403         DMA_valid:1,            /* DRQ value in Byte 30 is valid */
  404         ATA:1,                  /* ATA device connected (not supported) */
  405         HAA_valid:1;            /* Hostadapter Address is valid */
  406 
  407     u_int16_t cppadlen; /*
  408                          * Number of pad bytes send after CD data set
  409                          * to zero for DMA commands. Ntohl()`ed
  410                          */
  411     u_int8_t    scsi_idS;       /* SCSI ID of controller 2-0 Byte 0 res. */
  412     u_int8_t    scsi_id2;       /* If not, zero is returned */
  413     u_int8_t    scsi_id1;
  414     u_int8_t    scsi_id0;
  415     u_int32_t cplen;    /* CP length: number of valid cp bytes  */
  416 
  417     u_int32_t splen;    /*
  418                          * Number of bytes returned after we receive
  419                          * SP command
  420                          */
  421     u_int16_t queuesiz; /* max number of queueable CPs */
  422 
  423     u_int16_t dummy;
  424     u_int16_t SGsiz;    /* max number of SG table entrie */
  425 
  426     u_int8_t    IRQ:4,          /* IRQ used this HBA */
  427         IRQ_TR:1,       /* IRQ Trigger: 0=edge, 1=level  */
  428         SECOND:1,       /* This is a secondary controller */
  429         DMA_channel:2;  /* DRQ index, DRQ is 2comp of DRQX */
  430 
  431     u_int8_t    sync;           /*
  432                                  * device at ID 7 tru 0 is running in
  433                                  * synchronous mode, this will disappear
  434                                  */
  435     u_int8_t    DSBLE:1,        /* ISA i/o addressing is disabled */
  436         FORCADR:1,      /* i/o address has been forced */
  437         SG_64K:1,
  438         SG_UAE:1,:4;
  439 
  440     u_int8_t    MAX_ID:5,       /* Max number of SCSI target IDs */
  441         MAX_CHAN:3;     /* Number of SCSI busses on HBA  */
  442 
  443     u_int8_t    MAX_LUN;        /* Max number of LUNs */
  444     u_int8_t    :3,
  445         AUTOTRM:1,
  446         M1_inst:1,
  447         ID_qest:1,      /* Raidnum ID is questionable */
  448         is_PCI:1,       /* HBA is PCI */
  449         is_EISA:1;      /* HBA is EISA */
  450 
  451     u_int8_t    RAIDNUM;        /* unique HBA identifier */
  452     u_int8_t    unused[4];      /* When doing PIO, you  GET 512 bytes */
  453     
  454     /* >>------>>       End of The DPT structure        <<------<< */
  455 
  456     u_int32_t length;   /* True length, after ntohl conversion  */
  457 } dpt_conf_t;
  458 
  459 /* Scatter-Gather list entry */
  460 typedef struct dpt_sg_segment {
  461     u_int32_t seg_addr; /* Network order physaddr Comes BEFORE length! */
  462     u_int32_t seg_len;
  463 } dpt_sg_t;
  464 
  465 
  466 /* Status Packet */
  467 typedef struct eata_sp {
  468     u_int8_t hba_stat:7,        /* HBA status */
  469         EOC:1;          /* True if command finished */
  470 
  471     u_int8_t scsi_stat; /* Target SCSI status */
  472 
  473     u_int8_t reserved[2];
  474 
  475     u_int32_t residue_len;      /* Number of bytes not transferred */
  476 
  477     void        *ccb;           /* ``Just a signature'' */
  478 
  479     u_int8_t    sp_ID_Message;
  480     u_int8_t    sp_Que_Message;
  481     u_int8_t    sp_Tag_Message;
  482     u_int8_t    msg[9];
  483 } dpt_sp_t;
  484 
  485 /*
  486  * A strange collection of O/S-Hardware releated bits and pieces.
  487  * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command.
  488  */
  489 
  490 typedef struct dpt_drive_parameters {
  491     u_int16_t   cylinders;       /* U pto 1024 */
  492     u_int8_t    heads;           /* U pto 255  */
  493     u_int8_t    sectors;         /* Up to 63   */
  494 } dpt_drive_t;
  495 
  496 typedef struct driveParam_S driveParam_T;
  497 
  498 #define SI_CMOS_Valid           0x0001
  499 #define SI_NumDrivesValid       0x0002
  500 #define SI_ProcessorValid       0x0004
  501 #define SI_MemorySizeValid      0x0008
  502 #define SI_DriveParamsValid     0x0010
  503 #define SI_SmartROMverValid     0x0020
  504 #define SI_OSversionValid       0x0040
  505 #define SI_OSspecificValid      0x0080  
  506 #define SI_BusTypeValid         0x0100
  507 
  508 #define SI_ALL_VALID            0x0FFF
  509 #define SI_NO_SmartROM          0x8000
  510 
  511 #define SI_ISA_BUS              0x00
  512 #define SI_MCA_BUS              0x01
  513 #define SI_EISA_BUS             0x02
  514 #define SI_PCI_BUS              0x04
  515 
  516 #define HBA_BUS_ISA             0x00
  517 #define HBA_BUS_EISA            0x01
  518 #define HBA_BUS_PCI             0x02
  519 
  520 typedef struct dpt_sysinfo {
  521     u_int8_t    drive0CMOS;             /* CMOS Drive 0 Type */
  522     u_int8_t    drive1CMOS;             /* CMOS Drive 1 Type */
  523     u_int8_t    numDrives;              /* 0040:0075 contents */
  524     u_int8_t    processorFamily;        /* Same as DPTSIG definition */
  525     u_int8_t    processorType;          /* Same as DPTSIG definition */
  526     u_int8_t    smartROMMajorVersion;
  527     u_int8_t    smartROMMinorVersion;   /* SmartROM version */
  528     u_int8_t    smartROMRevision;
  529     u_int16_t   flags;                  /* See bit definitions above */
  530     u_int16_t   conventionalMemSize;    /* in KB */
  531     u_int32_t   extendedMemSize;        /* in KB */
  532     u_int32_t   osType;                 /* Same as DPTSIG definition */
  533     u_int8_t    osMajorVersion;
  534     u_int8_t    osMinorVersion;         /* The OS version */
  535     u_int8_t    osRevision;
  536     u_int8_t    osSubRevision;
  537     u_int8_t    busType;                /* See defininitions above */
  538     u_int8_t    pad[3];                 /* For alignment */
  539     dpt_drive_t drives[16];             /* SmartROM Logical Drives */
  540 } dpt_sysinfo_t;
  541 
  542 /* SEND_COMMAND packet structure */
  543 typedef struct eata_ccb {       /* Send Command Packet structure */
  544     u_int8_t    SCSI_Reset:1,   /* Cause a SCSI Bus reset on the cmd */
  545         HBA_Init:1,             /* Cause Controller to reinitialize */
  546         Auto_Req_Sen:1,         /* Do Auto Request Sense on errors */
  547         scatter:1,              /* Data Ptr points to a SG Packet */
  548         Quick:1,                /* Set this one for NO Status PAcket */
  549         Interpret:1,            /* Interpret the SCSI cdb of own use */
  550         DataOut:1,              /* Data Out phase with command */
  551         DataIn:1;               /* Data In phase with command */
  552 
  553     u_int8_t    reqlen; /* Request Sense Length Valid if Auto_Req_Sen=1 */
  554     u_int8_t    unused[3];
  555     u_int8_t    FWNEST:1,       /* send cmd to phys RAID component */
  556         unused2:7;
  557 
  558     u_int8_t    Phsunit:1,      /* physical unit on mirrored pair */
  559         I_AT:1,                 /* inhibit address translation  */
  560         Disable_Cache:1,        /* HBA inhibit caching */
  561         unused3:5;
  562 
  563     u_int8_t    cp_id:5,        /* SCSI Device ID of target */
  564         cp_channel:3;           /* SCSI Channel # of HBA */
  565 
  566     u_int8_t    cp_LUN:3,
  567         :2,
  568         cp_luntar:1,            /* CP is for target ROUTINE */
  569         cp_dispri:1,            /* Grant disconnect privilege */
  570         cp_identify:1;          /* Always TRUE */
  571 
  572     u_int8_t cp_msg[3];         /* Message bytes 0-3 */
  573 
  574     union {
  575         struct {
  576             u_int8_t    x_scsi_cmd;     /* Partial SCSI CDB def */
  577 
  578             u_int8_t    x_extent:1,
  579                 x_bytchk:1,
  580                 x_reladr:1,
  581                 x_cmplst:1,
  582                 x_fmtdata:1,
  583                 x_lun:3;
  584 
  585             u_int8_t    x_page;
  586 
  587             u_int8_t    reserved4;
  588 
  589             u_int8_t    x_len;
  590 
  591             u_int8_t    x_link:1;
  592             u_int8_t    x_flag:1;
  593             u_int8_t    reserved5:4;
  594             u_int8_t    x_vendor:2;
  595         } x;
  596         u_int8_t        z[12];  /* Command Descriptor Block (= 12) */
  597     } cp_w;
  598 
  599 #define cp_cdb          cp_w.z
  600 #define cp_scsi_cmd     cp_w.x.x_scsi_cmd
  601 #define cp_extent       cp_w.x.x_extent
  602 #define cp_lun          cp_w.x.x_lun
  603 #define cp_page         cp_w.x.x_page 
  604 #define cp_len          cp_w.x.x_len
  605 
  606 #define MULTIFUNCTION_CMD        0x0e         /* SCSI Multi Function Cmd    */
  607 #define BUS_QUIET                0x04         /* Quite Scsi Bus Code        */
  608 #define BUS_UNQUIET              0x05         /* Un Quiet Scsi Bus Code     */
  609 
  610     u_int32_t cp_datalen;       /* Data Transfer Length. If scatter=1 len (IN
  611                                  * BYTES!) of the S/G array */
  612 
  613     u_int32_t cp_viraddr;       /* address of this ccb (unique tag)     */
  614     u_int32_t cp_dataDMA;       /* Data Address, if scatter=1 then it is the
  615                                 * address of scatter packet */
  616     u_int32_t cp_statDMA;       /* address for Status Packet */
  617     u_int32_t cp_reqDMA;        /*
  618                                  * Request Sense Address, used if CP command
  619                                  * ends with error
  620                                  */
  621 } eata_ccb_t;
  622 
  623 /* 
  624  * DPT Signature Structure.
  625  * Used by /dev/dpt to directly pass commands to the HBA
  626  * We hae more information here than we care for...
  627  */
  628 
  629 /* Current Signature Version - sigBYTE dsSigVersion; */
  630 #define SIG_VERSION 1
  631 
  632 /* 
  633  * Processor Family - sigBYTE dsProcessorFamily;        DISTINCT VALUE 
  634  *
  635  * What type of processor the file is meant to run on.
  636  * This will let us know whether to read sigWORDs as high/low or low/high.
  637  */
  638 #define PROC_INTEL      0x00            /* Intel 80x86 */
  639 #define PROC_MOTOROLA   0x01            /* Motorola 68K */
  640 #define PROC_MIPS4000   0x02            /* MIPS RISC 4000 */
  641 #define PROC_ALPHA      0x03            /* DEC Alpha */
  642 
  643 /* 
  644  * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS 
  645  *
  646  * Different bit definitions dependent on processor_family
  647  */
  648 
  649 /* PROC_INTEL: */
  650 #define PROC_8086               0x01    /* Intel 8086 */
  651 #define PROC_286                0x02    /* Intel 80286 */
  652 #define PROC_386                0x04    /* Intel 80386 */
  653 #define PROC_486                0x08    /* Intel 80486 */
  654 #define PROC_PENTIUM            0x10    /* Intel 586 aka P5 aka Pentium */
  655 #define PROC_P6                 0x20    /* Intel 686 aka P6 */
  656 
  657 /* PROC_MOTOROLA: */
  658 #define PROC_68000              0x01    /* Motorola 68000 */
  659 #define PROC_68020              0x02    /* Motorola 68020 */
  660 #define PROC_68030              0x04    /* Motorola 68030 */
  661 #define PROC_68040              0x08    /* Motorola 68040 */
  662 
  663 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */
  664 #define FT_EXECUTABLE   0       /* Executable Program */
  665 #define FT_SCRIPT       1       /* Script/Batch File??? */
  666 #define FT_HBADRVR      2       /* HBA Driver */
  667 #define FT_OTHERDRVR    3       /* Other Driver */
  668 #define FT_IFS          4       /* Installable Filesystem Driver */
  669 #define FT_ENGINE       5       /* DPT Engine */
  670 #define FT_COMPDRVR     6       /* Compressed Driver Disk */
  671 #define FT_LANGUAGE     7       /* Foreign Language file */
  672 #define FT_FIRMWARE     8       /* Downloadable or actual Firmware */
  673 #define FT_COMMMODL     9       /* Communications Module */
  674 #define FT_INT13        10      /* INT 13 style HBA Driver */
  675 #define FT_HELPFILE     11      /* Help file */
  676 #define FT_LOGGER       12      /* Event Logger */
  677 #define FT_INSTALL      13      /* An Install Program */
  678 #define FT_LIBRARY      14      /* Storage Manager Real-Mode Calls */
  679 #define FT_RESOURCE     15      /* Storage Manager Resource File */
  680 #define FT_MODEM_DB     16      /* Storage Manager Modem Database */
  681 
  682 /* Filetype flags - sigBYTE dsFiletypeFlags;            FLAG BITS */
  683 #define FTF_DLL         0x01    /* Dynamic Link Library */
  684 #define FTF_NLM         0x02    /* Netware Loadable Module */
  685 #define FTF_OVERLAYS    0x04    /* Uses overlays */
  686 #define FTF_DEBUG       0x08    /* Debug version */
  687 #define FTF_TSR         0x10    /* TSR */
  688 #define FTF_SYS         0x20    /* DOS Lodable driver */
  689 #define FTF_PROTECTED   0x40    /* Runs in protected mode */
  690 #define FTF_APP_SPEC    0x80    /* Application Specific */
  691 
  692 /* OEM - sigBYTE dsOEM;         DISTINCT VALUES */
  693 #define OEM_DPT         0       /* DPT */
  694 #define OEM_ATT         1       /* ATT */
  695 #define OEM_NEC         2       /* NEC */
  696 #define OEM_ALPHA       3       /* Alphatronix */
  697 #define OEM_AST         4       /* AST */
  698 #define OEM_OLIVETTI    5       /* Olivetti */
  699 #define OEM_SNI         6       /* Siemens/Nixdorf */
  700 
  701 /* Operating System     - sigLONG dsOS;         FLAG BITS */
  702 #define OS_DOS          0x00000001      /* PC/MS-DOS */
  703 #define OS_WINDOWS      0x00000002      /* Microsoft Windows 3.x */
  704 #define OS_WINDOWS_NT   0x00000004      /* Microsoft Windows NT */
  705 #define OS_OS2M         0x00000008      /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */
  706 #define OS_OS2L         0x00000010      /* Microsoft OS/2 1.301 - LADDR */
  707 #define OS_OS22x        0x00000020      /* IBM OS/2 2.x */
  708 #define OS_NW286        0x00000040      /* Novell NetWare 286 */
  709 #define OS_NW386        0x00000080      /* Novell NetWare 386 */
  710 #define OS_GEN_UNIX     0x00000100      /* Generic Unix */
  711 #define OS_SCO_UNIX     0x00000200      /* SCO Unix */
  712 #define OS_ATT_UNIX     0x00000400      /* ATT Unix */
  713 #define OS_UNIXWARE     0x00000800      /* UnixWare Unix */
  714 #define OS_INT_UNIX     0x00001000      /* Interactive Unix */
  715 #define OS_SOLARIS      0x00002000      /* SunSoft Solaris */
  716 #define OS_QNX          0x00004000      /* QNX for Tom Moch */
  717 #define OS_NEXTSTEP     0x00008000      /* NeXTSTEP */
  718 #define OS_BANYAN       0x00010000      /* Banyan Vines */
  719 #define OS_OLIVETTI_UNIX 0x00020000     /* Olivetti Unix */
  720 #define OS_FREEBSD      0x00040000      /* FreeBSD 2.2 and later */
  721 #define OS_OTHER        0x80000000      /* Other */
  722 
  723 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */
  724 #define CAP_RAID0       0x0001  /* RAID-0 */
  725 #define CAP_RAID1       0x0002  /* RAID-1 */
  726 #define CAP_RAID3       0x0004  /* RAID-3 */
  727 #define CAP_RAID5       0x0008  /* RAID-5 */
  728 #define CAP_SPAN        0x0010  /* Spanning */
  729 #define CAP_PASS        0x0020  /* Provides passthrough */
  730 #define CAP_OVERLAP     0x0040  /* Passthrough supports overlapped commands */
  731 #define CAP_ASPI        0x0080  /* Supports ASPI Command Requests */
  732 #define CAP_ABOVE16MB   0x0100  /* ISA Driver supports greater than 16MB */
  733 #define CAP_EXTEND      0x8000  /* Extended info appears after description */
  734 
  735 /* Devices Supported - sigWORD dsDeviceSupp;            FLAG BITS */
  736 #define DEV_DASD        0x0001  /* DASD (hard drives) */
  737 #define DEV_TAPE        0x0002  /* Tape drives */
  738 #define DEV_PRINTER     0x0004  /* Printers */
  739 #define DEV_PROC        0x0008  /* Processors */
  740 #define DEV_WORM        0x0010  /* WORM drives */
  741 #define DEV_CDROM       0x0020  /* CD-ROM drives */
  742 #define DEV_SCANNER     0x0040  /* Scanners */
  743 #define DEV_OPTICAL     0x0080  /* Optical Drives */
  744 #define DEV_JUKEBOX     0x0100  /* Jukebox */
  745 #define DEV_COMM        0x0200  /* Communications Devices */
  746 #define DEV_OTHER       0x0400  /* Other Devices */
  747 #define DEV_ALL         0xFFFF  /* All SCSI Devices */
  748 
  749 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */
  750 #define ADF_2001        0x0001  /* PM2001 */
  751 #define ADF_2012A       0x0002  /* PM2012A */
  752 #define ADF_PLUS_ISA    0x0004  /* PM2011,PM2021 */
  753 #define ADF_PLUS_EISA   0x0008  /* PM2012B,PM2022 */
  754 #define ADF_SC3_ISA     0x0010  /* PM2021 */
  755 #define ADF_SC3_EISA    0x0020  /* PM2022,PM2122, etc */
  756 #define ADF_SC3_PCI     0x0040  /* SmartCache III PCI */
  757 #define ADF_SC4_ISA     0x0080  /* SmartCache IV ISA */
  758 #define ADF_SC4_EISA    0x0100  /* SmartCache IV EISA */
  759 #define ADF_SC4_PCI     0x0200  /* SmartCache IV PCI */
  760 #define ADF_ALL_MASTER  0xFFFE  /* All bus mastering */
  761 #define ADF_ALL_CACHE   0xFFFC  /* All caching */
  762 #define ADF_ALL         0xFFFF  /* ALL DPT adapters */
  763 
  764 /* Application - sigWORD dsApplication;                         FLAG BITS */
  765 #define APP_DPTMGR      0x0001  /* DPT Storage Manager */
  766 #define APP_ENGINE      0x0002  /* DPT Engine */
  767 #define APP_SYTOS       0x0004  /* Sytron Sytos Plus */
  768 #define APP_CHEYENNE    0x0008  /* Cheyenne ARCServe + ARCSolo */
  769 #define APP_MSCDEX      0x0010  /* Microsoft CD-ROM extensions */
  770 #define APP_NOVABACK    0x0020  /* NovaStor Novaback */
  771 #define APP_AIM         0x0040  /* Archive Information Manager */
  772 
  773 /* Requirements - sigBYTE dsRequirements;       FLAG BITS */
  774 #define REQ_SMARTROM    0x01    /* Requires SmartROM to be present */
  775 #define REQ_DPTDDL      0x02    /* Requires DPTDDL.SYS to be loaded */
  776 #define REQ_HBA_DRIVER  0x04    /* Requires an HBA driver to be loaded  */
  777 #define REQ_ASPI_TRAN   0x08    /* Requires an ASPI Transport Modules   */
  778 #define REQ_ENGINE      0x10    /* Requires a DPT Engine to be loaded   */
  779 #define REQ_COMM_ENG    0x20    /* Requires a DPT Communications Engine */
  780 
  781 typedef struct dpt_sig {
  782     char        dsSignature[6];         /* ALWAYS "dPtSiG" */
  783     u_int8_t    SigVersion;             /* signature version (currently 1) */
  784     u_int8_t    ProcessorFamily;        /* what type of processor */
  785     u_int8_t    Processor;              /* precise processor */
  786     u_int8_t    Filetype;               /* type of file */
  787     u_int8_t    FiletypeFlags;          /* flags to specify load type, etc. */
  788     u_int8_t    OEM;                    /* OEM file was created for */
  789     u_int32_t   OS;                     /* which Operating systems */
  790     u_int16_t   Capabilities;           /* RAID levels, etc. */
  791     u_int16_t   DeviceSupp;             /* Types of SCSI devices supported */
  792     u_int16_t   AdapterSupp;            /* DPT adapter families supported */
  793     u_int16_t   Application;            /* applications file is for */
  794     u_int8_t    Requirements;           /* Other driver dependencies */
  795     u_int8_t    Version;                /* 1 */
  796     u_int8_t    Revision;               /* 'J' */
  797     u_int8_t    SubRevision;            /* '9'  ' ' if N/A */
  798     u_int8_t    Month;                  /* creation month */
  799     u_int8_t    Day;                    /* creation day */
  800     u_int8_t    Year;                   /* creation year since 1980  */
  801     char        *Description;   /* description (NULL terminated) */
  802 } dpt_sig_t;
  803 
  804 /* 32 bytes minimum - with no description.      Put NULL at description[0] */
  805 /* 81 bytes maximum - with 49 character description plus NULL. */
  806 
  807 /* This line added at Roycroft's request */
  808 /* Microsoft's NT compiler gets confused if you do a pack and don't */
  809 /* restore it. */
  810 
  811 typedef struct eata_pass_through {
  812     u_int8_t    eataID[4];
  813     u_int32_t   command;
  814 
  815 #define EATAUSRCMD      (('D'<<8)|65)   /* EATA PassThrough Command     */
  816 #define DPT_SIGNATURE   (('D'<<8)|67)   /* Get Signature Structure */
  817 #define DPT_NUMCTRLS    (('D'<<8)|68)   /* Get Number Of DPT Adapters */
  818 #define DPT_CTRLINFO    (('D'<<8)|69)   /* Get Adapter Info Structure */ 
  819 #define DPT_SYSINFO     (('D'<<8)|72)   /* Get System Info Structure    */
  820 #define DPT_BLINKLED    (('D'<<8)|75)   /* Get The BlinkLED Status */
  821 
  822     u_int8_t    *command_buffer;
  823     eata_ccb_t command_packet;
  824     u_int32_t   timeout;
  825     u_int8_t    host_status;
  826     u_int8_t    target_status;
  827     u_int8_t    retries;
  828 } eata_pt_t;
  829 
  830 typedef struct dpt_ccb {
  831     TAILQ_ENTRY(dpt_ccb) links;
  832 
  833     struct scsi_xfer *xs;       /* the scsi_xfer for this cmd */
  834     u_int32_t flags;
  835     u_int32_t state;
  836 /* we need this one for user commands */
  837 #define DPT_CCB_STATE_COMPLETED                 0x00000040
  838 
  839 #ifdef DPT_TRACK_CCB_STATES
  840 #define DPT_CCB_STATE_FREE                      0x00000001
  841 #define DPT_CCB_STATE_FREE2WAITING              0x00000002
  842 #define DPT_CCB_STATE_WAITING                   0x00000004
  843 #define DPT_CCB_STATE_WAITING2SUBMITTED         0x00000008
  844 #define DPT_CCB_STATE_SUBMITTED                 0x00000010
  845 #define DPT_CCB_STATE_SUBMITTED2COMPLETED       0x00000020
  846 #define DPT_CCB_STATE_COMPLETED                 0x00000040
  847 #define DPT_CCB_STATE_COMPLETED2DONE            0x00000080
  848 #define DPT_CCB_STATE_COMPLETED2FREE            0x00000100
  849 #define DPT_CCB_STATE_DONE                      0x00000200
  850 #define DPT_CCB_STATE_MARKED_LOST               0x00000400
  851 #define DPT_CCB_STATE_MARKED_SALVAGED           0x00000800
  852 #define DPT_CCB_STATE_ABORTED                   0x00001000
  853 #endif /* DPT_TRACK_CCB_STATES */
  854 
  855 #ifdef DPT_ABORT_LOSERS
  856 #define DPT_CCB_STATE_MARKED_LOST               0x00000400
  857 #endif
  858 
  859     struct      scsi_sense_data sense_data;
  860     eata_ccb_t  eata_ccb;
  861     u_int32_t   timeout;
  862     u_int8_t    retries;
  863     u_int8_t    status; /* status of this queueslot */
  864     u_int8_t    *cmd;   /* address of cmd */
  865     dpt_sg_t    *sg_list;
  866     volatile    dpt_sp_t status_packet;
  867     u_int8_t    status_reg;
  868     u_int8_t    aux_status_reg;
  869 
  870     u_int32_t   transaction_id;
  871 
  872 #ifdef DPT_MEASURE_PERFORMANCE
  873     u_int32_t submitted_time;
  874     struct timeval command_started, command_ended;
  875 #endif
  876 } dpt_ccb_t;
  877 
  878 /*
  879  * This is provided for compatability with UnixWare only.
  880  * Some of the fields may be bogus.
  881  * Others may have a totally different meaning.
  882  */
  883 
  884 typedef struct dpt_scsi_ha {
  885     u_int32_t   ha_state;       /* Operational state */
  886     u_int8_t    ha_id[4];       /* Host adapter SCSI ids */
  887     int         ha_vect;        /* Interrupt vector number */
  888     int32_t     ha_base;        /* Base I/O address */
  889     int         ha_max_jobs;    /* Max number of Active Jobs */
  890     int         ha_cache:2;     /* Cache parameters */
  891     int         ha_cachesize:30;/* In meg, only if cache present*/
  892     int         ha_nbus;        /* Number Of Busses on HBA */
  893     int         ha_ntargets;    /* Number Of Targets Supported */
  894     int         ha_nluns;       /* Number Of LUNs Supported */
  895     int         ha_tshift;      /* Shift value for target */
  896     int         ha_bshift;      /* Shift value for bus */
  897     int         ha_npend;       /* # of jobs sent to HBA */
  898     int         ha_active_jobs; /* Number Of Active Jobs         */
  899     char        ha_fw_version[4];/* Firmware Revision Level */
  900     void        *ha_ccb;        /* Controller command blocks */
  901     void        *ha_cblist;     /* Command block free list */
  902     void        *ha_dev;        /* Logical unit queues */
  903     void        *ha_StPkt_lock; /* Status Packet Lock */
  904     void        *ha_ccb_lock;   /* CCB Lock */
  905     void        *ha_LuQWaiting; /* Lu Queue Waiting List */
  906     void        *ha_QWait_lock; /* Device Que Waiting Lock */
  907     int         ha_QWait_opri;  /* Saved Priority Level */
  908 #ifdef DPT_TARGET_MODE
  909     dpt_ccb_t   *target_ccb[4]; /* Command block always waiting writebuf */
  910 #endif
  911 } dpt_compat_ha_t;
  912 
  913 /*
  914  * Describe the Inquiry Data returned on Page 0 from the Adapter. The
  915  * Page C1 Inquiry Data is described in the DptConfig_t structure above.
  916  */
  917 typedef struct {
  918     u_int8_t    deviceType;
  919     u_int8_t    rm_dtq;
  920     u_int8_t    otherData[6];
  921     u_int8_t    vendor[8];
  922     u_int8_t    modelNum[16];
  923     u_int8_t    firmware[4];
  924     u_int8_t    protocol[4];
  925 } dpt_inq_t;
  926 
  927 /*
  928  *                      sp_EOC is not `safe', so I will check sp_Messages[0] instead!
  929  */
  930 #define DptStat_BUSY(x)         ((x)->sp_ID_Message)
  931 #define DptStat_Reset_BUSY(x)                   \
  932 ( (x)->msg[0] = 0xA5, (x)->EOC = 0,             \
  933   (x)->ccb = (struct eata_ccb *)NULL )
  934 
  935 #ifdef DPT_MEASURE_PERFORMANCE
  936 typedef struct dpt_metrics {
  937     u_int32_t   command_count[256]; /* We assume MAX 256 SCSI commands */
  938     u_int32_t   max_command_time[256];
  939     u_int32_t   min_command_time[256];
  940 
  941     u_int32_t   min_intr_time;
  942     u_int32_t   max_intr_time;
  943     u_int32_t   aborted_interrupts;
  944     u_int32_t   spurious_interrupts;
  945 
  946     u_int32_t   max_waiting_count;
  947     u_int32_t   max_submit_count;
  948     u_int32_t   max_complete_count;
  949     
  950     u_int32_t   min_waiting_time;
  951     u_int32_t   min_submit_time;
  952     u_int32_t   min_complete_time;
  953     
  954     u_int32_t   max_waiting_time; 
  955     u_int32_t   max_submit_time;
  956     u_int32_t   max_complete_time;
  957     
  958     u_int32_t   command_collisions;
  959     u_int32_t   command_too_busy;
  960     u_int32_t   max_eata_tries;
  961     u_int32_t   min_eata_tries;
  962 
  963     u_int32_t   read_by_size_count[10];
  964     u_int32_t   write_by_size_count[10];
  965     u_int32_t   read_by_size_min_time[10];
  966     u_int32_t   read_by_size_max_time[10];
  967     u_int32_t   write_by_size_min_time[10];
  968     u_int32_t   write_by_size_max_time[10];
  969 
  970 #define SIZE_512        0
  971 #define SIZE_1K         1
  972 #define SIZE_2K         2
  973 #define SIZE_4K         3
  974 #define SIZE_8K         4
  975 #define SIZE_16K        5
  976 #define SIZE_32K        6
  977 #define SIZE_64K        7
  978 #define SIZE_BIGGER     8
  979 #define SIZE_OTHER      9
  980 
  981     struct      timeval intr_started;
  982 } dpt_perf_t;
  983 #endif
  984 
  985 
  986 typedef struct dpt_softc {
  987     int         unit;   /* 
  988                          * Are we /dev/dpt0. /dev/dpt1, etc?
  989                          * (Controller number) 
  990                          */
  991     u_int32_t   handle_interrupts:1,    /* Are we rready to do real work? */
  992         spare:31;
  993 
  994     TAILQ_ENTRY(dpt_softc) links;
  995 
  996     int         total_ccbs_count;
  997     int         free_ccbs_count;
  998     int         waiting_ccbs_count; 
  999     int         submitted_ccbs_count;
 1000     int         completed_ccbs_count;
 1001 
 1002     u_int32_t queue_status;
 1003     u_int32_t free_lock;
 1004     u_int32_t waiting_lock;
 1005     u_int32_t submitted_lock; 
 1006     u_int32_t completed_lock;
 1007 
 1008 #define DPT_QUEUES_NONE_ACTIVE          0x00000000
 1009 #define DPT_FREE_QUEUE_ACTIVE           0x00000001
 1010 #define DPT_WAITING_QUEUE_ACTIVE        0x00000002
 1011 #define DPT_SUBMITTED_QUEUE_ACTIVE      0x00000004
 1012 #define DPT_COMPLETED_QUEUE_ACTIVE      0x00000008
 1013 #define DPT_SINTR_ACTIVE                0x00000010
 1014 
 1015     TAILQ_HEAD(, dpt_ccb) free_ccbs;
 1016     TAILQ_HEAD(, dpt_ccb) waiting_ccbs;
 1017     TAILQ_HEAD(, dpt_ccb) submitted_ccbs;
 1018     TAILQ_HEAD(, dpt_ccb) completed_ccbs;
 1019 
 1020     u_int32_t commands_processed;
 1021 
 1022 #ifdef DPT_MEASURE_PERFORMANCE
 1023     dpt_perf_t  performance;
 1024 #endif
 1025 
 1026     /*
 1027      * These three parameters can be used to allow for wide scsi, and
 1028      * for host adapters that support multiple busses The first two
 1029      * should be set to 1 more than the actual max id or lun (i.e. 8 for
 1030      * normal systems).
 1031      */
 1032     u_int32_t           max_id;
 1033     u_int32_t           max_lun;
 1034 
 1035     u_int16_t           io_base; 
 1036     volatile u_int8_t   *v_membase;
 1037     volatile u_int8_t   *p_membase;
 1038 
 1039     u_int8_t            irq;
 1040     u_int8_t            dma_channel;
 1041 
 1042     /* Up to 4 (3 really) busses per controller. */
 1043     struct scsi_link sc_scsi_link[4];
 1044 
 1045     dpt_inq_t           board_data;
 1046     u_int8_t            EATA_revision;
 1047     u_int8_t            bustype;        /* bustype of HBA               */
 1048     u_int8_t            channels;       /* # of avail scsi chan.        */
 1049     u_int32_t           state;          /* state of HBA                 */
 1050 
 1051 #define DPT_HA_FREE             0x00000000
 1052 #define DPT_HA_OK               0x00000000
 1053 #define DPT_HA_NO_TIMEOUT       0x00000000
 1054 #define DPT_HA_BUSY             0x00000001
 1055 #define DPT_HA_TIMEOUT          0x00000002
 1056 #define DPT_HA_RESET            0x00000004
 1057 #define DPT_HA_LOCKED           0x00000008
 1058 #define DPT_HA_ABORTED          0x00000010
 1059 #define DPT_HA_CONTROL_ACTIVE   0x00000020
 1060 #define DPT_HA_SHUTDOWN_ACTIVE  0x00000040
 1061 #define DPT_HA_COMMAND_ACTIVE   0x00000080
 1062 #define DPT_HA_QUIET            0x00000100
 1063 
 1064 #ifdef DPT_HANDLE_TIMEOUTS
 1065 #define DPT_HA_TIMEOUTS_SET     0x40000000
 1066 #define DPT_HA_TIMEOUTS_ACTIVE  0x80000000
 1067 #endif
 1068 
 1069     u_int8_t            primary;        /* true if primary */   
 1070     u_int8_t            more_support:1, /* HBA supports MORE flag */
 1071         immediate_support:1,            /* HBA supports IMMEDIATE */
 1072         broken_INQUIRY:1;               /* EISA HBA with broken INQUIRY */
 1073     u_int8_t            resetlevel[MAX_CHANNELS];
 1074     u_int32_t           last_ccb;       /* Last used ccb */
 1075     u_int32_t           cplen;          /* size of CP in words */
 1076     u_int16_t           cppadlen;       /* pad length of cp */
 1077     u_int16_t           queuesize;
 1078     u_int16_t           sgsize;         /* Entries in the SG list */
 1079     u_int8_t            hostid[4];      /* SCSI ID of HBA */
 1080     u_int32_t           cache_type:2,
 1081         cache_size:30;
 1082 
 1083     volatile dpt_sp_t   sp;             /* status packet */
 1084 } dpt_softc_t;
 1085 
 1086 /*
 1087  * Externals:
 1088  * These all come from dpt_scsi.c
 1089  *
 1090  */
 1091 
 1092 #ifndef _DPT_C_
 1093 
 1094 extern TAILQ_HEAD(, dpt_softc) dpt_softc_list;
 1095 
 1096 extern int              dpt_controllers_present;
 1097 extern void             hex_dump(u_char * data, int length,
 1098                                  char *name, int no);
 1099 extern char             *i2bin(unsigned int no, int length);
 1100 extern char             *scsi_cmd_name(u_int8_t cmd);
 1101 extern dpt_conf_t       *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page,
 1102                                       u_int8_t target, u_int8_t size,
 1103                                       int extent);
 1104 extern void             dpt_intr(void *arg);
 1105 extern int              dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf);
 1106 extern int              dpt_attach(dpt_softc_t * dpt);
 1107 extern void             dpt_shutdown(int howto, dpt_softc_t *dpt);
 1108 extern void             dpt_detect_cache(dpt_softc_t *dpt);
 1109 extern int              dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd,
 1110                                      caddr_t cmdarg, int minor_no);
 1111 
 1112 extern u_int8_t         dpt_blinking_led(dpt_softc_t *dpt);
 1113 
 1114 #endif /* _DPT_C_ */
 1115 
 1116 #endif /* _DPT_H */
 1117 

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