Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/dpt/dpt_scsi.c
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1 /*- 2 * Copyright (c) 1997 by Simon Shapiro 3 * All Rights Reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD: releng/9.0/sys/dev/dpt/dpt_scsi.c 201807 2010-01-08 17:20:41Z trasz $"); 32 33 /* 34 * dpt_scsi.c: SCSI dependant code for the DPT driver 35 * 36 * credits: Assisted by Mike Neuffer in the early low level DPT code 37 * Thanx to Mark Salyzyn of DPT for his assistance. 38 * Special thanx to Justin Gibbs for invaluable help in 39 * making this driver look and work like a FreeBSD component. 40 * Last but not least, many thanx to UCB and the FreeBSD 41 * team for creating and maintaining such a wonderful O/S. 42 * 43 * TODO: * Add ISA probe code. 44 * * Add driver-level RAID-0. This will allow interoperability with 45 * NiceTry, M$-Doze, Win-Dog, Slowlaris, etc., in recognizing RAID 46 * arrays that span controllers (Wow!). 47 */ 48 49 #define _DPT_C_ 50 51 #include "opt_dpt.h" 52 #include "opt_eisa.h" 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/eventhandler.h> 57 #include <sys/malloc.h> 58 #include <sys/kernel.h> 59 60 #include <sys/bus.h> 61 62 #include <machine/bus.h> 63 64 #include <machine/resource.h> 65 #include <sys/rman.h> 66 67 68 #include <cam/cam.h> 69 #include <cam/cam_ccb.h> 70 #include <cam/cam_sim.h> 71 #include <cam/cam_xpt_sim.h> 72 #include <cam/cam_debug.h> 73 #include <cam/scsi/scsi_all.h> 74 #include <cam/scsi/scsi_message.h> 75 76 #include <vm/vm.h> 77 #include <vm/pmap.h> 78 79 #include <dev/dpt/dpt.h> 80 81 /* dpt_isa.c, dpt_eisa.c, and dpt_pci.c need this in a central place */ 82 int dpt_controllers_present; 83 devclass_t dpt_devclass; 84 85 #define microtime_now dpt_time_now() 86 87 #define dpt_inl(dpt, port) \ 88 bus_space_read_4((dpt)->tag, (dpt)->bsh, port) 89 #define dpt_inb(dpt, port) \ 90 bus_space_read_1((dpt)->tag, (dpt)->bsh, port) 91 #define dpt_outl(dpt, port, value) \ 92 bus_space_write_4((dpt)->tag, (dpt)->bsh, port, value) 93 #define dpt_outb(dpt, port, value) \ 94 bus_space_write_1((dpt)->tag, (dpt)->bsh, port, value) 95 96 /* 97 * These will have to be setup by parameters passed at boot/load time. For 98 * perfromance reasons, we make them constants for the time being. 99 */ 100 #define dpt_min_segs DPT_MAX_SEGS 101 #define dpt_max_segs DPT_MAX_SEGS 102 103 /* Definitions for our use of the SIM private CCB area */ 104 #define ccb_dccb_ptr spriv_ptr0 105 #define ccb_dpt_ptr spriv_ptr1 106 107 /* ================= Private Inline Function declarations ===================*/ 108 static __inline int dpt_just_reset(dpt_softc_t * dpt); 109 static __inline int dpt_raid_busy(dpt_softc_t * dpt); 110 #ifdef DEV_EISA 111 static __inline int dpt_pio_wait (u_int32_t, u_int, u_int, u_int); 112 #endif 113 static __inline int dpt_wait(dpt_softc_t *dpt, u_int bits, 114 u_int state); 115 static __inline struct dpt_ccb* dptgetccb(struct dpt_softc *dpt); 116 static __inline void dptfreeccb(struct dpt_softc *dpt, 117 struct dpt_ccb *dccb); 118 static __inline bus_addr_t dptccbvtop(struct dpt_softc *dpt, 119 struct dpt_ccb *dccb); 120 121 static __inline int dpt_send_immediate(dpt_softc_t *dpt, 122 eata_ccb_t *cmd_block, 123 u_int32_t cmd_busaddr, 124 u_int retries, 125 u_int ifc, u_int code, 126 u_int code2); 127 128 /* ==================== Private Function declarations =======================*/ 129 static void dptmapmem(void *arg, bus_dma_segment_t *segs, 130 int nseg, int error); 131 132 static struct sg_map_node* 133 dptallocsgmap(struct dpt_softc *dpt); 134 135 static int dptallocccbs(dpt_softc_t *dpt); 136 137 static int dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb, 138 u_int32_t dccb_busaddr, u_int size, 139 u_int page, u_int target, int extent); 140 static void dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, 141 u_int32_t dccb_busaddr, 142 u_int8_t *buff); 143 144 static void dpt_poll(struct cam_sim *sim); 145 146 static void dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, 147 int nseg, int error); 148 149 static void dpt_action(struct cam_sim *sim, union ccb *ccb); 150 151 static int dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd, 152 u_int32_t cmd_busaddr, 153 u_int command, u_int retries, 154 u_int ifc, u_int code, 155 u_int code2); 156 static void dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb, 157 union ccb *ccb, u_int hba_stat, 158 u_int scsi_stat, u_int32_t resid); 159 160 static void dpttimeout(void *arg); 161 static void dptshutdown(void *arg, int howto); 162 163 /* ================= Private Inline Function definitions ====================*/ 164 static __inline int 165 dpt_just_reset(dpt_softc_t * dpt) 166 { 167 if ((dpt_inb(dpt, 2) == 'D') 168 && (dpt_inb(dpt, 3) == 'P') 169 && (dpt_inb(dpt, 4) == 'T') 170 && (dpt_inb(dpt, 5) == 'H')) 171 return (1); 172 else 173 return (0); 174 } 175 176 static __inline int 177 dpt_raid_busy(dpt_softc_t * dpt) 178 { 179 if ((dpt_inb(dpt, 0) == 'D') 180 && (dpt_inb(dpt, 1) == 'P') 181 && (dpt_inb(dpt, 2) == 'T')) 182 return (1); 183 else 184 return (0); 185 } 186 187 #ifdef DEV_EISA 188 static __inline int 189 dpt_pio_wait (u_int32_t base, u_int reg, u_int bits, u_int state) 190 { 191 int i; 192 u_int c; 193 194 for (i = 0; i < 20000; i++) { /* wait 20ms for not busy */ 195 c = inb(base + reg) & bits; 196 if (!(c == state)) 197 return (0); 198 else 199 DELAY(50); 200 } 201 return (-1); 202 } 203 #endif 204 205 static __inline int 206 dpt_wait(dpt_softc_t *dpt, u_int bits, u_int state) 207 { 208 int i; 209 u_int c; 210 211 for (i = 0; i < 20000; i++) { /* wait 20ms for not busy */ 212 c = dpt_inb(dpt, HA_RSTATUS) & bits; 213 if (c == state) 214 return (0); 215 else 216 DELAY(50); 217 } 218 return (-1); 219 } 220 221 static __inline struct dpt_ccb* 222 dptgetccb(struct dpt_softc *dpt) 223 { 224 struct dpt_ccb* dccb; 225 int s; 226 227 s = splcam(); 228 if ((dccb = SLIST_FIRST(&dpt->free_dccb_list)) != NULL) { 229 SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links); 230 dpt->free_dccbs--; 231 } else if (dpt->total_dccbs < dpt->max_dccbs) { 232 dptallocccbs(dpt); 233 dccb = SLIST_FIRST(&dpt->free_dccb_list); 234 if (dccb == NULL) 235 printf("dpt%d: Can't malloc DCCB\n", dpt->unit); 236 else { 237 SLIST_REMOVE_HEAD(&dpt->free_dccb_list, links); 238 dpt->free_dccbs--; 239 } 240 } 241 splx(s); 242 243 return (dccb); 244 } 245 246 static __inline void 247 dptfreeccb(struct dpt_softc *dpt, struct dpt_ccb *dccb) 248 { 249 int s; 250 251 s = splcam(); 252 if ((dccb->state & DCCB_ACTIVE) != 0) 253 LIST_REMOVE(&dccb->ccb->ccb_h, sim_links.le); 254 if ((dccb->state & DCCB_RELEASE_SIMQ) != 0) 255 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 256 else if (dpt->resource_shortage != 0 257 && (dccb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) { 258 dccb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 259 dpt->resource_shortage = FALSE; 260 } 261 dccb->state = DCCB_FREE; 262 SLIST_INSERT_HEAD(&dpt->free_dccb_list, dccb, links); 263 ++dpt->free_dccbs; 264 splx(s); 265 } 266 267 static __inline bus_addr_t 268 dptccbvtop(struct dpt_softc *dpt, struct dpt_ccb *dccb) 269 { 270 return (dpt->dpt_ccb_busbase 271 + (u_int32_t)((caddr_t)dccb - (caddr_t)dpt->dpt_dccbs)); 272 } 273 274 static __inline struct dpt_ccb * 275 dptccbptov(struct dpt_softc *dpt, bus_addr_t busaddr) 276 { 277 return (dpt->dpt_dccbs 278 + ((struct dpt_ccb *)busaddr 279 - (struct dpt_ccb *)dpt->dpt_ccb_busbase)); 280 } 281 282 /* 283 * Send a command for immediate execution by the DPT 284 * See above function for IMPORTANT notes. 285 */ 286 static __inline int 287 dpt_send_immediate(dpt_softc_t *dpt, eata_ccb_t *cmd_block, 288 u_int32_t cmd_busaddr, u_int retries, 289 u_int ifc, u_int code, u_int code2) 290 { 291 return (dpt_send_eata_command(dpt, cmd_block, cmd_busaddr, 292 EATA_CMD_IMMEDIATE, retries, ifc, 293 code, code2)); 294 } 295 296 297 /* ===================== Private Function definitions =======================*/ 298 static void 299 dptmapmem(void *arg, bus_dma_segment_t *segs, int nseg, int error) 300 { 301 bus_addr_t *busaddrp; 302 303 busaddrp = (bus_addr_t *)arg; 304 *busaddrp = segs->ds_addr; 305 } 306 307 static struct sg_map_node * 308 dptallocsgmap(struct dpt_softc *dpt) 309 { 310 struct sg_map_node *sg_map; 311 312 sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT); 313 314 if (sg_map == NULL) 315 return (NULL); 316 317 /* Allocate S/G space for the next batch of CCBS */ 318 if (bus_dmamem_alloc(dpt->sg_dmat, (void **)&sg_map->sg_vaddr, 319 BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) { 320 free(sg_map, M_DEVBUF); 321 return (NULL); 322 } 323 324 (void)bus_dmamap_load(dpt->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr, 325 PAGE_SIZE, dptmapmem, &sg_map->sg_physaddr, 326 /*flags*/0); 327 328 SLIST_INSERT_HEAD(&dpt->sg_maps, sg_map, links); 329 330 return (sg_map); 331 } 332 333 /* 334 * Allocate another chunk of CCB's. Return count of entries added. 335 * Assumed to be called at splcam(). 336 */ 337 static int 338 dptallocccbs(dpt_softc_t *dpt) 339 { 340 struct dpt_ccb *next_ccb; 341 struct sg_map_node *sg_map; 342 bus_addr_t physaddr; 343 dpt_sg_t *segs; 344 int newcount; 345 int i; 346 347 next_ccb = &dpt->dpt_dccbs[dpt->total_dccbs]; 348 349 if (next_ccb == dpt->dpt_dccbs) { 350 /* 351 * First time through. Re-use the S/G 352 * space we allocated for initialization 353 * CCBS. 354 */ 355 sg_map = SLIST_FIRST(&dpt->sg_maps); 356 } else { 357 sg_map = dptallocsgmap(dpt); 358 } 359 360 if (sg_map == NULL) 361 return (0); 362 363 segs = sg_map->sg_vaddr; 364 physaddr = sg_map->sg_physaddr; 365 366 newcount = (PAGE_SIZE / (dpt->sgsize * sizeof(dpt_sg_t))); 367 for (i = 0; dpt->total_dccbs < dpt->max_dccbs && i < newcount; i++) { 368 int error; 369 370 error = bus_dmamap_create(dpt->buffer_dmat, /*flags*/0, 371 &next_ccb->dmamap); 372 if (error != 0) 373 break; 374 next_ccb->sg_list = segs; 375 next_ccb->sg_busaddr = htonl(physaddr); 376 next_ccb->eata_ccb.cp_dataDMA = htonl(physaddr); 377 next_ccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr); 378 next_ccb->eata_ccb.cp_reqDMA = 379 htonl(dptccbvtop(dpt, next_ccb) 380 + offsetof(struct dpt_ccb, sense_data)); 381 next_ccb->eata_ccb.cp_busaddr = dpt->dpt_ccb_busend; 382 next_ccb->state = DCCB_FREE; 383 next_ccb->tag = dpt->total_dccbs; 384 SLIST_INSERT_HEAD(&dpt->free_dccb_list, next_ccb, links); 385 segs += dpt->sgsize; 386 physaddr += (dpt->sgsize * sizeof(dpt_sg_t)); 387 dpt->dpt_ccb_busend += sizeof(*next_ccb); 388 next_ccb++; 389 dpt->total_dccbs++; 390 } 391 return (i); 392 } 393 394 #ifdef DEV_EISA 395 dpt_conf_t * 396 dpt_pio_get_conf (u_int32_t base) 397 { 398 static dpt_conf_t * conf; 399 u_int16_t * p; 400 int i; 401 402 /* 403 * Allocate a dpt_conf_t 404 */ 405 if (!conf) { 406 conf = (dpt_conf_t *)malloc(sizeof(dpt_conf_t), 407 M_DEVBUF, M_NOWAIT); 408 } 409 410 /* 411 * If we didn't get one then we probably won't ever get one. 412 */ 413 if (!conf) { 414 printf("dpt: unable to allocate dpt_conf_t\n"); 415 return (NULL); 416 } 417 418 /* 419 * If we have one, clean it up. 420 */ 421 bzero(conf, sizeof(dpt_conf_t)); 422 423 /* 424 * Reset the controller. 425 */ 426 outb((base + HA_WCOMMAND), EATA_CMD_RESET); 427 428 /* 429 * Wait for the controller to become ready. 430 * For some reason there can be -no- delays after calling reset 431 * before we wait on ready status. 432 */ 433 if (dpt_pio_wait(base, HA_RSTATUS, HA_SBUSY, 0)) { 434 printf("dpt: timeout waiting for controller to become ready\n"); 435 return (NULL); 436 } 437 438 if (dpt_pio_wait(base, HA_RAUXSTAT, HA_ABUSY, 0)) { 439 printf("dpt: timetout waiting for adapter ready.\n"); 440 return (NULL); 441 } 442 443 /* 444 * Send the PIO_READ_CONFIG command. 445 */ 446 outb((base + HA_WCOMMAND), EATA_CMD_PIO_READ_CONFIG); 447 448 /* 449 * Read the data into the struct. 450 */ 451 p = (u_int16_t *)conf; 452 for (i = 0; i < (sizeof(dpt_conf_t) / 2); i++) { 453 454 if (dpt_pio_wait(base, HA_RSTATUS, HA_SDRQ, 0)) { 455 if (bootverbose) 456 printf("dpt: timeout in data read.\n"); 457 return (NULL); 458 } 459 460 (*p) = inw(base + HA_RDATA); 461 p++; 462 } 463 464 if (inb(base + HA_RSTATUS) & HA_SERROR) { 465 if (bootverbose) 466 printf("dpt: error reading configuration data.\n"); 467 return (NULL); 468 } 469 470 #define BE_EATA_SIGNATURE 0x45415441 471 #define LE_EATA_SIGNATURE 0x41544145 472 473 /* 474 * Test to see if we have a valid card. 475 */ 476 if ((conf->signature == BE_EATA_SIGNATURE) || 477 (conf->signature == LE_EATA_SIGNATURE)) { 478 479 while (inb(base + HA_RSTATUS) & HA_SDRQ) { 480 inw(base + HA_RDATA); 481 } 482 483 return (conf); 484 } 485 return (NULL); 486 } 487 #endif 488 489 /* 490 * Read a configuration page into the supplied dpt_cont_t buffer. 491 */ 492 static int 493 dpt_get_conf(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr, 494 u_int size, u_int page, u_int target, int extent) 495 { 496 eata_ccb_t *cp; 497 498 u_int8_t status; 499 500 int ndx; 501 int ospl; 502 int result; 503 504 cp = &dccb->eata_ccb; 505 bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(*dpt->sp)); 506 507 cp->Interpret = 1; 508 cp->DataIn = 1; 509 cp->Auto_Req_Sen = 1; 510 cp->reqlen = sizeof(struct scsi_sense_data); 511 512 cp->cp_id = target; 513 cp->cp_LUN = 0; /* In the EATA packet */ 514 cp->cp_lun = 0; /* In the SCSI command */ 515 516 cp->cp_scsi_cmd = INQUIRY; 517 cp->cp_len = size; 518 519 cp->cp_extent = extent; 520 521 cp->cp_page = page; 522 cp->cp_channel = 0; /* DNC, Interpret mode is set */ 523 cp->cp_identify = 1; 524 cp->cp_datalen = htonl(size); 525 526 ospl = splcam(); 527 528 /* 529 * This could be a simple for loop, but we suspected the compiler To 530 * have optimized it a bit too much. Wait for the controller to 531 * become ready 532 */ 533 while (((status = dpt_inb(dpt, HA_RSTATUS)) != (HA_SREADY | HA_SSC) 534 && (status != (HA_SREADY | HA_SSC | HA_SERROR)) 535 && (status != (HA_SDRDY | HA_SERROR | HA_SDRQ))) 536 || (dpt_wait(dpt, HA_SBUSY, 0))) { 537 538 /* 539 * RAID Drives still Spinning up? (This should only occur if 540 * the DPT controller is in a NON PC (PCI?) platform). 541 */ 542 if (dpt_raid_busy(dpt)) { 543 printf("dpt%d WARNING: Get_conf() RSUS failed.\n", 544 dpt->unit); 545 splx(ospl); 546 return (0); 547 } 548 } 549 550 DptStat_Reset_BUSY(dpt->sp); 551 552 /* 553 * XXXX We might want to do something more clever than aborting at 554 * this point, like resetting (rebooting) the controller and trying 555 * again. 556 */ 557 if ((result = dpt_send_eata_command(dpt, cp, dccb_busaddr, 558 EATA_CMD_DMA_SEND_CP, 559 10000, 0, 0, 0)) != 0) { 560 printf("dpt%d WARNING: Get_conf() failed (%d) to send " 561 "EATA_CMD_DMA_READ_CONFIG\n", 562 dpt->unit, result); 563 splx(ospl); 564 return (0); 565 } 566 /* Wait for two seconds for a response. This can be slow */ 567 for (ndx = 0; 568 (ndx < 20000) 569 && !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ); 570 ndx++) { 571 DELAY(50); 572 } 573 574 /* Grab the status and clear interrupts */ 575 status = dpt_inb(dpt, HA_RSTATUS); 576 577 splx(ospl); 578 579 /* 580 * Check the status carefully. Return only if the 581 * command was successful. 582 */ 583 if (((status & HA_SERROR) == 0) 584 && (dpt->sp->hba_stat == 0) 585 && (dpt->sp->scsi_stat == 0) 586 && (dpt->sp->residue_len == 0)) 587 return (0); 588 589 if (dpt->sp->scsi_stat == SCSI_STATUS_CHECK_COND) 590 return (0); 591 592 return (1); 593 } 594 595 /* Detect Cache parameters and size */ 596 static void 597 dpt_detect_cache(dpt_softc_t *dpt, dpt_ccb_t *dccb, u_int32_t dccb_busaddr, 598 u_int8_t *buff) 599 { 600 eata_ccb_t *cp; 601 u_int8_t *param; 602 int bytes; 603 int result; 604 int ospl; 605 int ndx; 606 u_int8_t status; 607 608 /* 609 * Default setting, for best perfromance.. 610 * This is what virtually all cards default to.. 611 */ 612 dpt->cache_type = DPT_CACHE_WRITEBACK; 613 dpt->cache_size = 0; 614 615 cp = &dccb->eata_ccb; 616 bzero((void *)(uintptr_t)(volatile void *)dpt->sp, sizeof(dpt->sp)); 617 bzero(buff, 512); 618 619 /* Setup the command structure */ 620 cp->Interpret = 1; 621 cp->DataIn = 1; 622 cp->Auto_Req_Sen = 1; 623 cp->reqlen = sizeof(struct scsi_sense_data); 624 625 cp->cp_id = 0; /* who cares? The HBA will interpret.. */ 626 cp->cp_LUN = 0; /* In the EATA packet */ 627 cp->cp_lun = 0; /* In the SCSI command */ 628 cp->cp_channel = 0; 629 630 cp->cp_scsi_cmd = EATA_CMD_DMA_SEND_CP; 631 cp->cp_len = 56; 632 633 cp->cp_extent = 0; 634 cp->cp_page = 0; 635 cp->cp_identify = 1; 636 cp->cp_dispri = 1; 637 638 /* 639 * Build the EATA Command Packet structure 640 * for a Log Sense Command. 641 */ 642 cp->cp_cdb[0] = 0x4d; 643 cp->cp_cdb[1] = 0x0; 644 cp->cp_cdb[2] = 0x40 | 0x33; 645 cp->cp_cdb[7] = 1; 646 647 cp->cp_datalen = htonl(512); 648 649 ospl = splcam(); 650 result = dpt_send_eata_command(dpt, cp, dccb_busaddr, 651 EATA_CMD_DMA_SEND_CP, 652 10000, 0, 0, 0); 653 if (result != 0) { 654 printf("dpt%d WARNING: detect_cache() failed (%d) to send " 655 "EATA_CMD_DMA_SEND_CP\n", dpt->unit, result); 656 splx(ospl); 657 return; 658 } 659 /* Wait for two seconds for a response. This can be slow... */ 660 for (ndx = 0; 661 (ndx < 20000) && 662 !((status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ); 663 ndx++) { 664 DELAY(50); 665 } 666 667 /* Grab the status and clear interrupts */ 668 status = dpt_inb(dpt, HA_RSTATUS); 669 splx(ospl); 670 671 /* 672 * Sanity check 673 */ 674 if (buff[0] != 0x33) { 675 return; 676 } 677 bytes = DPT_HCP_LENGTH(buff); 678 param = DPT_HCP_FIRST(buff); 679 680 if (DPT_HCP_CODE(param) != 1) { 681 /* 682 * DPT Log Page layout error 683 */ 684 printf("dpt%d: NOTICE: Log Page (1) layout error\n", 685 dpt->unit); 686 return; 687 } 688 if (!(param[4] & 0x4)) { 689 dpt->cache_type = DPT_NO_CACHE; 690 return; 691 } 692 while (DPT_HCP_CODE(param) != 6) { 693 param = DPT_HCP_NEXT(param); 694 if ((param < buff) 695 || (param >= &buff[bytes])) { 696 return; 697 } 698 } 699 700 if (param[4] & 0x2) { 701 /* 702 * Cache disabled 703 */ 704 dpt->cache_type = DPT_NO_CACHE; 705 return; 706 } 707 708 if (param[4] & 0x4) { 709 dpt->cache_type = DPT_CACHE_WRITETHROUGH; 710 } 711 712 /* XXX This isn't correct. This log parameter only has two bytes.... */ 713 #if 0 714 dpt->cache_size = param[5] 715 | (param[6] << 8) 716 | (param[7] << 16) 717 | (param[8] << 24); 718 #endif 719 } 720 721 static void 722 dpt_poll(struct cam_sim *sim) 723 { 724 dpt_intr(cam_sim_softc(sim)); 725 } 726 727 static void 728 dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 729 { 730 struct dpt_ccb *dccb; 731 union ccb *ccb; 732 struct dpt_softc *dpt; 733 int s; 734 735 dccb = (struct dpt_ccb *)arg; 736 ccb = dccb->ccb; 737 dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr; 738 739 if (error != 0) { 740 if (error != EFBIG) 741 printf("dpt%d: Unexepected error 0x%x returned from " 742 "bus_dmamap_load\n", dpt->unit, error); 743 if (ccb->ccb_h.status == CAM_REQ_INPROG) { 744 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 745 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN; 746 } 747 dptfreeccb(dpt, dccb); 748 xpt_done(ccb); 749 return; 750 } 751 752 if (nseg != 0) { 753 dpt_sg_t *sg; 754 bus_dma_segment_t *end_seg; 755 bus_dmasync_op_t op; 756 757 end_seg = dm_segs + nseg; 758 759 /* Copy the segments into our SG list */ 760 sg = dccb->sg_list; 761 while (dm_segs < end_seg) { 762 sg->seg_len = htonl(dm_segs->ds_len); 763 sg->seg_addr = htonl(dm_segs->ds_addr); 764 sg++; 765 dm_segs++; 766 } 767 768 if (nseg > 1) { 769 dccb->eata_ccb.scatter = 1; 770 dccb->eata_ccb.cp_dataDMA = dccb->sg_busaddr; 771 dccb->eata_ccb.cp_datalen = 772 htonl(nseg * sizeof(dpt_sg_t)); 773 } else { 774 dccb->eata_ccb.cp_dataDMA = dccb->sg_list[0].seg_addr; 775 dccb->eata_ccb.cp_datalen = dccb->sg_list[0].seg_len; 776 } 777 778 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 779 op = BUS_DMASYNC_PREREAD; 780 else 781 op = BUS_DMASYNC_PREWRITE; 782 783 bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op); 784 785 } else { 786 dccb->eata_ccb.cp_dataDMA = 0; 787 dccb->eata_ccb.cp_datalen = 0; 788 } 789 790 s = splcam(); 791 792 /* 793 * Last time we need to check if this CCB needs to 794 * be aborted. 795 */ 796 if (ccb->ccb_h.status != CAM_REQ_INPROG) { 797 if (nseg != 0) 798 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 799 dptfreeccb(dpt, dccb); 800 xpt_done(ccb); 801 splx(s); 802 return; 803 } 804 805 dccb->state |= DCCB_ACTIVE; 806 ccb->ccb_h.status |= CAM_SIM_QUEUED; 807 LIST_INSERT_HEAD(&dpt->pending_ccb_list, &ccb->ccb_h, sim_links.le); 808 ccb->ccb_h.timeout_ch = 809 timeout(dpttimeout, (caddr_t)dccb, 810 (ccb->ccb_h.timeout * hz) / 1000); 811 if (dpt_send_eata_command(dpt, &dccb->eata_ccb, 812 dccb->eata_ccb.cp_busaddr, 813 EATA_CMD_DMA_SEND_CP, 0, 0, 0, 0) != 0) { 814 ccb->ccb_h.status = CAM_NO_HBA; /* HBA dead or just busy?? */ 815 if (nseg != 0) 816 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 817 dptfreeccb(dpt, dccb); 818 xpt_done(ccb); 819 } 820 821 splx(s); 822 } 823 824 static void 825 dpt_action(struct cam_sim *sim, union ccb *ccb) 826 { 827 struct dpt_softc *dpt; 828 829 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("dpt_action\n")); 830 831 dpt = (struct dpt_softc *)cam_sim_softc(sim); 832 833 if ((dpt->state & DPT_HA_SHUTDOWN_ACTIVE) != 0) { 834 xpt_print_path(ccb->ccb_h.path); 835 printf("controller is shutdown. Aborting CCB.\n"); 836 ccb->ccb_h.status = CAM_NO_HBA; 837 xpt_done(ccb); 838 return; 839 } 840 841 switch (ccb->ccb_h.func_code) { 842 /* Common cases first */ 843 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 844 { 845 struct ccb_scsiio *csio; 846 struct ccb_hdr *ccbh; 847 struct dpt_ccb *dccb; 848 struct eata_ccb *eccb; 849 850 csio = &ccb->csio; 851 ccbh = &ccb->ccb_h; 852 /* Max CDB length is 12 bytes */ 853 if (csio->cdb_len > 12) { 854 ccb->ccb_h.status = CAM_REQ_INVALID; 855 xpt_done(ccb); 856 return; 857 } 858 if ((dccb = dptgetccb(dpt)) == NULL) { 859 int s; 860 861 s = splcam(); 862 dpt->resource_shortage = 1; 863 splx(s); 864 xpt_freeze_simq(sim, /*count*/1); 865 ccb->ccb_h.status = CAM_REQUEUE_REQ; 866 xpt_done(ccb); 867 return; 868 } 869 eccb = &dccb->eata_ccb; 870 871 /* Link dccb and ccb so we can find one from the other */ 872 dccb->ccb = ccb; 873 ccb->ccb_h.ccb_dccb_ptr = dccb; 874 ccb->ccb_h.ccb_dpt_ptr = dpt; 875 876 /* 877 * Explicitly set all flags so that the compiler can 878 * be smart about setting them. 879 */ 880 eccb->SCSI_Reset = 0; 881 eccb->HBA_Init = 0; 882 eccb->Auto_Req_Sen = (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) 883 ? 0 : 1; 884 eccb->scatter = 0; 885 eccb->Quick = 0; 886 eccb->Interpret = 887 ccb->ccb_h.target_id == dpt->hostid[cam_sim_bus(sim)] 888 ? 1 : 0; 889 eccb->DataOut = (ccb->ccb_h.flags & CAM_DIR_OUT) ? 1 : 0; 890 eccb->DataIn = (ccb->ccb_h.flags & CAM_DIR_IN) ? 1 : 0; 891 eccb->reqlen = csio->sense_len; 892 eccb->cp_id = ccb->ccb_h.target_id; 893 eccb->cp_channel = cam_sim_bus(sim); 894 eccb->cp_LUN = ccb->ccb_h.target_lun; 895 eccb->cp_luntar = 0; 896 eccb->cp_dispri = (ccb->ccb_h.flags & CAM_DIS_DISCONNECT) 897 ? 0 : 1; 898 eccb->cp_identify = 1; 899 900 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0 901 && csio->tag_action != CAM_TAG_ACTION_NONE) { 902 eccb->cp_msg[0] = csio->tag_action; 903 eccb->cp_msg[1] = dccb->tag; 904 } else { 905 eccb->cp_msg[0] = 0; 906 eccb->cp_msg[1] = 0; 907 } 908 eccb->cp_msg[2] = 0; 909 910 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) { 911 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) { 912 bcopy(csio->cdb_io.cdb_ptr, 913 eccb->cp_cdb, csio->cdb_len); 914 } else { 915 /* I guess I could map it in... */ 916 ccb->ccb_h.status = CAM_REQ_INVALID; 917 dptfreeccb(dpt, dccb); 918 xpt_done(ccb); 919 return; 920 } 921 } else { 922 bcopy(csio->cdb_io.cdb_bytes, 923 eccb->cp_cdb, csio->cdb_len); 924 } 925 /* 926 * If we have any data to send with this command, 927 * map it into bus space. 928 */ 929 /* Only use S/G if there is a transfer */ 930 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 931 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) { 932 /* 933 * We've been given a pointer 934 * to a single buffer. 935 */ 936 if ((ccbh->flags & CAM_DATA_PHYS) == 0) { 937 int s; 938 int error; 939 940 s = splsoftvm(); 941 error = 942 bus_dmamap_load(dpt->buffer_dmat, 943 dccb->dmamap, 944 csio->data_ptr, 945 csio->dxfer_len, 946 dptexecuteccb, 947 dccb, /*flags*/0); 948 if (error == EINPROGRESS) { 949 /* 950 * So as to maintain ordering, 951 * freeze the controller queue 952 * until our mapping is 953 * returned. 954 */ 955 xpt_freeze_simq(sim, 1); 956 dccb->state |= CAM_RELEASE_SIMQ; 957 } 958 splx(s); 959 } else { 960 struct bus_dma_segment seg; 961 962 /* Pointer to physical buffer */ 963 seg.ds_addr = 964 (bus_addr_t)csio->data_ptr; 965 seg.ds_len = csio->dxfer_len; 966 dptexecuteccb(dccb, &seg, 1, 0); 967 } 968 } else { 969 struct bus_dma_segment *segs; 970 971 if ((ccbh->flags & CAM_DATA_PHYS) != 0) 972 panic("dpt_action - Physical " 973 "segment pointers " 974 "unsupported"); 975 976 if ((ccbh->flags&CAM_SG_LIST_PHYS)==0) 977 panic("dpt_action - Virtual " 978 "segment addresses " 979 "unsupported"); 980 981 /* Just use the segments provided */ 982 segs = (struct bus_dma_segment *)csio->data_ptr; 983 dptexecuteccb(dccb, segs, csio->sglist_cnt, 0); 984 } 985 } else { 986 /* 987 * XXX JGibbs. 988 * Does it want them both on or both off? 989 * CAM_DIR_NONE is both on, so this code can 990 * be removed if this is also what the DPT 991 * exptects. 992 */ 993 eccb->DataOut = 0; 994 eccb->DataIn = 0; 995 dptexecuteccb(dccb, NULL, 0, 0); 996 } 997 break; 998 } 999 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 1000 case XPT_ABORT: /* Abort the specified CCB */ 1001 /* XXX Implement */ 1002 ccb->ccb_h.status = CAM_REQ_INVALID; 1003 xpt_done(ccb); 1004 break; 1005 case XPT_SET_TRAN_SETTINGS: 1006 { 1007 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1008 xpt_done(ccb); 1009 break; 1010 } 1011 case XPT_GET_TRAN_SETTINGS: 1012 /* Get default/user set transfer settings for the target */ 1013 { 1014 struct ccb_trans_settings *cts = &ccb->cts; 1015 struct ccb_trans_settings_scsi *scsi = 1016 &cts->proto_specific.scsi; 1017 struct ccb_trans_settings_spi *spi = 1018 &cts->xport_specific.spi; 1019 1020 cts->protocol = PROTO_SCSI; 1021 cts->protocol_version = SCSI_REV_2; 1022 cts->transport = XPORT_SPI; 1023 cts->transport_version = 2; 1024 1025 if (cts->type == CTS_TYPE_USER_SETTINGS) { 1026 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 1027 spi->bus_width = (dpt->max_id > 7) 1028 ? MSG_EXT_WDTR_BUS_8_BIT 1029 : MSG_EXT_WDTR_BUS_16_BIT; 1030 spi->sync_period = 25; /* 10MHz */ 1031 if (spi->sync_period != 0) 1032 spi->sync_offset = 15; 1033 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 1034 1035 spi->valid = CTS_SPI_VALID_SYNC_RATE 1036 | CTS_SPI_VALID_SYNC_OFFSET 1037 | CTS_SPI_VALID_SYNC_RATE 1038 | CTS_SPI_VALID_BUS_WIDTH 1039 | CTS_SPI_VALID_DISC; 1040 scsi->valid = CTS_SCSI_VALID_TQ; 1041 ccb->ccb_h.status = CAM_REQ_CMP; 1042 } else { 1043 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 1044 } 1045 xpt_done(ccb); 1046 break; 1047 } 1048 case XPT_CALC_GEOMETRY: 1049 { 1050 /* 1051 * XXX Use Adaptec translation until I find out how to 1052 * get this information from the card. 1053 */ 1054 cam_calc_geometry(&ccb->ccg, /*extended*/1); 1055 xpt_done(ccb); 1056 break; 1057 } 1058 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 1059 { 1060 /* XXX Implement */ 1061 ccb->ccb_h.status = CAM_REQ_CMP; 1062 xpt_done(ccb); 1063 break; 1064 } 1065 case XPT_TERM_IO: /* Terminate the I/O process */ 1066 /* XXX Implement */ 1067 ccb->ccb_h.status = CAM_REQ_INVALID; 1068 xpt_done(ccb); 1069 break; 1070 case XPT_PATH_INQ: /* Path routing inquiry */ 1071 { 1072 struct ccb_pathinq *cpi = &ccb->cpi; 1073 1074 cpi->version_num = 1; 1075 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 1076 if (dpt->max_id > 7) 1077 cpi->hba_inquiry |= PI_WIDE_16; 1078 cpi->target_sprt = 0; 1079 cpi->hba_misc = 0; 1080 cpi->hba_eng_cnt = 0; 1081 cpi->max_target = dpt->max_id; 1082 cpi->max_lun = dpt->max_lun; 1083 cpi->initiator_id = dpt->hostid[cam_sim_bus(sim)]; 1084 cpi->bus_id = cam_sim_bus(sim); 1085 cpi->base_transfer_speed = 3300; 1086 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 1087 strncpy(cpi->hba_vid, "DPT", HBA_IDLEN); 1088 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 1089 cpi->unit_number = cam_sim_unit(sim); 1090 cpi->transport = XPORT_SPI; 1091 cpi->transport_version = 2; 1092 cpi->protocol = PROTO_SCSI; 1093 cpi->protocol_version = SCSI_REV_2; 1094 cpi->ccb_h.status = CAM_REQ_CMP; 1095 xpt_done(ccb); 1096 break; 1097 } 1098 default: 1099 ccb->ccb_h.status = CAM_REQ_INVALID; 1100 xpt_done(ccb); 1101 break; 1102 } 1103 } 1104 1105 /* 1106 * This routine will try to send an EATA command to the DPT HBA. 1107 * It will, by default, try 20,000 times, waiting 50us between tries. 1108 * It returns 0 on success and 1 on failure. 1109 * It is assumed to be called at splcam(). 1110 */ 1111 static int 1112 dpt_send_eata_command(dpt_softc_t *dpt, eata_ccb_t *cmd_block, 1113 u_int32_t cmd_busaddr, u_int command, u_int retries, 1114 u_int ifc, u_int code, u_int code2) 1115 { 1116 u_int loop; 1117 1118 if (!retries) 1119 retries = 20000; 1120 1121 /* 1122 * I hate this polling nonsense. Wish there was a way to tell the DPT 1123 * to go get commands at its own pace, or to interrupt when ready. 1124 * In the mean time we will measure how many itterations it really 1125 * takes. 1126 */ 1127 for (loop = 0; loop < retries; loop++) { 1128 if ((dpt_inb(dpt, HA_RAUXSTAT) & HA_ABUSY) == 0) 1129 break; 1130 else 1131 DELAY(50); 1132 } 1133 1134 if (loop < retries) { 1135 #ifdef DPT_MEASURE_PERFORMANCE 1136 if (loop > dpt->performance.max_eata_tries) 1137 dpt->performance.max_eata_tries = loop; 1138 1139 if (loop < dpt->performance.min_eata_tries) 1140 dpt->performance.min_eata_tries = loop; 1141 #endif 1142 } else { 1143 #ifdef DPT_MEASURE_PERFORMANCE 1144 ++dpt->performance.command_too_busy; 1145 #endif 1146 return (1); 1147 } 1148 1149 /* The controller is alive, advance the wedge timer */ 1150 #ifdef DPT_RESET_HBA 1151 dpt->last_contact = microtime_now; 1152 #endif 1153 1154 if (cmd_block == NULL) 1155 cmd_busaddr = 0; 1156 #if (BYTE_ORDER == BIG_ENDIAN) 1157 else { 1158 cmd_busaddr = ((cmd_busaddr >> 24) & 0xFF) 1159 | ((cmd_busaddr >> 16) & 0xFF) 1160 | ((cmd_busaddr >> 8) & 0xFF) 1161 | (cmd_busaddr & 0xFF); 1162 } 1163 #endif 1164 /* And now the address */ 1165 dpt_outl(dpt, HA_WDMAADDR, cmd_busaddr); 1166 1167 if (command == EATA_CMD_IMMEDIATE) { 1168 if (cmd_block == NULL) { 1169 dpt_outb(dpt, HA_WCODE2, code2); 1170 dpt_outb(dpt, HA_WCODE, code); 1171 } 1172 dpt_outb(dpt, HA_WIFC, ifc); 1173 } 1174 dpt_outb(dpt, HA_WCOMMAND, command); 1175 1176 return (0); 1177 } 1178 1179 1180 /* ==================== Exported Function definitions =======================*/ 1181 void 1182 dpt_alloc(device_t dev) 1183 { 1184 dpt_softc_t *dpt = device_get_softc(dev); 1185 int i; 1186 1187 dpt->tag = rman_get_bustag(dpt->io_res); 1188 dpt->bsh = rman_get_bushandle(dpt->io_res) + dpt->io_offset; 1189 dpt->unit = device_get_unit(dev); 1190 SLIST_INIT(&dpt->free_dccb_list); 1191 LIST_INIT(&dpt->pending_ccb_list); 1192 for (i = 0; i < MAX_CHANNELS; i++) 1193 dpt->resetlevel[i] = DPT_HA_OK; 1194 1195 #ifdef DPT_MEASURE_PERFORMANCE 1196 dpt_reset_performance(dpt); 1197 #endif /* DPT_MEASURE_PERFORMANCE */ 1198 return; 1199 } 1200 1201 void 1202 dpt_free(struct dpt_softc *dpt) 1203 { 1204 switch (dpt->init_level) { 1205 default: 1206 case 5: 1207 bus_dmamap_unload(dpt->dccb_dmat, dpt->dccb_dmamap); 1208 case 4: 1209 bus_dmamem_free(dpt->dccb_dmat, dpt->dpt_dccbs, 1210 dpt->dccb_dmamap); 1211 bus_dmamap_destroy(dpt->dccb_dmat, dpt->dccb_dmamap); 1212 case 3: 1213 bus_dma_tag_destroy(dpt->dccb_dmat); 1214 case 2: 1215 bus_dma_tag_destroy(dpt->buffer_dmat); 1216 case 1: 1217 { 1218 struct sg_map_node *sg_map; 1219 1220 while ((sg_map = SLIST_FIRST(&dpt->sg_maps)) != NULL) { 1221 SLIST_REMOVE_HEAD(&dpt->sg_maps, links); 1222 bus_dmamap_unload(dpt->sg_dmat, 1223 sg_map->sg_dmamap); 1224 bus_dmamem_free(dpt->sg_dmat, sg_map->sg_vaddr, 1225 sg_map->sg_dmamap); 1226 free(sg_map, M_DEVBUF); 1227 } 1228 bus_dma_tag_destroy(dpt->sg_dmat); 1229 } 1230 case 0: 1231 break; 1232 } 1233 } 1234 1235 int 1236 dpt_alloc_resources (device_t dev) 1237 { 1238 dpt_softc_t * dpt; 1239 int error; 1240 1241 dpt = device_get_softc(dev); 1242 1243 dpt->io_res = bus_alloc_resource_any(dev, dpt->io_type, &dpt->io_rid, 1244 RF_ACTIVE); 1245 if (dpt->io_res == NULL) { 1246 device_printf(dev, "No I/O space?!\n"); 1247 error = ENOMEM; 1248 goto bad; 1249 } 1250 1251 dpt->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &dpt->irq_rid, 1252 RF_ACTIVE); 1253 if (dpt->irq_res == NULL) { 1254 device_printf(dev, "No IRQ!\n"); 1255 error = ENOMEM; 1256 goto bad; 1257 } 1258 1259 return (0); 1260 bad: 1261 return(error); 1262 } 1263 1264 1265 void 1266 dpt_release_resources (device_t dev) 1267 { 1268 struct dpt_softc * dpt; 1269 1270 dpt = device_get_softc(dev); 1271 1272 if (dpt->ih) 1273 bus_teardown_intr(dev, dpt->irq_res, dpt->ih); 1274 if (dpt->io_res) 1275 bus_release_resource(dev, dpt->io_type, dpt->io_rid, dpt->io_res); 1276 if (dpt->irq_res) 1277 bus_release_resource(dev, SYS_RES_IRQ, dpt->irq_rid, dpt->irq_res); 1278 if (dpt->drq_res) 1279 bus_release_resource(dev, SYS_RES_DRQ, dpt->drq_rid, dpt->drq_res); 1280 1281 return; 1282 } 1283 1284 static u_int8_t string_sizes[] = 1285 { 1286 sizeof(((dpt_inq_t*)NULL)->vendor), 1287 sizeof(((dpt_inq_t*)NULL)->modelNum), 1288 sizeof(((dpt_inq_t*)NULL)->firmware), 1289 sizeof(((dpt_inq_t*)NULL)->protocol), 1290 }; 1291 1292 int 1293 dpt_init(struct dpt_softc *dpt) 1294 { 1295 dpt_conf_t conf; 1296 struct sg_map_node *sg_map; 1297 dpt_ccb_t *dccb; 1298 u_int8_t *strp; 1299 int index; 1300 int i; 1301 int retval; 1302 1303 dpt->init_level = 0; 1304 SLIST_INIT(&dpt->sg_maps); 1305 1306 #ifdef DPT_RESET_BOARD 1307 printf("dpt%d: resetting HBA\n", dpt->unit); 1308 dpt_outb(dpt, HA_WCOMMAND, EATA_CMD_RESET); 1309 DELAY(750000); 1310 /* XXX Shouldn't we poll a status register or something??? */ 1311 #endif 1312 /* DMA tag for our S/G structures. We allocate in page sized chunks */ 1313 if (bus_dma_tag_create( /* parent */ dpt->parent_dmat, 1314 /* alignment */ 1, 1315 /* boundary */ 0, 1316 /* lowaddr */ BUS_SPACE_MAXADDR, 1317 /* highaddr */ BUS_SPACE_MAXADDR, 1318 /* filter */ NULL, 1319 /* filterarg */ NULL, 1320 /* maxsize */ PAGE_SIZE, 1321 /* nsegments */ 1, 1322 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1323 /* flags */ 0, 1324 /* lockfunc */ busdma_lock_mutex, 1325 /* lockarg */ &Giant, 1326 &dpt->sg_dmat) != 0) { 1327 goto error_exit; 1328 } 1329 1330 dpt->init_level++; 1331 1332 /* 1333 * We allocate our DPT ccbs as a contiguous array of bus dma'able 1334 * memory. To get the allocation size, we need to know how many 1335 * ccbs the card supports. This requires a ccb. We solve this 1336 * chicken and egg problem by allocating some re-usable S/G space 1337 * up front, and treating it as our status packet, CCB, and target 1338 * memory space for these commands. 1339 */ 1340 sg_map = dptallocsgmap(dpt); 1341 if (sg_map == NULL) 1342 goto error_exit; 1343 1344 dpt->sp = (volatile dpt_sp_t *)sg_map->sg_vaddr; 1345 dccb = (struct dpt_ccb *)(uintptr_t)(volatile void *)&dpt->sp[1]; 1346 bzero(dccb, sizeof(*dccb)); 1347 dpt->sp_physaddr = sg_map->sg_physaddr; 1348 dccb->eata_ccb.cp_dataDMA = 1349 htonl(sg_map->sg_physaddr + sizeof(dpt_sp_t) + sizeof(*dccb)); 1350 dccb->eata_ccb.cp_busaddr = ~0; 1351 dccb->eata_ccb.cp_statDMA = htonl(dpt->sp_physaddr); 1352 dccb->eata_ccb.cp_reqDMA = htonl(dpt->sp_physaddr + sizeof(*dccb) 1353 + offsetof(struct dpt_ccb, sense_data)); 1354 1355 /* Okay. Fetch our config */ 1356 bzero(&dccb[1], sizeof(conf)); /* data area */ 1357 retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1358 sizeof(conf), 0xc1, 7, 1); 1359 1360 if (retval != 0) { 1361 printf("dpt%d: Failed to get board configuration\n", dpt->unit); 1362 return (retval); 1363 } 1364 bcopy(&dccb[1], &conf, sizeof(conf)); 1365 1366 bzero(&dccb[1], sizeof(dpt->board_data)); 1367 retval = dpt_get_conf(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1368 sizeof(dpt->board_data), 0, conf.scsi_id0, 0); 1369 if (retval != 0) { 1370 printf("dpt%d: Failed to get inquiry information\n", dpt->unit); 1371 return (retval); 1372 } 1373 bcopy(&dccb[1], &dpt->board_data, sizeof(dpt->board_data)); 1374 1375 dpt_detect_cache(dpt, dccb, sg_map->sg_physaddr + sizeof(dpt_sp_t), 1376 (u_int8_t *)&dccb[1]); 1377 1378 switch (ntohl(conf.splen)) { 1379 case DPT_EATA_REVA: 1380 dpt->EATA_revision = 'a'; 1381 break; 1382 case DPT_EATA_REVB: 1383 dpt->EATA_revision = 'b'; 1384 break; 1385 case DPT_EATA_REVC: 1386 dpt->EATA_revision = 'c'; 1387 break; 1388 case DPT_EATA_REVZ: 1389 dpt->EATA_revision = 'z'; 1390 break; 1391 default: 1392 dpt->EATA_revision = '?'; 1393 } 1394 1395 dpt->max_id = conf.MAX_ID; 1396 dpt->max_lun = conf.MAX_LUN; 1397 dpt->irq = conf.IRQ; 1398 dpt->dma_channel = (8 - conf.DMA_channel) & 7; 1399 dpt->channels = conf.MAX_CHAN + 1; 1400 dpt->state |= DPT_HA_OK; 1401 if (conf.SECOND) 1402 dpt->primary = FALSE; 1403 else 1404 dpt->primary = TRUE; 1405 1406 dpt->more_support = conf.MORE_support; 1407 1408 if (strncmp(dpt->board_data.firmware, "07G0", 4) >= 0) 1409 dpt->immediate_support = 1; 1410 else 1411 dpt->immediate_support = 0; 1412 1413 dpt->broken_INQUIRY = FALSE; 1414 1415 dpt->cplen = ntohl(conf.cplen); 1416 dpt->cppadlen = ntohs(conf.cppadlen); 1417 dpt->max_dccbs = ntohs(conf.queuesiz); 1418 1419 if (dpt->max_dccbs > 256) { 1420 printf("dpt%d: Max CCBs reduced from %d to " 1421 "256 due to tag algorithm\n", dpt->unit, dpt->max_dccbs); 1422 dpt->max_dccbs = 256; 1423 } 1424 1425 dpt->hostid[0] = conf.scsi_id0; 1426 dpt->hostid[1] = conf.scsi_id1; 1427 dpt->hostid[2] = conf.scsi_id2; 1428 1429 if (conf.SG_64K) 1430 dpt->sgsize = 8192; 1431 else 1432 dpt->sgsize = ntohs(conf.SGsiz); 1433 1434 /* We can only get 64k buffers, so don't bother to waste space. */ 1435 if (dpt->sgsize < 17 || dpt->sgsize > 32) 1436 dpt->sgsize = 32; 1437 1438 if (dpt->sgsize > dpt_max_segs) 1439 dpt->sgsize = dpt_max_segs; 1440 1441 /* DMA tag for mapping buffers into device visible space. */ 1442 if (bus_dma_tag_create( /* parent */ dpt->parent_dmat, 1443 /* alignment */ 1, 1444 /* boundary */ 0, 1445 /* lowaddr */ BUS_SPACE_MAXADDR, 1446 /* highaddr */ BUS_SPACE_MAXADDR, 1447 /* filter */ NULL, 1448 /* filterarg */ NULL, 1449 /* maxsize */ MAXBSIZE, 1450 /* nsegments */ dpt->sgsize, 1451 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1452 /* flags */ BUS_DMA_ALLOCNOW, 1453 /* lockfunc */ busdma_lock_mutex, 1454 /* lockarg */ &Giant, 1455 &dpt->buffer_dmat) != 0) { 1456 printf("dpt: bus_dma_tag_create(...,dpt->buffer_dmat) failed\n"); 1457 goto error_exit; 1458 } 1459 1460 dpt->init_level++; 1461 1462 /* DMA tag for our ccb structures and interrupt status packet */ 1463 if (bus_dma_tag_create( /* parent */ dpt->parent_dmat, 1464 /* alignment */ 1, 1465 /* boundary */ 0, 1466 /* lowaddr */ BUS_SPACE_MAXADDR, 1467 /* highaddr */ BUS_SPACE_MAXADDR, 1468 /* filter */ NULL, 1469 /* filterarg */ NULL, 1470 /* maxsize */ (dpt->max_dccbs * 1471 sizeof(struct dpt_ccb)) + 1472 sizeof(dpt_sp_t), 1473 /* nsegments */ 1, 1474 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1475 /* flags */ 0, 1476 /* lockfunc */ busdma_lock_mutex, 1477 /* lockarg */ &Giant, 1478 &dpt->dccb_dmat) != 0) { 1479 printf("dpt: bus_dma_tag_create(...,dpt->dccb_dmat) failed\n"); 1480 goto error_exit; 1481 } 1482 1483 dpt->init_level++; 1484 1485 /* Allocation for our ccbs and interrupt status packet */ 1486 if (bus_dmamem_alloc(dpt->dccb_dmat, (void **)&dpt->dpt_dccbs, 1487 BUS_DMA_NOWAIT, &dpt->dccb_dmamap) != 0) { 1488 printf("dpt: bus_dmamem_alloc(dpt->dccb_dmat,...) failed\n"); 1489 goto error_exit; 1490 } 1491 1492 dpt->init_level++; 1493 1494 /* And permanently map them */ 1495 bus_dmamap_load(dpt->dccb_dmat, dpt->dccb_dmamap, 1496 dpt->dpt_dccbs, 1497 (dpt->max_dccbs * sizeof(struct dpt_ccb)) 1498 + sizeof(dpt_sp_t), 1499 dptmapmem, &dpt->dpt_ccb_busbase, /*flags*/0); 1500 1501 /* Clear them out. */ 1502 bzero(dpt->dpt_dccbs, 1503 (dpt->max_dccbs * sizeof(struct dpt_ccb)) + sizeof(dpt_sp_t)); 1504 1505 dpt->dpt_ccb_busend = dpt->dpt_ccb_busbase; 1506 1507 dpt->sp = (dpt_sp_t*)&dpt->dpt_dccbs[dpt->max_dccbs]; 1508 dpt->sp_physaddr = dpt->dpt_ccb_busbase 1509 + (dpt->max_dccbs * sizeof(dpt_ccb_t)); 1510 dpt->init_level++; 1511 1512 /* Allocate our first batch of ccbs */ 1513 if (dptallocccbs(dpt) == 0) { 1514 printf("dpt: dptallocccbs(dpt) == 0\n"); 1515 return (2); 1516 } 1517 1518 /* Prepare for Target Mode */ 1519 dpt->target_mode_enabled = 1; 1520 1521 /* Nuke excess spaces from inquiry information */ 1522 strp = dpt->board_data.vendor; 1523 for (i = 0; i < sizeof(string_sizes); i++) { 1524 index = string_sizes[i] - 1; 1525 while (index && (strp[index] == ' ')) 1526 strp[index--] = '\0'; 1527 strp += string_sizes[i]; 1528 } 1529 1530 printf("dpt%d: %.8s %.16s FW Rev. %.4s, ", 1531 dpt->unit, dpt->board_data.vendor, 1532 dpt->board_data.modelNum, dpt->board_data.firmware); 1533 1534 printf("%d channel%s, ", dpt->channels, dpt->channels > 1 ? "s" : ""); 1535 1536 if (dpt->cache_type != DPT_NO_CACHE 1537 && dpt->cache_size != 0) { 1538 printf("%s Cache, ", 1539 dpt->cache_type == DPT_CACHE_WRITETHROUGH 1540 ? "Write-Through" : "Write-Back"); 1541 } 1542 1543 printf("%d CCBs\n", dpt->max_dccbs); 1544 return (0); 1545 1546 error_exit: 1547 return (1); 1548 } 1549 1550 int 1551 dpt_attach(dpt_softc_t *dpt) 1552 { 1553 struct cam_devq *devq; 1554 int i; 1555 1556 /* 1557 * Create the device queue for our SIM. 1558 */ 1559 devq = cam_simq_alloc(dpt->max_dccbs); 1560 if (devq == NULL) 1561 return (0); 1562 1563 for (i = 0; i < dpt->channels; i++) { 1564 /* 1565 * Construct our SIM entry 1566 */ 1567 dpt->sims[i] = cam_sim_alloc(dpt_action, dpt_poll, "dpt", 1568 dpt, dpt->unit, &Giant, 1569 /*untagged*/2, 1570 /*tagged*/dpt->max_dccbs, devq); 1571 if (dpt->sims[i] == NULL) { 1572 if (i == 0) 1573 cam_simq_free(devq); 1574 else 1575 printf( "%s(): Unable to attach bus %d " 1576 "due to resource shortage\n", 1577 __func__, i); 1578 break; 1579 } 1580 1581 if (xpt_bus_register(dpt->sims[i], dpt->dev, i) != CAM_SUCCESS){ 1582 cam_sim_free(dpt->sims[i], /*free_devq*/i == 0); 1583 dpt->sims[i] = NULL; 1584 break; 1585 } 1586 1587 if (xpt_create_path(&dpt->paths[i], /*periph*/NULL, 1588 cam_sim_path(dpt->sims[i]), 1589 CAM_TARGET_WILDCARD, 1590 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 1591 xpt_bus_deregister(cam_sim_path(dpt->sims[i])); 1592 cam_sim_free(dpt->sims[i], /*free_devq*/i == 0); 1593 dpt->sims[i] = NULL; 1594 break; 1595 } 1596 1597 } 1598 if (i > 0) 1599 EVENTHANDLER_REGISTER(shutdown_final, dptshutdown, 1600 dpt, SHUTDOWN_PRI_DEFAULT); 1601 return (i); 1602 } 1603 1604 int 1605 dpt_detach (device_t dev) 1606 { 1607 struct dpt_softc * dpt; 1608 int i; 1609 1610 dpt = device_get_softc(dev); 1611 1612 for (i = 0; i < dpt->channels; i++) { 1613 #if 0 1614 xpt_async(AC_LOST_DEVICE, dpt->paths[i], NULL); 1615 #endif 1616 xpt_free_path(dpt->paths[i]); 1617 xpt_bus_deregister(cam_sim_path(dpt->sims[i])); 1618 cam_sim_free(dpt->sims[i], /*free_devq*/TRUE); 1619 } 1620 1621 dptshutdown((void *)dpt, SHUTDOWN_PRI_DEFAULT); 1622 1623 dpt_release_resources(dev); 1624 1625 dpt_free(dpt); 1626 1627 return (0); 1628 } 1629 1630 /* 1631 * This is the interrupt handler for the DPT driver. 1632 */ 1633 void 1634 dpt_intr(void *arg) 1635 { 1636 dpt_softc_t *dpt; 1637 dpt_ccb_t *dccb; 1638 union ccb *ccb; 1639 u_int status; 1640 u_int aux_status; 1641 u_int hba_stat; 1642 u_int scsi_stat; 1643 u_int32_t residue_len; /* Number of bytes not transferred */ 1644 1645 dpt = (dpt_softc_t *)arg; 1646 1647 /* First order of business is to check if this interrupt is for us */ 1648 while (((aux_status = dpt_inb(dpt, HA_RAUXSTAT)) & HA_AIRQ) != 0) { 1649 1650 /* 1651 * What we want to do now, is to capture the status, all of it, 1652 * move it where it belongs, wake up whoever sleeps waiting to 1653 * process this result, and get out of here. 1654 */ 1655 if (dpt->sp->ccb_busaddr < dpt->dpt_ccb_busbase 1656 || dpt->sp->ccb_busaddr >= dpt->dpt_ccb_busend) { 1657 printf("Encountered bogus status packet\n"); 1658 status = dpt_inb(dpt, HA_RSTATUS); 1659 return; 1660 } 1661 1662 dccb = dptccbptov(dpt, dpt->sp->ccb_busaddr); 1663 1664 dpt->sp->ccb_busaddr = ~0; 1665 1666 /* Ignore status packets with EOC not set */ 1667 if (dpt->sp->EOC == 0) { 1668 printf("dpt%d ERROR: Request %d received with " 1669 "clear EOC.\n Marking as LOST.\n", 1670 dpt->unit, dccb->transaction_id); 1671 1672 #ifdef DPT_HANDLE_TIMEOUTS 1673 dccb->state |= DPT_CCB_STATE_MARKED_LOST; 1674 #endif 1675 /* This CLEARS the interrupt! */ 1676 status = dpt_inb(dpt, HA_RSTATUS); 1677 continue; 1678 } 1679 dpt->sp->EOC = 0; 1680 1681 /* 1682 * Double buffer the status information so the hardware can 1683 * work on updating the status packet while we decifer the 1684 * one we were just interrupted for. 1685 * According to Mark Salyzyn, we only need few pieces of it. 1686 */ 1687 hba_stat = dpt->sp->hba_stat; 1688 scsi_stat = dpt->sp->scsi_stat; 1689 residue_len = dpt->sp->residue_len; 1690 1691 /* Clear interrupts, check for error */ 1692 if ((status = dpt_inb(dpt, HA_RSTATUS)) & HA_SERROR) { 1693 /* 1694 * Error Condition. Check for magic cookie. Exit 1695 * this test on earliest sign of non-reset condition 1696 */ 1697 1698 /* Check that this is not a board reset interrupt */ 1699 if (dpt_just_reset(dpt)) { 1700 printf("dpt%d: HBA rebooted.\n" 1701 " All transactions should be " 1702 "resubmitted\n", 1703 dpt->unit); 1704 1705 printf("dpt%d: >>---->> This is incomplete, " 1706 "fix me.... <<----<<", dpt->unit); 1707 panic("DPT Rebooted"); 1708 1709 } 1710 } 1711 /* Process CCB */ 1712 ccb = dccb->ccb; 1713 untimeout(dpttimeout, dccb, ccb->ccb_h.timeout_ch); 1714 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1715 bus_dmasync_op_t op; 1716 1717 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 1718 op = BUS_DMASYNC_POSTREAD; 1719 else 1720 op = BUS_DMASYNC_POSTWRITE; 1721 bus_dmamap_sync(dpt->buffer_dmat, dccb->dmamap, op); 1722 bus_dmamap_unload(dpt->buffer_dmat, dccb->dmamap); 1723 } 1724 1725 /* Common Case inline... */ 1726 if (hba_stat == HA_NO_ERROR) { 1727 ccb->csio.scsi_status = scsi_stat; 1728 ccb->ccb_h.status = 0; 1729 switch (scsi_stat) { 1730 case SCSI_STATUS_OK: 1731 ccb->ccb_h.status |= CAM_REQ_CMP; 1732 break; 1733 case SCSI_STATUS_CHECK_COND: 1734 case SCSI_STATUS_CMD_TERMINATED: 1735 bcopy(&dccb->sense_data, &ccb->csio.sense_data, 1736 ccb->csio.sense_len); 1737 ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 1738 /* FALLTHROUGH */ 1739 default: 1740 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR; 1741 /* XXX Freeze DevQ */ 1742 break; 1743 } 1744 ccb->csio.resid = residue_len; 1745 dptfreeccb(dpt, dccb); 1746 xpt_done(ccb); 1747 } else { 1748 dptprocesserror(dpt, dccb, ccb, hba_stat, scsi_stat, 1749 residue_len); 1750 } 1751 } 1752 } 1753 1754 static void 1755 dptprocesserror(dpt_softc_t *dpt, dpt_ccb_t *dccb, union ccb *ccb, 1756 u_int hba_stat, u_int scsi_stat, u_int32_t resid) 1757 { 1758 ccb->csio.resid = resid; 1759 switch (hba_stat) { 1760 case HA_ERR_SEL_TO: 1761 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 1762 break; 1763 case HA_ERR_CMD_TO: 1764 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 1765 break; 1766 case HA_SCSIBUS_RESET: 1767 case HA_HBA_POWER_UP: /* Similar effect to a bus reset??? */ 1768 ccb->ccb_h.status = CAM_SCSI_BUS_RESET; 1769 break; 1770 case HA_CP_ABORTED: 1771 case HA_CP_RESET: /* XXX ??? */ 1772 case HA_CP_ABORT_NA: /* XXX ??? */ 1773 case HA_CP_RESET_NA: /* XXX ??? */ 1774 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) 1775 ccb->ccb_h.status = CAM_REQ_ABORTED; 1776 break; 1777 case HA_PCI_PARITY: 1778 case HA_PCI_MABORT: 1779 case HA_PCI_TABORT: 1780 case HA_PCI_STABORT: 1781 case HA_BUS_PARITY: 1782 case HA_PARITY_ERR: 1783 case HA_ECC_ERR: 1784 ccb->ccb_h.status = CAM_UNCOR_PARITY; 1785 break; 1786 case HA_UNX_MSGRJCT: 1787 ccb->ccb_h.status = CAM_MSG_REJECT_REC; 1788 break; 1789 case HA_UNX_BUSPHASE: 1790 ccb->ccb_h.status = CAM_SEQUENCE_FAIL; 1791 break; 1792 case HA_UNX_BUS_FREE: 1793 ccb->ccb_h.status = CAM_UNEXP_BUSFREE; 1794 break; 1795 case HA_SCSI_HUNG: 1796 case HA_RESET_STUCK: 1797 /* 1798 * Dead??? Can the controller get unstuck 1799 * from these conditions 1800 */ 1801 ccb->ccb_h.status = CAM_NO_HBA; 1802 break; 1803 case HA_RSENSE_FAIL: 1804 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; 1805 break; 1806 default: 1807 printf("dpt%d: Undocumented Error %x\n", dpt->unit, hba_stat); 1808 printf("Please mail this message to shimon@simon-shapiro.org\n"); 1809 ccb->ccb_h.status = CAM_REQ_CMP_ERR; 1810 break; 1811 } 1812 dptfreeccb(dpt, dccb); 1813 xpt_done(ccb); 1814 } 1815 1816 static void 1817 dpttimeout(void *arg) 1818 { 1819 struct dpt_ccb *dccb; 1820 union ccb *ccb; 1821 struct dpt_softc *dpt; 1822 int s; 1823 1824 dccb = (struct dpt_ccb *)arg; 1825 ccb = dccb->ccb; 1826 dpt = (struct dpt_softc *)ccb->ccb_h.ccb_dpt_ptr; 1827 xpt_print_path(ccb->ccb_h.path); 1828 printf("CCB %p - timed out\n", (void *)dccb); 1829 1830 s = splcam(); 1831 1832 /* 1833 * Try to clear any pending jobs. FreeBSD will lose interrupts, 1834 * leaving the controller suspended, and commands timed-out. 1835 * By calling the interrupt handler, any command thus stuck will be 1836 * completed. 1837 */ 1838 dpt_intr(dpt); 1839 1840 if ((dccb->state & DCCB_ACTIVE) == 0) { 1841 xpt_print_path(ccb->ccb_h.path); 1842 printf("CCB %p - timed out CCB already completed\n", 1843 (void *)dccb); 1844 splx(s); 1845 return; 1846 } 1847 1848 /* Abort this particular command. Leave all others running */ 1849 dpt_send_immediate(dpt, &dccb->eata_ccb, dccb->eata_ccb.cp_busaddr, 1850 /*retries*/20000, EATA_SPECIFIC_ABORT, 0, 0); 1851 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 1852 splx(s); 1853 } 1854 1855 /* 1856 * Shutdown the controller and ensure that the cache is completely flushed. 1857 * Called from the shutdown_final event after all disk access has completed. 1858 */ 1859 static void 1860 dptshutdown(void *arg, int howto) 1861 { 1862 dpt_softc_t *dpt; 1863 1864 dpt = (dpt_softc_t *)arg; 1865 1866 printf("dpt%d: Shutting down (mode %x) HBA. Please wait...\n", 1867 dpt->unit, howto); 1868 1869 /* 1870 * What we do for a shutdown, is give the DPT early power loss warning 1871 */ 1872 dpt_send_immediate(dpt, NULL, 0, EATA_POWER_OFF_WARN, 0, 0, 0); 1873 DELAY(1000 * 1000 * 5); 1874 printf("dpt%d: Controller was warned of shutdown and is now " 1875 "disabled\n", dpt->unit); 1876 } 1877 1878 /*============================================================================*/ 1879 1880 #if 0 1881 #ifdef DPT_RESET_HBA 1882 1883 /* 1884 ** Function name : dpt_reset_hba 1885 ** 1886 ** Description : Reset the HBA and properly discard all pending work 1887 ** Input : Softc 1888 ** Output : Nothing 1889 */ 1890 static void 1891 dpt_reset_hba(dpt_softc_t *dpt) 1892 { 1893 eata_ccb_t *ccb; 1894 int ospl; 1895 dpt_ccb_t dccb, *dccbp; 1896 int result; 1897 struct scsi_xfer *xs; 1898 1899 /* Prepare a control block. The SCSI command part is immaterial */ 1900 dccb.xs = NULL; 1901 dccb.flags = 0; 1902 dccb.state = DPT_CCB_STATE_NEW; 1903 dccb.std_callback = NULL; 1904 dccb.wrbuff_callback = NULL; 1905 1906 ccb = &dccb.eata_ccb; 1907 ccb->CP_OpCode = EATA_CMD_RESET; 1908 ccb->SCSI_Reset = 0; 1909 ccb->HBA_Init = 1; 1910 ccb->Auto_Req_Sen = 1; 1911 ccb->cp_id = 0; /* Should be ignored */ 1912 ccb->DataIn = 1; 1913 ccb->DataOut = 0; 1914 ccb->Interpret = 1; 1915 ccb->reqlen = htonl(sizeof(struct scsi_sense_data)); 1916 ccb->cp_statDMA = htonl(vtophys(&ccb->cp_statDMA)); 1917 ccb->cp_reqDMA = htonl(vtophys(&ccb->cp_reqDMA)); 1918 ccb->cp_viraddr = (u_int32_t) & ccb; 1919 1920 ccb->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO; 1921 ccb->cp_scsi_cmd = 0; /* Should be ignored */ 1922 1923 /* Lock up the submitted queue. We are very persistant here */ 1924 ospl = splcam(); 1925 while (dpt->queue_status & DPT_SUBMITTED_QUEUE_ACTIVE) { 1926 DELAY(100); 1927 } 1928 1929 dpt->queue_status |= DPT_SUBMITTED_QUEUE_ACTIVE; 1930 splx(ospl); 1931 1932 /* Send the RESET message */ 1933 if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb, 1934 EATA_CMD_RESET, 0, 0, 0, 0)) != 0) { 1935 printf("dpt%d: Failed to send the RESET message.\n" 1936 " Trying cold boot (ouch!)\n", dpt->unit); 1937 1938 1939 if ((result = dpt_send_eata_command(dpt, &dccb.eata_ccb, 1940 EATA_COLD_BOOT, 0, 0, 1941 0, 0)) != 0) { 1942 panic("dpt%d: Faild to cold boot the HBA\n", 1943 dpt->unit); 1944 } 1945 #ifdef DPT_MEASURE_PERFORMANCE 1946 dpt->performance.cold_boots++; 1947 #endif /* DPT_MEASURE_PERFORMANCE */ 1948 } 1949 1950 #ifdef DPT_MEASURE_PERFORMANCE 1951 dpt->performance.warm_starts++; 1952 #endif /* DPT_MEASURE_PERFORMANCE */ 1953 1954 printf("dpt%d: Aborting pending requests. O/S should re-submit\n", 1955 dpt->unit); 1956 1957 while ((dccbp = TAILQ_FIRST(&dpt->completed_ccbs)) != NULL) { 1958 struct scsi_xfer *xs = dccbp->xs; 1959 1960 /* Not all transactions have xs structs */ 1961 if (xs != NULL) { 1962 /* Tell the kernel proper this did not complete well */ 1963 xs->error |= XS_SELTIMEOUT; 1964 xs->flags |= SCSI_ITSDONE; 1965 scsi_done(xs); 1966 } 1967 1968 dpt_Qremove_submitted(dpt, dccbp); 1969 1970 /* Remember, Callbacks are NOT in the standard queue */ 1971 if (dccbp->std_callback != NULL) { 1972 (dccbp->std_callback)(dpt, dccbp->eata_ccb.cp_channel, 1973 dccbp); 1974 } else { 1975 ospl = splcam(); 1976 dpt_Qpush_free(dpt, dccbp); 1977 splx(ospl); 1978 } 1979 } 1980 1981 printf("dpt%d: reset done aborting all pending commands\n", dpt->unit); 1982 dpt->queue_status &= ~DPT_SUBMITTED_QUEUE_ACTIVE; 1983 } 1984 1985 #endif /* DPT_RESET_HBA */ 1986 1987 /* 1988 * Build a Command Block for target mode READ/WRITE BUFFER, 1989 * with the ``sync'' bit ON. 1990 * 1991 * Although the length and offset are 24 bit fields in the command, they cannot 1992 * exceed 8192 bytes, so we take them as short integers andcheck their range. 1993 * If they are sensless, we round them to zero offset, maximum length and 1994 * complain. 1995 */ 1996 1997 static void 1998 dpt_target_ccb(dpt_softc_t * dpt, int bus, u_int8_t target, u_int8_t lun, 1999 dpt_ccb_t * ccb, int mode, u_int8_t command, 2000 u_int16_t length, u_int16_t offset) 2001 { 2002 eata_ccb_t *cp; 2003 int ospl; 2004 2005 if ((length + offset) > DPT_MAX_TARGET_MODE_BUFFER_SIZE) { 2006 printf("dpt%d: Length of %d, and offset of %d are wrong\n", 2007 dpt->unit, length, offset); 2008 length = DPT_MAX_TARGET_MODE_BUFFER_SIZE; 2009 offset = 0; 2010 } 2011 ccb->xs = NULL; 2012 ccb->flags = 0; 2013 ccb->state = DPT_CCB_STATE_NEW; 2014 ccb->std_callback = (ccb_callback) dpt_target_done; 2015 ccb->wrbuff_callback = NULL; 2016 2017 cp = &ccb->eata_ccb; 2018 cp->CP_OpCode = EATA_CMD_DMA_SEND_CP; 2019 cp->SCSI_Reset = 0; 2020 cp->HBA_Init = 0; 2021 cp->Auto_Req_Sen = 1; 2022 cp->cp_id = target; 2023 cp->DataIn = 1; 2024 cp->DataOut = 0; 2025 cp->Interpret = 0; 2026 cp->reqlen = htonl(sizeof(struct scsi_sense_data)); 2027 cp->cp_statDMA = htonl(vtophys(&cp->cp_statDMA)); 2028 cp->cp_reqDMA = htonl(vtophys(&cp->cp_reqDMA)); 2029 cp->cp_viraddr = (u_int32_t) & ccb; 2030 2031 cp->cp_msg[0] = HA_IDENTIFY_MSG | HA_DISCO_RECO; 2032 2033 cp->cp_scsi_cmd = command; 2034 cp->cp_cdb[1] = (u_int8_t) (mode & SCSI_TM_MODE_MASK); 2035 cp->cp_lun = lun; /* Order is important here! */ 2036 cp->cp_cdb[2] = 0x00; /* Buffer Id, only 1 :-( */ 2037 cp->cp_cdb[3] = (length >> 16) & 0xFF; /* Buffer offset MSB */ 2038 cp->cp_cdb[4] = (length >> 8) & 0xFF; 2039 cp->cp_cdb[5] = length & 0xFF; 2040 cp->cp_cdb[6] = (length >> 16) & 0xFF; /* Length MSB */ 2041 cp->cp_cdb[7] = (length >> 8) & 0xFF; 2042 cp->cp_cdb[8] = length & 0xFF; /* Length LSB */ 2043 cp->cp_cdb[9] = 0; /* No sync, no match bits */ 2044 2045 /* 2046 * This could be optimized to live in dpt_register_buffer. 2047 * We keep it here, just in case the kernel decides to reallocate pages 2048 */ 2049 if (dpt_scatter_gather(dpt, ccb, DPT_RW_BUFFER_SIZE, 2050 dpt->rw_buffer[bus][target][lun])) { 2051 printf("dpt%d: Failed to setup Scatter/Gather for " 2052 "Target-Mode buffer\n", dpt->unit); 2053 } 2054 } 2055 2056 /* Setup a target mode READ command */ 2057 2058 static void 2059 dpt_set_target(int redo, dpt_softc_t * dpt, 2060 u_int8_t bus, u_int8_t target, u_int8_t lun, int mode, 2061 u_int16_t length, u_int16_t offset, dpt_ccb_t * ccb) 2062 { 2063 int ospl; 2064 2065 if (dpt->target_mode_enabled) { 2066 ospl = splcam(); 2067 2068 if (!redo) 2069 dpt_target_ccb(dpt, bus, target, lun, ccb, mode, 2070 SCSI_TM_READ_BUFFER, length, offset); 2071 2072 ccb->transaction_id = ++dpt->commands_processed; 2073 2074 #ifdef DPT_MEASURE_PERFORMANCE 2075 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++; 2076 ccb->command_started = microtime_now; 2077 #endif 2078 dpt_Qadd_waiting(dpt, ccb); 2079 dpt_sched_queue(dpt); 2080 2081 splx(ospl); 2082 } else { 2083 printf("dpt%d: Target Mode Request, but Target Mode is OFF\n", 2084 dpt->unit); 2085 } 2086 } 2087 2088 /* 2089 * Schedule a buffer to be sent to another target. 2090 * The work will be scheduled and the callback provided will be called when 2091 * the work is actually done. 2092 * 2093 * Please NOTE: ``Anyone'' can send a buffer, but only registered clients 2094 * get notified of receipt of buffers. 2095 */ 2096 2097 int 2098 dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun, 2099 u_int8_t mode, u_int16_t length, u_int16_t offset, void *data, 2100 buff_wr_done callback) 2101 { 2102 dpt_softc_t *dpt; 2103 dpt_ccb_t *ccb = NULL; 2104 int ospl; 2105 2106 /* This is an external call. Be a bit paranoid */ 2107 for (dpt = TAILQ_FIRST(&dpt_softc_list); 2108 dpt != NULL; 2109 dpt = TAILQ_NEXT(dpt, links)) { 2110 if (dpt->unit == unit) 2111 goto valid_unit; 2112 } 2113 2114 return (INVALID_UNIT); 2115 2116 valid_unit: 2117 2118 if (dpt->target_mode_enabled) { 2119 if ((channel >= dpt->channels) || (target > dpt->max_id) || 2120 (lun > dpt->max_lun)) { 2121 return (INVALID_SENDER); 2122 } 2123 if ((dpt->rw_buffer[channel][target][lun] == NULL) || 2124 (dpt->buffer_receiver[channel][target][lun] == NULL)) 2125 return (NOT_REGISTERED); 2126 2127 ospl = splsoftcam(); 2128 /* Process the free list */ 2129 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2130 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2131 " Please try later\n", 2132 dpt->unit); 2133 splx(ospl); 2134 return (NO_RESOURCES); 2135 } 2136 /* Now grab the newest CCB */ 2137 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2138 splx(ospl); 2139 panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit); 2140 } 2141 splx(ospl); 2142 2143 bcopy(dpt->rw_buffer[channel][target][lun] + offset, data, length); 2144 dpt_target_ccb(dpt, channel, target, lun, ccb, mode, 2145 SCSI_TM_WRITE_BUFFER, 2146 length, offset); 2147 ccb->std_callback = (ccb_callback) callback; /* Potential trouble */ 2148 2149 ospl = splcam(); 2150 ccb->transaction_id = ++dpt->commands_processed; 2151 2152 #ifdef DPT_MEASURE_PERFORMANCE 2153 dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]++; 2154 ccb->command_started = microtime_now; 2155 #endif 2156 dpt_Qadd_waiting(dpt, ccb); 2157 dpt_sched_queue(dpt); 2158 2159 splx(ospl); 2160 return (0); 2161 } 2162 return (DRIVER_DOWN); 2163 } 2164 2165 static void 2166 dpt_target_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb) 2167 { 2168 int ospl; 2169 eata_ccb_t *cp; 2170 2171 cp = &ccb->eata_ccb; 2172 2173 /* 2174 * Remove the CCB from the waiting queue. 2175 * We do NOT put it back on the free, etc., queues as it is a special 2176 * ccb, owned by the dpt_softc of this unit. 2177 */ 2178 ospl = splsoftcam(); 2179 dpt_Qremove_completed(dpt, ccb); 2180 splx(ospl); 2181 2182 #define br_channel (ccb->eata_ccb.cp_channel) 2183 #define br_target (ccb->eata_ccb.cp_id) 2184 #define br_lun (ccb->eata_ccb.cp_LUN) 2185 #define br_index [br_channel][br_target][br_lun] 2186 #define read_buffer_callback (dpt->buffer_receiver br_index ) 2187 #define read_buffer (dpt->rw_buffer[br_channel][br_target][br_lun]) 2188 #define cb(offset) (ccb->eata_ccb.cp_cdb[offset]) 2189 #define br_offset ((cb(3) << 16) | (cb(4) << 8) | cb(5)) 2190 #define br_length ((cb(6) << 16) | (cb(7) << 8) | cb(8)) 2191 2192 /* Different reasons for being here, you know... */ 2193 switch (ccb->eata_ccb.cp_scsi_cmd) { 2194 case SCSI_TM_READ_BUFFER: 2195 if (read_buffer_callback != NULL) { 2196 /* This is a buffer generated by a kernel process */ 2197 read_buffer_callback(dpt->unit, br_channel, 2198 br_target, br_lun, 2199 read_buffer, 2200 br_offset, br_length); 2201 } else { 2202 /* 2203 * This is a buffer waited for by a user (sleeping) 2204 * command 2205 */ 2206 wakeup(ccb); 2207 } 2208 2209 /* We ALWAYS re-issue the same command; args are don't-care */ 2210 dpt_set_target(1, 0, 0, 0, 0, 0, 0, 0, 0); 2211 break; 2212 2213 case SCSI_TM_WRITE_BUFFER: 2214 (ccb->wrbuff_callback) (dpt->unit, br_channel, br_target, 2215 br_offset, br_length, 2216 br_lun, ccb->status_packet.hba_stat); 2217 break; 2218 default: 2219 printf("dpt%d: %s is an unsupported command for target mode\n", 2220 dpt->unit, scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd)); 2221 } 2222 ospl = splsoftcam(); 2223 dpt->target_ccb[br_channel][br_target][br_lun] = NULL; 2224 dpt_Qpush_free(dpt, ccb); 2225 splx(ospl); 2226 } 2227 2228 2229 /* 2230 * Use this function to register a client for a buffer read target operation. 2231 * The function you register will be called every time a buffer is received 2232 * by the target mode code. 2233 */ 2234 dpt_rb_t 2235 dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target, u_int8_t lun, 2236 u_int8_t mode, u_int16_t length, u_int16_t offset, 2237 dpt_rec_buff callback, dpt_rb_op_t op) 2238 { 2239 dpt_softc_t *dpt; 2240 dpt_ccb_t *ccb = NULL; 2241 int ospl; 2242 2243 for (dpt = TAILQ_FIRST(&dpt_softc_list); 2244 dpt != NULL; 2245 dpt = TAILQ_NEXT(dpt, links)) { 2246 if (dpt->unit == unit) 2247 goto valid_unit; 2248 } 2249 2250 return (INVALID_UNIT); 2251 2252 valid_unit: 2253 2254 if (dpt->state & DPT_HA_SHUTDOWN_ACTIVE) 2255 return (DRIVER_DOWN); 2256 2257 if ((channel > (dpt->channels - 1)) || (target > (dpt->max_id - 1)) || 2258 (lun > (dpt->max_lun - 1))) 2259 return (INVALID_SENDER); 2260 2261 if (dpt->buffer_receiver[channel][target][lun] == NULL) { 2262 if (op == REGISTER_BUFFER) { 2263 /* Assign the requested callback */ 2264 dpt->buffer_receiver[channel][target][lun] = callback; 2265 /* Get a CCB */ 2266 ospl = splsoftcam(); 2267 2268 /* Process the free list */ 2269 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2270 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2271 " Please try later\n", 2272 dpt->unit); 2273 splx(ospl); 2274 return (NO_RESOURCES); 2275 } 2276 /* Now grab the newest CCB */ 2277 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2278 splx(ospl); 2279 panic("dpt%d: Got a NULL CCB from pop_free()\n", 2280 dpt->unit); 2281 } 2282 splx(ospl); 2283 2284 /* Clean up the leftover of the previous tenant */ 2285 ccb->status = DPT_CCB_STATE_NEW; 2286 dpt->target_ccb[channel][target][lun] = ccb; 2287 2288 dpt->rw_buffer[channel][target][lun] = 2289 malloc(DPT_RW_BUFFER_SIZE, M_DEVBUF, M_NOWAIT); 2290 if (dpt->rw_buffer[channel][target][lun] == NULL) { 2291 printf("dpt%d: Failed to allocate " 2292 "Target-Mode buffer\n", dpt->unit); 2293 ospl = splsoftcam(); 2294 dpt_Qpush_free(dpt, ccb); 2295 splx(ospl); 2296 return (NO_RESOURCES); 2297 } 2298 dpt_set_target(0, dpt, channel, target, lun, mode, 2299 length, offset, ccb); 2300 return (SUCCESSFULLY_REGISTERED); 2301 } else 2302 return (NOT_REGISTERED); 2303 } else { 2304 if (op == REGISTER_BUFFER) { 2305 if (dpt->buffer_receiver[channel][target][lun] == callback) 2306 return (ALREADY_REGISTERED); 2307 else 2308 return (REGISTERED_TO_ANOTHER); 2309 } else { 2310 if (dpt->buffer_receiver[channel][target][lun] == callback) { 2311 dpt->buffer_receiver[channel][target][lun] = NULL; 2312 ospl = splsoftcam(); 2313 dpt_Qpush_free(dpt, ccb); 2314 splx(ospl); 2315 free(dpt->rw_buffer[channel][target][lun], M_DEVBUF); 2316 return (SUCCESSFULLY_REGISTERED); 2317 } else 2318 return (INVALID_CALLBACK); 2319 } 2320 2321 } 2322 } 2323 2324 /* Return the state of the blinking DPT LED's */ 2325 u_int8_t 2326 dpt_blinking_led(dpt_softc_t * dpt) 2327 { 2328 int ndx; 2329 int ospl; 2330 u_int32_t state; 2331 u_int32_t previous; 2332 u_int8_t result; 2333 2334 ospl = splcam(); 2335 2336 result = 0; 2337 2338 for (ndx = 0, state = 0, previous = 0; 2339 (ndx < 10) && (state != previous); 2340 ndx++) { 2341 previous = state; 2342 state = dpt_inl(dpt, 1); 2343 } 2344 2345 if ((state == previous) && (state == DPT_BLINK_INDICATOR)) 2346 result = dpt_inb(dpt, 5); 2347 2348 splx(ospl); 2349 return (result); 2350 } 2351 2352 /* 2353 * Execute a command which did not come from the kernel's SCSI layer. 2354 * The only way to map user commands to bus and target is to comply with the 2355 * standard DPT wire-down scheme: 2356 */ 2357 int 2358 dpt_user_cmd(dpt_softc_t * dpt, eata_pt_t * user_cmd, 2359 caddr_t cmdarg, int minor_no) 2360 { 2361 dpt_ccb_t *ccb; 2362 void *data; 2363 int channel, target, lun; 2364 int huh; 2365 int result; 2366 int ospl; 2367 int submitted; 2368 2369 data = NULL; 2370 channel = minor2hba(minor_no); 2371 target = minor2target(minor_no); 2372 lun = minor2lun(minor_no); 2373 2374 if ((channel > (dpt->channels - 1)) 2375 || (target > dpt->max_id) 2376 || (lun > dpt->max_lun)) 2377 return (ENXIO); 2378 2379 if (target == dpt->sc_scsi_link[channel].adapter_targ) { 2380 /* This one is for the controller itself */ 2381 if ((user_cmd->eataID[0] != 'E') 2382 || (user_cmd->eataID[1] != 'A') 2383 || (user_cmd->eataID[2] != 'T') 2384 || (user_cmd->eataID[3] != 'A')) { 2385 return (ENXIO); 2386 } 2387 } 2388 /* Get a DPT CCB, so we can prepare a command */ 2389 ospl = splsoftcam(); 2390 2391 /* Process the free list */ 2392 if ((TAILQ_EMPTY(&dpt->free_ccbs)) && dpt_alloc_freelist(dpt)) { 2393 printf("dpt%d ERROR: Cannot allocate any more free CCB's.\n" 2394 " Please try later\n", 2395 dpt->unit); 2396 splx(ospl); 2397 return (EFAULT); 2398 } 2399 /* Now grab the newest CCB */ 2400 if ((ccb = dpt_Qpop_free(dpt)) == NULL) { 2401 splx(ospl); 2402 panic("dpt%d: Got a NULL CCB from pop_free()\n", dpt->unit); 2403 } else { 2404 splx(ospl); 2405 /* Clean up the leftover of the previous tenant */ 2406 ccb->status = DPT_CCB_STATE_NEW; 2407 } 2408 2409 bcopy((caddr_t) & user_cmd->command_packet, (caddr_t) & ccb->eata_ccb, 2410 sizeof(eata_ccb_t)); 2411 2412 /* We do not want to do user specified scatter/gather. Why?? */ 2413 if (ccb->eata_ccb.scatter == 1) 2414 return (EINVAL); 2415 2416 ccb->eata_ccb.Auto_Req_Sen = 1; 2417 ccb->eata_ccb.reqlen = htonl(sizeof(struct scsi_sense_data)); 2418 ccb->eata_ccb.cp_datalen = htonl(sizeof(ccb->eata_ccb.cp_datalen)); 2419 ccb->eata_ccb.cp_dataDMA = htonl(vtophys(ccb->eata_ccb.cp_dataDMA)); 2420 ccb->eata_ccb.cp_statDMA = htonl(vtophys(&ccb->eata_ccb.cp_statDMA)); 2421 ccb->eata_ccb.cp_reqDMA = htonl(vtophys(&ccb->eata_ccb.cp_reqDMA)); 2422 ccb->eata_ccb.cp_viraddr = (u_int32_t) & ccb; 2423 2424 if (ccb->eata_ccb.DataIn || ccb->eata_ccb.DataOut) { 2425 /* Data I/O is involved in this command. Alocate buffer */ 2426 if (ccb->eata_ccb.cp_datalen > PAGE_SIZE) { 2427 data = contigmalloc(ccb->eata_ccb.cp_datalen, 2428 M_TEMP, M_WAITOK, 0, ~0, 2429 ccb->eata_ccb.cp_datalen, 2430 0x10000); 2431 } else { 2432 data = malloc(ccb->eata_ccb.cp_datalen, M_TEMP, 2433 M_WAITOK); 2434 } 2435 2436 if (data == NULL) { 2437 printf("dpt%d: Cannot allocate %d bytes " 2438 "for EATA command\n", dpt->unit, 2439 ccb->eata_ccb.cp_datalen); 2440 return (EFAULT); 2441 } 2442 #define usr_cmd_DMA (caddr_t)user_cmd->command_packet.cp_dataDMA 2443 if (ccb->eata_ccb.DataIn == 1) { 2444 if (copyin(usr_cmd_DMA, 2445 data, ccb->eata_ccb.cp_datalen) == -1) 2446 return (EFAULT); 2447 } 2448 } else { 2449 /* No data I/O involved here. Make sure the DPT knows that */ 2450 ccb->eata_ccb.cp_datalen = 0; 2451 data = NULL; 2452 } 2453 2454 if (ccb->eata_ccb.FWNEST == 1) 2455 ccb->eata_ccb.FWNEST = 0; 2456 2457 if (ccb->eata_ccb.cp_datalen != 0) { 2458 if (dpt_scatter_gather(dpt, ccb, ccb->eata_ccb.cp_datalen, 2459 data) != 0) { 2460 if (data != NULL) 2461 free(data, M_TEMP); 2462 return (EFAULT); 2463 } 2464 } 2465 /** 2466 * We are required to quiet a SCSI bus. 2467 * since we do not queue comands on a bus basis, 2468 * we wait for ALL commands on a controller to complete. 2469 * In the mean time, sched_queue() will not schedule new commands. 2470 */ 2471 if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD) 2472 && (ccb->eata_ccb.cp_cdb[2] == BUS_QUIET)) { 2473 /* We wait for ALL traffic for this HBa to subside */ 2474 ospl = splsoftcam(); 2475 dpt->state |= DPT_HA_QUIET; 2476 splx(ospl); 2477 2478 while ((submitted = dpt->submitted_ccbs_count) != 0) { 2479 huh = tsleep((void *) dpt, PCATCH | PRIBIO, "dptqt", 2480 100 * hz); 2481 switch (huh) { 2482 case 0: 2483 /* Wakeup call received */ 2484 break; 2485 case EWOULDBLOCK: 2486 /* Timer Expired */ 2487 break; 2488 default: 2489 /* anything else */ 2490 break; 2491 } 2492 } 2493 } 2494 /* Resume normal operation */ 2495 if ((ccb->eata_ccb.cp_cdb[0] == MULTIFUNCTION_CMD) 2496 && (ccb->eata_ccb.cp_cdb[2] == BUS_UNQUIET)) { 2497 ospl = splsoftcam(); 2498 dpt->state &= ~DPT_HA_QUIET; 2499 splx(ospl); 2500 } 2501 /** 2502 * Schedule the command and submit it. 2503 * We bypass dpt_sched_queue, as it will block on DPT_HA_QUIET 2504 */ 2505 ccb->xs = NULL; 2506 ccb->flags = 0; 2507 ccb->eata_ccb.Auto_Req_Sen = 1; /* We always want this feature */ 2508 2509 ccb->transaction_id = ++dpt->commands_processed; 2510 ccb->std_callback = (ccb_callback) dpt_user_cmd_done; 2511 ccb->result = (u_int32_t) & cmdarg; 2512 ccb->data = data; 2513 2514 #ifdef DPT_MEASURE_PERFORMANCE 2515 ++dpt->performance.command_count[ccb->eata_ccb.cp_scsi_cmd]; 2516 ccb->command_started = microtime_now; 2517 #endif 2518 ospl = splcam(); 2519 dpt_Qadd_waiting(dpt, ccb); 2520 splx(ospl); 2521 2522 dpt_sched_queue(dpt); 2523 2524 /* Wait for the command to complete */ 2525 (void) tsleep((void *) ccb, PCATCH | PRIBIO, "dptucw", 100 * hz); 2526 2527 /* Free allocated memory */ 2528 if (data != NULL) 2529 free(data, M_TEMP); 2530 2531 return (0); 2532 } 2533 2534 static void 2535 dpt_user_cmd_done(dpt_softc_t * dpt, int bus, dpt_ccb_t * ccb) 2536 { 2537 int ospl = splsoftcam(); 2538 u_int32_t result; 2539 caddr_t cmd_arg; 2540 2541 /** 2542 * If Auto Request Sense is on, copyout the sense struct 2543 */ 2544 #define usr_pckt_DMA (caddr_t)(intptr_t)ntohl(ccb->eata_ccb.cp_reqDMA) 2545 #define usr_pckt_len ntohl(ccb->eata_ccb.cp_datalen) 2546 if (ccb->eata_ccb.Auto_Req_Sen == 1) { 2547 if (copyout((caddr_t) & ccb->sense_data, usr_pckt_DMA, 2548 sizeof(struct scsi_sense_data))) { 2549 ccb->result = EFAULT; 2550 dpt_Qpush_free(dpt, ccb); 2551 splx(ospl); 2552 wakeup(ccb); 2553 return; 2554 } 2555 } 2556 /* If DataIn is on, copyout the data */ 2557 if ((ccb->eata_ccb.DataIn == 1) 2558 && (ccb->status_packet.hba_stat == HA_NO_ERROR)) { 2559 if (copyout(ccb->data, usr_pckt_DMA, usr_pckt_len)) { 2560 dpt_Qpush_free(dpt, ccb); 2561 ccb->result = EFAULT; 2562 2563 splx(ospl); 2564 wakeup(ccb); 2565 return; 2566 } 2567 } 2568 /* Copyout the status */ 2569 result = ccb->status_packet.hba_stat; 2570 cmd_arg = (caddr_t) ccb->result; 2571 2572 if (copyout((caddr_t) & result, cmd_arg, sizeof(result))) { 2573 dpt_Qpush_free(dpt, ccb); 2574 ccb->result = EFAULT; 2575 splx(ospl); 2576 wakeup(ccb); 2577 return; 2578 } 2579 /* Put the CCB back in the freelist */ 2580 ccb->state |= DPT_CCB_STATE_COMPLETED; 2581 dpt_Qpush_free(dpt, ccb); 2582 2583 /* Free allocated memory */ 2584 splx(ospl); 2585 return; 2586 } 2587 2588 #ifdef DPT_HANDLE_TIMEOUTS 2589 /** 2590 * This function walks down the SUBMITTED queue. 2591 * Every request that is too old gets aborted and marked. 2592 * Since the DPT will complete (interrupt) immediately (what does that mean?), 2593 * We just walk the list, aborting old commands and marking them as such. 2594 * The dpt_complete function will get rid of the that were interrupted in the 2595 * normal manner. 2596 * 2597 * This function needs to run at splcam(), as it interacts with the submitted 2598 * queue, as well as the completed and free queues. Just like dpt_intr() does. 2599 * To run it at any ISPL other than that of dpt_intr(), will mean that dpt_intr 2600 * willbe able to pre-empt it, grab a transaction in progress (towards 2601 * destruction) and operate on it. The state of this transaction will be not 2602 * very clear. 2603 * The only other option, is to lock it only as long as necessary but have 2604 * dpt_intr() spin-wait on it. In a UP environment this makes no sense and in 2605 * a SMP environment, the advantage is dubvious for a function that runs once 2606 * every ten seconds for few microseconds and, on systems with healthy 2607 * hardware, does not do anything anyway. 2608 */ 2609 2610 static void 2611 dpt_handle_timeouts(dpt_softc_t * dpt) 2612 { 2613 dpt_ccb_t *ccb; 2614 int ospl; 2615 2616 ospl = splcam(); 2617 2618 if (dpt->state & DPT_HA_TIMEOUTS_ACTIVE) { 2619 printf("dpt%d WARNING: Timeout Handling Collision\n", 2620 dpt->unit); 2621 splx(ospl); 2622 return; 2623 } 2624 dpt->state |= DPT_HA_TIMEOUTS_ACTIVE; 2625 2626 /* Loop through the entire submitted queue, looking for lost souls */ 2627 for (ccb = TAILQ_FIRST(&dpt->submitted_ccbs); 2628 ccb != NULL; 2629 ccb = TAILQ_NEXT(ccb, links)) { 2630 struct scsi_xfer *xs; 2631 u_int32_t age, max_age; 2632 2633 xs = ccb->xs; 2634 age = dpt_time_delta(ccb->command_started, microtime_now); 2635 2636 #define TenSec 10000000 2637 2638 if (xs == NULL) { /* Local, non-kernel call */ 2639 max_age = TenSec; 2640 } else { 2641 max_age = (((xs->timeout * (dpt->submitted_ccbs_count 2642 + DPT_TIMEOUT_FACTOR)) 2643 > TenSec) 2644 ? (xs->timeout * (dpt->submitted_ccbs_count 2645 + DPT_TIMEOUT_FACTOR)) 2646 : TenSec); 2647 } 2648 2649 /* 2650 * If a transaction is marked lost and is TWICE as old as we 2651 * care, then, and only then do we destroy it! 2652 */ 2653 if (ccb->state & DPT_CCB_STATE_MARKED_LOST) { 2654 /* Remember who is next */ 2655 if (age > (max_age * 2)) { 2656 dpt_Qremove_submitted(dpt, ccb); 2657 ccb->state &= ~DPT_CCB_STATE_MARKED_LOST; 2658 ccb->state |= DPT_CCB_STATE_ABORTED; 2659 #define cmd_name scsi_cmd_name(ccb->eata_ccb.cp_scsi_cmd) 2660 if (ccb->retries++ > DPT_RETRIES) { 2661 printf("dpt%d ERROR: Destroying stale " 2662 "%d (%s)\n" 2663 " on " 2664 "c%db%dt%du%d (%d/%d)\n", 2665 dpt->unit, ccb->transaction_id, 2666 cmd_name, 2667 dpt->unit, 2668 ccb->eata_ccb.cp_channel, 2669 ccb->eata_ccb.cp_id, 2670 ccb->eata_ccb.cp_LUN, age, 2671 ccb->retries); 2672 #define send_ccb &ccb->eata_ccb 2673 #define ESA EATA_SPECIFIC_ABORT 2674 (void) dpt_send_immediate(dpt, 2675 send_ccb, 2676 ESA, 2677 0, 0); 2678 dpt_Qpush_free(dpt, ccb); 2679 2680 /* The SCSI layer should re-try */ 2681 xs->error |= XS_TIMEOUT; 2682 xs->flags |= SCSI_ITSDONE; 2683 scsi_done(xs); 2684 } else { 2685 printf("dpt%d ERROR: Stale %d (%s) on " 2686 "c%db%dt%du%d (%d)\n" 2687 " gets another " 2688 "chance(%d/%d)\n", 2689 dpt->unit, ccb->transaction_id, 2690 cmd_name, 2691 dpt->unit, 2692 ccb->eata_ccb.cp_channel, 2693 ccb->eata_ccb.cp_id, 2694 ccb->eata_ccb.cp_LUN, 2695 age, ccb->retries, DPT_RETRIES); 2696 2697 dpt_Qpush_waiting(dpt, ccb); 2698 dpt_sched_queue(dpt); 2699 } 2700 } 2701 } else { 2702 /* 2703 * This is a transaction that is not to be destroyed 2704 * (yet) But it is too old for our liking. We wait as 2705 * long as the upper layer thinks. Not really, we 2706 * multiply that by the number of commands in the 2707 * submitted queue + 1. 2708 */ 2709 if (!(ccb->state & DPT_CCB_STATE_MARKED_LOST) && 2710 (age != ~0) && (age > max_age)) { 2711 printf("dpt%d ERROR: Marking %d (%s) on " 2712 "c%db%dt%du%d \n" 2713 " as late after %dusec\n", 2714 dpt->unit, ccb->transaction_id, 2715 cmd_name, 2716 dpt->unit, ccb->eata_ccb.cp_channel, 2717 ccb->eata_ccb.cp_id, 2718 ccb->eata_ccb.cp_LUN, age); 2719 ccb->state |= DPT_CCB_STATE_MARKED_LOST; 2720 } 2721 } 2722 } 2723 2724 dpt->state &= ~DPT_HA_TIMEOUTS_ACTIVE; 2725 splx(ospl); 2726 } 2727 2728 static void 2729 dpt_timeout(void *arg) 2730 { 2731 dpt_softc_t *dpt = (dpt_softc_t *) arg; 2732 2733 if (!(dpt->state & DPT_HA_TIMEOUTS_ACTIVE)) 2734 dpt_handle_timeouts(dpt); 2735 2736 timeout(dpt_timeout, (caddr_t) dpt, hz * 10); 2737 } 2738 2739 #endif /* DPT_HANDLE_TIMEOUTS */ 2740 2741 #endif
Cache object: 313b5dc173b70806ea356da9ddfb8a37
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