Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/drm.h
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1 /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*- 2 * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com 3 * 4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 6 * All rights reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the next 16 * paragraph) shall be included in all copies or substantial portions of the 17 * Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Authors: 28 * Rickard E. (Rik) Faith <faith@valinux.com> 29 * 30 * Acknowledgements: 31 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg. 32 * 33 * $FreeBSD: releng/5.0/sys/dev/drm/drm.h 95746 2002-04-29 18:18:42Z anholt $ 34 */ 35 36 #ifndef _DRM_H_ 37 #define _DRM_H_ 38 39 #ifdef __linux__ 40 #include <linux/config.h> 41 #include <asm/ioctl.h> /* For _IO* macros */ 42 #define DRM_IOCTL_NR(n) _IOC_NR(n) 43 #endif /* __linux__ */ 44 #ifdef __FreeBSD__ 45 #include <sys/ioccom.h> 46 #define DRM_IOCTL_NR(n) ((n) & 0xff) 47 #endif /* __FreeBSD__ */ 48 49 #define XFREE86_VERSION(major,minor,patch,snap) \ 50 ((major << 16) | (minor << 8) | patch) 51 52 #ifndef CONFIG_XFREE86_VERSION 53 #define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0) 54 #endif 55 56 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0) 57 #define DRM_PROC_DEVICES "/proc/devices" 58 #define DRM_PROC_MISC "/proc/misc" 59 #define DRM_PROC_DRM "/proc/drm" 60 #define DRM_DEV_DRM "/dev/drm" 61 #define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP) 62 #define DRM_DEV_UID 0 63 #define DRM_DEV_GID 0 64 #endif 65 66 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0) 67 #define DRM_MAJOR 226 68 #define DRM_MAX_MINOR 15 69 #endif 70 #define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */ 71 #define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */ 72 #define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */ 73 #define DRM_RAM_PERCENT 50 /* How much system ram can we lock? */ 74 75 #define _DRM_LOCK_HELD 0x80000000 /* Hardware lock is held */ 76 #define _DRM_LOCK_CONT 0x40000000 /* Hardware lock is contended */ 77 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 78 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 79 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 80 81 typedef unsigned long drm_handle_t; 82 typedef unsigned int drm_context_t; 83 typedef unsigned int drm_drawable_t; 84 typedef unsigned int drm_magic_t; 85 86 /* Warning: If you change this structure, make sure you change 87 * XF86DRIClipRectRec in the server as well */ 88 89 typedef struct drm_clip_rect { 90 unsigned short x1; 91 unsigned short y1; 92 unsigned short x2; 93 unsigned short y2; 94 } drm_clip_rect_t; 95 96 typedef struct drm_tex_region { 97 unsigned char next; 98 unsigned char prev; 99 unsigned char in_use; 100 unsigned char padding; 101 unsigned int age; 102 } drm_tex_region_t; 103 104 typedef struct drm_version { 105 int version_major; /* Major version */ 106 int version_minor; /* Minor version */ 107 int version_patchlevel;/* Patch level */ 108 size_t name_len; /* Length of name buffer */ 109 char *name; /* Name of driver */ 110 size_t date_len; /* Length of date buffer */ 111 char *date; /* User-space buffer to hold date */ 112 size_t desc_len; /* Length of desc buffer */ 113 char *desc; /* User-space buffer to hold desc */ 114 } drm_version_t; 115 116 typedef struct drm_unique { 117 size_t unique_len; /* Length of unique */ 118 char *unique; /* Unique name for driver instantiation */ 119 } drm_unique_t; 120 121 typedef struct drm_list { 122 int count; /* Length of user-space structures */ 123 drm_version_t *version; 124 } drm_list_t; 125 126 typedef struct drm_block { 127 int unused; 128 } drm_block_t; 129 130 typedef struct drm_control { 131 enum { 132 DRM_ADD_COMMAND, 133 DRM_RM_COMMAND, 134 DRM_INST_HANDLER, 135 DRM_UNINST_HANDLER 136 } func; 137 int irq; 138 } drm_control_t; 139 140 typedef enum drm_map_type { 141 _DRM_FRAME_BUFFER = 0, /* WC (no caching), no core dump */ 142 _DRM_REGISTERS = 1, /* no caching, no core dump */ 143 _DRM_SHM = 2, /* shared, cached */ 144 _DRM_AGP = 3, /* AGP/GART */ 145 _DRM_SCATTER_GATHER = 4 /* Scatter/gather memory for PCI DMA */ 146 } drm_map_type_t; 147 148 typedef enum drm_map_flags { 149 _DRM_RESTRICTED = 0x01, /* Cannot be mapped to user-virtual */ 150 _DRM_READ_ONLY = 0x02, 151 _DRM_LOCKED = 0x04, /* shared, cached, locked */ 152 _DRM_KERNEL = 0x08, /* kernel requires access */ 153 _DRM_WRITE_COMBINING = 0x10, /* use write-combining if available */ 154 _DRM_CONTAINS_LOCK = 0x20, /* SHM page that contains lock */ 155 _DRM_REMOVABLE = 0x40 /* Removable mapping */ 156 } drm_map_flags_t; 157 158 typedef struct drm_ctx_priv_map { 159 unsigned int ctx_id; /* Context requesting private mapping */ 160 void *handle; /* Handle of map */ 161 } drm_ctx_priv_map_t; 162 163 typedef struct drm_map { 164 unsigned long offset; /* Requested physical address (0 for SAREA)*/ 165 unsigned long size; /* Requested physical size (bytes) */ 166 drm_map_type_t type; /* Type of memory to map */ 167 drm_map_flags_t flags; /* Flags */ 168 void *handle; /* User-space: "Handle" to pass to mmap */ 169 /* Kernel-space: kernel-virtual address */ 170 int mtrr; /* MTRR slot used */ 171 /* Private data */ 172 } drm_map_t; 173 174 typedef struct drm_client { 175 int idx; /* Which client desired? */ 176 int auth; /* Is client authenticated? */ 177 unsigned long pid; /* Process id */ 178 unsigned long uid; /* User id */ 179 unsigned long magic; /* Magic */ 180 unsigned long iocs; /* Ioctl count */ 181 } drm_client_t; 182 183 typedef enum { 184 _DRM_STAT_LOCK, 185 _DRM_STAT_OPENS, 186 _DRM_STAT_CLOSES, 187 _DRM_STAT_IOCTLS, 188 _DRM_STAT_LOCKS, 189 _DRM_STAT_UNLOCKS, 190 _DRM_STAT_VALUE, /* Generic value */ 191 _DRM_STAT_BYTE, /* Generic byte counter (1024bytes/K) */ 192 _DRM_STAT_COUNT, /* Generic non-byte counter (1000/k) */ 193 194 _DRM_STAT_IRQ, /* IRQ */ 195 _DRM_STAT_PRIMARY, /* Primary DMA bytes */ 196 _DRM_STAT_SECONDARY, /* Secondary DMA bytes */ 197 _DRM_STAT_DMA, /* DMA */ 198 _DRM_STAT_SPECIAL, /* Special DMA (e.g., priority or polled) */ 199 _DRM_STAT_MISSED /* Missed DMA opportunity */ 200 201 /* Add to the *END* of the list */ 202 } drm_stat_type_t; 203 204 typedef struct drm_stats { 205 unsigned long count; 206 struct { 207 unsigned long value; 208 drm_stat_type_t type; 209 } data[15]; 210 } drm_stats_t; 211 212 typedef enum drm_lock_flags { 213 _DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */ 214 _DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */ 215 _DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */ 216 _DRM_LOCK_FLUSH_ALL = 0x08, /* Flush all DMA queues first */ 217 /* These *HALT* flags aren't supported yet 218 -- they will be used to support the 219 full-screen DGA-like mode. */ 220 _DRM_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues */ 221 _DRM_HALT_CUR_QUEUES = 0x20 /* Halt all current queues */ 222 } drm_lock_flags_t; 223 224 typedef struct drm_lock { 225 int context; 226 drm_lock_flags_t flags; 227 } drm_lock_t; 228 229 typedef enum drm_dma_flags { /* These values *MUST* match xf86drm.h */ 230 /* Flags for DMA buffer dispatch */ 231 _DRM_DMA_BLOCK = 0x01, /* Block until buffer dispatched. 232 Note, the buffer may not yet have 233 been processed by the hardware -- 234 getting a hardware lock with the 235 hardware quiescent will ensure 236 that the buffer has been 237 processed. */ 238 _DRM_DMA_WHILE_LOCKED = 0x02, /* Dispatch while lock held */ 239 _DRM_DMA_PRIORITY = 0x04, /* High priority dispatch */ 240 241 /* Flags for DMA buffer request */ 242 _DRM_DMA_WAIT = 0x10, /* Wait for free buffers */ 243 _DRM_DMA_SMALLER_OK = 0x20, /* Smaller-than-requested buffers ok */ 244 _DRM_DMA_LARGER_OK = 0x40 /* Larger-than-requested buffers ok */ 245 } drm_dma_flags_t; 246 247 typedef struct drm_buf_desc { 248 int count; /* Number of buffers of this size */ 249 int size; /* Size in bytes */ 250 int low_mark; /* Low water mark */ 251 int high_mark; /* High water mark */ 252 enum { 253 _DRM_PAGE_ALIGN = 0x01, /* Align on page boundaries for DMA */ 254 _DRM_AGP_BUFFER = 0x02, /* Buffer is in agp space */ 255 _DRM_SG_BUFFER = 0x04 /* Scatter/gather memory buffer */ 256 } flags; 257 unsigned long agp_start; /* Start address of where the agp buffers 258 * are in the agp aperture */ 259 } drm_buf_desc_t; 260 261 typedef struct drm_buf_info { 262 int count; /* Entries in list */ 263 drm_buf_desc_t *list; 264 } drm_buf_info_t; 265 266 typedef struct drm_buf_free { 267 int count; 268 int *list; 269 } drm_buf_free_t; 270 271 typedef struct drm_buf_pub { 272 int idx; /* Index into master buflist */ 273 int total; /* Buffer size */ 274 int used; /* Amount of buffer in use (for DMA) */ 275 void *address; /* Address of buffer */ 276 } drm_buf_pub_t; 277 278 typedef struct drm_buf_map { 279 int count; /* Length of buflist */ 280 void *virtual; /* Mmaped area in user-virtual */ 281 drm_buf_pub_t *list; /* Buffer information */ 282 } drm_buf_map_t; 283 284 typedef struct drm_dma { 285 /* Indices here refer to the offset into 286 buflist in drm_buf_get_t. */ 287 int context; /* Context handle */ 288 int send_count; /* Number of buffers to send */ 289 int *send_indices; /* List of handles to buffers */ 290 int *send_sizes; /* Lengths of data to send */ 291 drm_dma_flags_t flags; /* Flags */ 292 int request_count; /* Number of buffers requested */ 293 int request_size; /* Desired size for buffers */ 294 int *request_indices; /* Buffer information */ 295 int *request_sizes; 296 int granted_count; /* Number of buffers granted */ 297 } drm_dma_t; 298 299 typedef enum { 300 _DRM_CONTEXT_PRESERVED = 0x01, 301 _DRM_CONTEXT_2DONLY = 0x02 302 } drm_ctx_flags_t; 303 304 typedef struct drm_ctx { 305 drm_context_t handle; 306 drm_ctx_flags_t flags; 307 } drm_ctx_t; 308 309 typedef struct drm_ctx_res { 310 int count; 311 drm_ctx_t *contexts; 312 } drm_ctx_res_t; 313 314 typedef struct drm_draw { 315 drm_drawable_t handle; 316 } drm_draw_t; 317 318 typedef struct drm_auth { 319 drm_magic_t magic; 320 } drm_auth_t; 321 322 typedef struct drm_irq_busid { 323 int irq; 324 int busnum; 325 int devnum; 326 int funcnum; 327 } drm_irq_busid_t; 328 329 typedef struct drm_agp_mode { 330 unsigned long mode; 331 } drm_agp_mode_t; 332 333 /* For drm_agp_alloc -- allocated a buffer */ 334 typedef struct drm_agp_buffer { 335 unsigned long size; /* In bytes -- will round to page boundary */ 336 unsigned long handle; /* Used for BIND/UNBIND ioctls */ 337 unsigned long type; /* Type of memory to allocate */ 338 unsigned long physical; /* Physical used by i810 */ 339 } drm_agp_buffer_t; 340 341 /* For drm_agp_bind */ 342 typedef struct drm_agp_binding { 343 unsigned long handle; /* From drm_agp_buffer */ 344 unsigned long offset; /* In bytes -- will round to page boundary */ 345 } drm_agp_binding_t; 346 347 typedef struct drm_agp_info { 348 int agp_version_major; 349 int agp_version_minor; 350 unsigned long mode; 351 unsigned long aperture_base; /* physical address */ 352 unsigned long aperture_size; /* bytes */ 353 unsigned long memory_allowed; /* bytes */ 354 unsigned long memory_used; 355 356 /* PCI information */ 357 unsigned short id_vendor; 358 unsigned short id_device; 359 } drm_agp_info_t; 360 361 typedef struct drm_scatter_gather { 362 unsigned long size; /* In bytes -- will round to page boundary */ 363 unsigned long handle; /* Used for mapping / unmapping */ 364 } drm_scatter_gather_t; 365 366 #define DRM_IOCTL_BASE 'd' 367 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 368 #define DRM_IOR(nr,size) _IOR(DRM_IOCTL_BASE,nr,size) 369 #define DRM_IOW(nr,size) _IOW(DRM_IOCTL_BASE,nr,size) 370 #define DRM_IOWR(nr,size) _IOWR(DRM_IOCTL_BASE,nr,size) 371 372 373 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t) 374 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t) 375 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t) 376 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t) 377 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t) 378 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t) 379 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t) 380 381 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t) 382 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t) 383 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t) 384 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t) 385 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t) 386 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t) 387 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t) 388 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t) 389 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t) 390 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t) 391 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t) 392 393 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t) 394 395 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t) 396 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t) 397 398 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t) 399 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t) 400 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t) 401 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t) 402 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t) 403 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t) 404 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t) 405 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t) 406 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t) 407 #define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t) 408 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t) 409 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t) 410 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t) 411 412 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 413 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 414 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t) 415 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t) 416 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t) 417 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t) 418 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t) 419 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t) 420 421 #define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t) 422 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t) 423 424 #endif
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