The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/i810_drm.h

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    1 /*
    2  * $FreeBSD: releng/5.0/sys/dev/drm/i810_drm.h 95746 2002-04-29 18:18:42Z anholt $
    3  */
    4 
    5 #ifndef _I810_DRM_H_
    6 #define _I810_DRM_H_
    7 
    8 /* WARNING: These defines must be the same as what the Xserver uses.
    9  * if you change them, you must change the defines in the Xserver.
   10  */
   11 
   12 #ifndef _I810_DEFINES_
   13 #define _I810_DEFINES_
   14 
   15 #define I810_DMA_BUF_ORDER              12
   16 #define I810_DMA_BUF_SZ                 (1<<I810_DMA_BUF_ORDER)
   17 #define I810_DMA_BUF_NR                 256
   18 #define I810_NR_SAREA_CLIPRECTS         8
   19 
   20 /* Each region is a minimum of 64k, and there are at most 64 of them.
   21  */
   22 #define I810_NR_TEX_REGIONS 64
   23 #define I810_LOG_MIN_TEX_REGION_SIZE 16
   24 #endif
   25 
   26 #define I810_UPLOAD_TEX0IMAGE  0x1 /* handled clientside */
   27 #define I810_UPLOAD_TEX1IMAGE  0x2 /* handled clientside */
   28 #define I810_UPLOAD_CTX        0x4
   29 #define I810_UPLOAD_BUFFERS    0x8
   30 #define I810_UPLOAD_TEX0       0x10
   31 #define I810_UPLOAD_TEX1       0x20
   32 #define I810_UPLOAD_CLIPRECTS  0x40
   33 
   34 
   35 /* Indices into buf.Setup where various bits of state are mirrored per
   36  * context and per buffer.  These can be fired at the card as a unit,
   37  * or in a piecewise fashion as required.
   38  */
   39 
   40 /* Destbuffer state 
   41  *    - backbuffer linear offset and pitch -- invarient in the current dri
   42  *    - zbuffer linear offset and pitch -- also invarient
   43  *    - drawing origin in back and depth buffers.
   44  *
   45  * Keep the depth/back buffer state here to acommodate private buffers
   46  * in the future.
   47  */
   48 #define I810_DESTREG_DI0  0     /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
   49 #define I810_DESTREG_DI1  1
   50 #define I810_DESTREG_DV0  2     /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
   51 #define I810_DESTREG_DV1  3
   52 #define I810_DESTREG_DR0  4     /* GFX_OP_DRAWRECT_INFO (4 dwords) */
   53 #define I810_DESTREG_DR1  5
   54 #define I810_DESTREG_DR2  6
   55 #define I810_DESTREG_DR3  7
   56 #define I810_DESTREG_DR4  8
   57 #define I810_DEST_SETUP_SIZE 10
   58 
   59 /* Context state
   60  */
   61 #define I810_CTXREG_CF0   0     /* GFX_OP_COLOR_FACTOR */
   62 #define I810_CTXREG_CF1   1     
   63 #define I810_CTXREG_ST0   2     /* GFX_OP_STIPPLE */
   64 #define I810_CTXREG_ST1   3
   65 #define I810_CTXREG_VF    4     /* GFX_OP_VERTEX_FMT */
   66 #define I810_CTXREG_MT    5     /* GFX_OP_MAP_TEXELS */
   67 #define I810_CTXREG_MC0   6     /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
   68 #define I810_CTXREG_MC1   7     /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
   69 #define I810_CTXREG_MC2   8     /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
   70 #define I810_CTXREG_MA0   9     /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
   71 #define I810_CTXREG_MA1   10    /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
   72 #define I810_CTXREG_MA2   11    /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
   73 #define I810_CTXREG_SDM   12    /* GFX_OP_SRC_DEST_MONO */
   74 #define I810_CTXREG_FOG   13    /* GFX_OP_FOG_COLOR */
   75 #define I810_CTXREG_B1    14    /* GFX_OP_BOOL_1 */
   76 #define I810_CTXREG_B2    15    /* GFX_OP_BOOL_2 */
   77 #define I810_CTXREG_LCS   16    /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
   78 #define I810_CTXREG_PV    17    /* GFX_OP_PV_RULE -- Invarient! */
   79 #define I810_CTXREG_ZA    18    /* GFX_OP_ZBIAS_ALPHAFUNC */
   80 #define I810_CTXREG_AA    19    /* GFX_OP_ANTIALIAS */
   81 #define I810_CTX_SETUP_SIZE 20 
   82 
   83 /* Texture state (per tex unit)
   84  */
   85 #define I810_TEXREG_MI0  0      /* GFX_OP_MAP_INFO (4 dwords) */
   86 #define I810_TEXREG_MI1  1      
   87 #define I810_TEXREG_MI2  2      
   88 #define I810_TEXREG_MI3  3      
   89 #define I810_TEXREG_MF   4      /* GFX_OP_MAP_FILTER */
   90 #define I810_TEXREG_MLC  5      /* GFX_OP_MAP_LOD_CTL */
   91 #define I810_TEXREG_MLL  6      /* GFX_OP_MAP_LOD_LIMITS */
   92 #define I810_TEXREG_MCS  7      /* GFX_OP_MAP_COORD_SETS ??? */
   93 #define I810_TEX_SETUP_SIZE 8
   94 
   95 #define I810_FRONT   0x1
   96 #define I810_BACK    0x2
   97 #define I810_DEPTH   0x4
   98 
   99 
  100 typedef struct _drm_i810_init {
  101         enum {
  102                 I810_INIT_DMA = 0x01,
  103                 I810_CLEANUP_DMA = 0x02
  104         } func;
  105 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  106         int ring_map_idx;
  107         int buffer_map_idx;
  108 #else
  109         unsigned int mmio_offset;
  110         unsigned int buffers_offset;
  111 #endif
  112         int sarea_priv_offset;
  113         unsigned int ring_start;
  114         unsigned int ring_end;
  115         unsigned int ring_size;
  116         unsigned int front_offset;
  117         unsigned int back_offset;
  118         unsigned int depth_offset;
  119         unsigned int w;
  120         unsigned int h;
  121         unsigned int pitch;
  122         unsigned int pitch_bits; 
  123 } drm_i810_init_t;
  124 
  125 /* Warning: If you change the SAREA structure you must change the Xserver
  126  * structure as well */
  127 
  128 typedef struct _drm_i810_tex_region {
  129         unsigned char next, prev; /* indices to form a circular LRU  */
  130         unsigned char in_use;   /* owned by a client, or free? */
  131         int age;                /* tracked by clients to update local LRU's */
  132 } drm_i810_tex_region_t;
  133 
  134 typedef struct _drm_i810_sarea {
  135         unsigned int ContextState[I810_CTX_SETUP_SIZE];
  136         unsigned int BufferState[I810_DEST_SETUP_SIZE];
  137         unsigned int TexState[2][I810_TEX_SETUP_SIZE];
  138         unsigned int dirty;
  139 
  140         unsigned int nbox;
  141         drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS];
  142 
  143         /* Maintain an LRU of contiguous regions of texture space.  If
  144          * you think you own a region of texture memory, and it has an
  145          * age different to the one you set, then you are mistaken and
  146          * it has been stolen by another client.  If global texAge
  147          * hasn't changed, there is no need to walk the list.
  148          *
  149          * These regions can be used as a proxy for the fine-grained
  150          * texture information of other clients - by maintaining them
  151          * in the same lru which is used to age their own textures,
  152          * clients have an approximate lru for the whole of global
  153          * texture space, and can make informed decisions as to which
  154          * areas to kick out.  There is no need to choose whether to
  155          * kick out your own texture or someone else's - simply eject
  156          * them all in LRU order.  
  157          */
  158    
  159         drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; 
  160                                 /* Last elt is sentinal */
  161         int texAge;             /* last time texture was uploaded */
  162         int last_enqueue;       /* last time a buffer was enqueued */
  163         int last_dispatch;      /* age of the most recently dispatched buffer */
  164         int last_quiescent;     /*  */
  165         int ctxOwner;           /* last context to upload state */
  166 
  167         int vertex_prim;
  168 
  169 } drm_i810_sarea_t;
  170 
  171 /* i810 specific ioctls */
  172 #define DRM_IOCTL_I810_INIT             DRM_IOW( 0x40, drm_i810_init_t)
  173 #define DRM_IOCTL_I810_VERTEX           DRM_IOW( 0x41, drm_i810_vertex_t)
  174 #define DRM_IOCTL_I810_CLEAR            DRM_IOW( 0x42, drm_i810_clear_t)
  175 #define DRM_IOCTL_I810_FLUSH            DRM_IO(  0x43)
  176 #define DRM_IOCTL_I810_GETAGE           DRM_IO(  0x44)
  177 #define DRM_IOCTL_I810_GETBUF           DRM_IOWR(0x45, drm_i810_dma_t)
  178 #define DRM_IOCTL_I810_SWAP             DRM_IO(  0x46)
  179 #define DRM_IOCTL_I810_COPY             DRM_IOW( 0x47, drm_i810_copy_t)
  180 #define DRM_IOCTL_I810_DOCOPY           DRM_IO(  0x48)
  181 
  182 typedef struct _drm_i810_clear {
  183         int clear_color;
  184         int clear_depth;
  185         int flags;
  186 } drm_i810_clear_t;
  187 
  188 
  189 /* These may be placeholders if we have more cliprects than
  190  * I810_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
  191  * false, indicating that the buffer will be dispatched again with a
  192  * new set of cliprects.
  193  */
  194 typedef struct _drm_i810_vertex {
  195         int idx;                /* buffer index */
  196         int used;               /* nr bytes in use */
  197         int discard;            /* client is finished with the buffer? */
  198 } drm_i810_vertex_t;
  199 
  200 typedef struct _drm_i810_copy_t {
  201         int idx;                /* buffer index */
  202         int used;               /* nr bytes in use */
  203         void *address;          /* Address to copy from */
  204 } drm_i810_copy_t;
  205 
  206 typedef struct drm_i810_dma {
  207         void *virtual;
  208         int request_idx;
  209         int request_size;
  210         int granted;
  211 } drm_i810_dma_t;
  212 
  213 #endif /* _I810_DRM_H_ */

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