FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/mga_drm.h
1 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
2 * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All rights reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keithw@valinux.com>
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 *
34 * $FreeBSD: releng/5.0/sys/dev/drm/mga_drm.h 95746 2002-04-29 18:18:42Z anholt $
35 */
36
37 #ifndef __MGA_DRM_H__
38 #define __MGA_DRM_H__
39
40 /* WARNING: If you change any of these defines, make sure to change the
41 * defines in the Xserver file (mga_sarea.h)
42 */
43 #ifndef __MGA_SAREA_DEFINES__
44 #define __MGA_SAREA_DEFINES__
45
46 /* WARP pipe flags
47 */
48 #define MGA_F 0x1 /* fog */
49 #define MGA_A 0x2 /* alpha */
50 #define MGA_S 0x4 /* specular */
51 #define MGA_T2 0x8 /* multitexture */
52
53 #define MGA_WARP_TGZ 0
54 #define MGA_WARP_TGZF (MGA_F)
55 #define MGA_WARP_TGZA (MGA_A)
56 #define MGA_WARP_TGZAF (MGA_F|MGA_A)
57 #define MGA_WARP_TGZS (MGA_S)
58 #define MGA_WARP_TGZSF (MGA_S|MGA_F)
59 #define MGA_WARP_TGZSA (MGA_S|MGA_A)
60 #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
61 #define MGA_WARP_T2GZ (MGA_T2)
62 #define MGA_WARP_T2GZF (MGA_T2|MGA_F)
63 #define MGA_WARP_T2GZA (MGA_T2|MGA_A)
64 #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
65 #define MGA_WARP_T2GZS (MGA_T2|MGA_S)
66 #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
67 #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
68 #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
69
70 #define MGA_MAX_G200_PIPES 8 /* no multitex */
71 #define MGA_MAX_G400_PIPES 16
72 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
73 #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
74
75 #define MGA_CARD_TYPE_G200 1
76 #define MGA_CARD_TYPE_G400 2
77
78
79 #define MGA_FRONT 0x1
80 #define MGA_BACK 0x2
81 #define MGA_DEPTH 0x4
82
83 /* What needs to be changed for the current vertex dma buffer?
84 */
85 #define MGA_UPLOAD_CONTEXT 0x1
86 #define MGA_UPLOAD_TEX0 0x2
87 #define MGA_UPLOAD_TEX1 0x4
88 #define MGA_UPLOAD_PIPE 0x8
89 #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
90 #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
91 #define MGA_UPLOAD_2D 0x40
92 #define MGA_WAIT_AGE 0x80 /* handled client-side */
93 #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
94 #if 0
95 #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
96 quiescent */
97 #endif
98
99 /* 32 buffers of 64k each, total 2 meg.
100 */
101 #define MGA_BUFFER_SIZE (1 << 16)
102 #define MGA_NUM_BUFFERS 128
103
104 /* Keep these small for testing.
105 */
106 #define MGA_NR_SAREA_CLIPRECTS 8
107
108 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128
109 * regions, subject to a minimum region size of (1<<16) == 64k.
110 *
111 * Clients may subdivide regions internally, but when sharing between
112 * clients, the region size is the minimum granularity.
113 */
114
115 #define MGA_CARD_HEAP 0
116 #define MGA_AGP_HEAP 1
117 #define MGA_NR_TEX_HEAPS 2
118 #define MGA_NR_TEX_REGIONS 16
119 #define MGA_LOG_MIN_TEX_REGION_SIZE 16
120
121 #endif /* __MGA_SAREA_DEFINES__ */
122
123
124 /* Setup registers for 3D context
125 */
126 typedef struct {
127 unsigned int dstorg;
128 unsigned int maccess;
129 unsigned int plnwt;
130 unsigned int dwgctl;
131 unsigned int alphactrl;
132 unsigned int fogcolor;
133 unsigned int wflag;
134 unsigned int tdualstage0;
135 unsigned int tdualstage1;
136 unsigned int fcol;
137 unsigned int stencil;
138 unsigned int stencilctl;
139 } drm_mga_context_regs_t;
140
141 /* Setup registers for 2D, X server
142 */
143 typedef struct {
144 unsigned int pitch;
145 } drm_mga_server_regs_t;
146
147 /* Setup registers for each texture unit
148 */
149 typedef struct {
150 unsigned int texctl;
151 unsigned int texctl2;
152 unsigned int texfilter;
153 unsigned int texbordercol;
154 unsigned int texorg;
155 unsigned int texwidth;
156 unsigned int texheight;
157 unsigned int texorg1;
158 unsigned int texorg2;
159 unsigned int texorg3;
160 unsigned int texorg4;
161 } drm_mga_texture_regs_t;
162
163 /* General aging mechanism
164 */
165 typedef struct {
166 unsigned int head; /* Position of head pointer */
167 unsigned int wrap; /* Primary DMA wrap count */
168 } drm_mga_age_t;
169
170 typedef struct _drm_mga_sarea {
171 /* The channel for communication of state information to the kernel
172 * on firing a vertex dma buffer.
173 */
174 drm_mga_context_regs_t context_state;
175 drm_mga_server_regs_t server_state;
176 drm_mga_texture_regs_t tex_state[2];
177 unsigned int warp_pipe;
178 unsigned int dirty;
179 unsigned int vertsize;
180
181 /* The current cliprects, or a subset thereof.
182 */
183 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
184 unsigned int nbox;
185
186 /* Information about the most recently used 3d drawable. The
187 * client fills in the req_* fields, the server fills in the
188 * exported_ fields and puts the cliprects into boxes, above.
189 *
190 * The client clears the exported_drawable field before
191 * clobbering the boxes data.
192 */
193 unsigned int req_drawable; /* the X drawable id */
194 unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
195
196 unsigned int exported_drawable;
197 unsigned int exported_index;
198 unsigned int exported_stamp;
199 unsigned int exported_buffers;
200 unsigned int exported_nfront;
201 unsigned int exported_nback;
202 int exported_back_x, exported_front_x, exported_w;
203 int exported_back_y, exported_front_y, exported_h;
204 drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
205
206 /* Counters for aging textures and for client-side throttling.
207 */
208 unsigned int status[4];
209 unsigned int last_wrap;
210
211 drm_mga_age_t last_frame;
212 unsigned int last_enqueue; /* last time a buffer was enqueued */
213 unsigned int last_dispatch; /* age of the most recently dispatched buffer */
214 unsigned int last_quiescent; /* */
215
216 /* LRU lists for texture memory in agp space and on the card.
217 */
218 drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
219 unsigned int texAge[MGA_NR_TEX_HEAPS];
220
221 /* Mechanism to validate card state.
222 */
223 int ctxOwner;
224 } drm_mga_sarea_t;
225
226 /* MGA specific ioctls */
227 #define DRM_IOCTL_MGA_INIT DRM_IOW( 0x40, drm_mga_init_t)
228 #define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x41, drm_lock_t)
229 #define DRM_IOCTL_MGA_RESET DRM_IO( 0x42)
230 #define DRM_IOCTL_MGA_SWAP DRM_IO( 0x43)
231 #define DRM_IOCTL_MGA_CLEAR DRM_IOW( 0x44, drm_mga_clear_t)
232 #define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x45, drm_mga_vertex_t)
233 #define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
234 #define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x47, drm_mga_iload_t)
235 #define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x48, drm_mga_blit_t)
236
237
238 /* WARNING: If you change any of these defines, make sure to change the
239 * defines in the Xserver file (xf86drmMga.h)
240 */
241 typedef struct _drm_mga_warp_index {
242 int installed;
243 unsigned long phys_addr;
244 int size;
245 } drm_mga_warp_index_t;
246
247 typedef struct drm_mga_init {
248 enum {
249 MGA_INIT_DMA = 0x01,
250 MGA_CLEANUP_DMA = 0x02
251 } func;
252
253 unsigned long sarea_priv_offset;
254
255 int chipset;
256 int sgram;
257
258 unsigned int maccess;
259
260 unsigned int fb_cpp;
261 unsigned int front_offset, front_pitch;
262 unsigned int back_offset, back_pitch;
263
264 unsigned int depth_cpp;
265 unsigned int depth_offset, depth_pitch;
266
267 unsigned int texture_offset[MGA_NR_TEX_HEAPS];
268 unsigned int texture_size[MGA_NR_TEX_HEAPS];
269
270 unsigned long fb_offset;
271 unsigned long mmio_offset;
272 unsigned long status_offset;
273 unsigned long warp_offset;
274 unsigned long primary_offset;
275 unsigned long buffers_offset;
276 } drm_mga_init_t;
277
278 typedef struct drm_mga_fullscreen {
279 enum {
280 MGA_INIT_FULLSCREEN = 0x01,
281 MGA_CLEANUP_FULLSCREEN = 0x02
282 } func;
283 } drm_mga_fullscreen_t;
284
285 typedef struct drm_mga_clear {
286 unsigned int flags;
287 unsigned int clear_color;
288 unsigned int clear_depth;
289 unsigned int color_mask;
290 unsigned int depth_mask;
291 } drm_mga_clear_t;
292
293 typedef struct drm_mga_vertex {
294 int idx; /* buffer to queue */
295 int used; /* bytes in use */
296 int discard; /* client finished with buffer? */
297 } drm_mga_vertex_t;
298
299 typedef struct drm_mga_indices {
300 int idx; /* buffer to queue */
301 unsigned int start;
302 unsigned int end;
303 int discard; /* client finished with buffer? */
304 } drm_mga_indices_t;
305
306 typedef struct drm_mga_iload {
307 int idx;
308 unsigned int dstorg;
309 unsigned int length;
310 } drm_mga_iload_t;
311
312 typedef struct _drm_mga_blit {
313 unsigned int planemask;
314 unsigned int srcorg;
315 unsigned int dstorg;
316 int src_pitch, dst_pitch;
317 int delta_sx, delta_sy;
318 int delta_dx, delta_dy;
319 int height, ydir; /* flip image vertically */
320 int source_pitch, dest_pitch;
321 } drm_mga_blit_t;
322
323 #endif
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