FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/mga_drm.h
1 /* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
2 * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com */
3 /*-
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All rights reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 *
34 * $FreeBSD$
35 */
36
37 #ifndef __MGA_DRM_H__
38 #define __MGA_DRM_H__
39
40 /* WARNING: If you change any of these defines, make sure to change the
41 * defines in the Xserver file (mga_sarea.h)
42 */
43
44 #ifndef __MGA_SAREA_DEFINES__
45 #define __MGA_SAREA_DEFINES__
46
47 /* WARP pipe flags
48 */
49 #define MGA_F 0x1 /* fog */
50 #define MGA_A 0x2 /* alpha */
51 #define MGA_S 0x4 /* specular */
52 #define MGA_T2 0x8 /* multitexture */
53
54 #define MGA_WARP_TGZ 0
55 #define MGA_WARP_TGZF (MGA_F)
56 #define MGA_WARP_TGZA (MGA_A)
57 #define MGA_WARP_TGZAF (MGA_F|MGA_A)
58 #define MGA_WARP_TGZS (MGA_S)
59 #define MGA_WARP_TGZSF (MGA_S|MGA_F)
60 #define MGA_WARP_TGZSA (MGA_S|MGA_A)
61 #define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
62 #define MGA_WARP_T2GZ (MGA_T2)
63 #define MGA_WARP_T2GZF (MGA_T2|MGA_F)
64 #define MGA_WARP_T2GZA (MGA_T2|MGA_A)
65 #define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
66 #define MGA_WARP_T2GZS (MGA_T2|MGA_S)
67 #define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
68 #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
69 #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
70
71 #define MGA_MAX_G200_PIPES 8 /* no multitex */
72 #define MGA_MAX_G400_PIPES 16
73 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
74 #define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
75
76 #define MGA_CARD_TYPE_G200 1
77 #define MGA_CARD_TYPE_G400 2
78
79
80 #define MGA_FRONT 0x1
81 #define MGA_BACK 0x2
82 #define MGA_DEPTH 0x4
83
84 /* What needs to be changed for the current vertex dma buffer?
85 */
86 #define MGA_UPLOAD_CONTEXT 0x1
87 #define MGA_UPLOAD_TEX0 0x2
88 #define MGA_UPLOAD_TEX1 0x4
89 #define MGA_UPLOAD_PIPE 0x8
90 #define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
91 #define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
92 #define MGA_UPLOAD_2D 0x40
93 #define MGA_WAIT_AGE 0x80 /* handled client-side */
94 #define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
95 #if 0
96 #define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
97 quiescent */
98 #endif
99
100 /* 32 buffers of 64k each, total 2 meg.
101 */
102 #define MGA_BUFFER_SIZE (1 << 16)
103 #define MGA_NUM_BUFFERS 128
104
105 /* Keep these small for testing.
106 */
107 #define MGA_NR_SAREA_CLIPRECTS 8
108
109 /* 2 heaps (1 for card, 1 for agp), each divided into upto 128
110 * regions, subject to a minimum region size of (1<<16) == 64k.
111 *
112 * Clients may subdivide regions internally, but when sharing between
113 * clients, the region size is the minimum granularity.
114 */
115
116 #define MGA_CARD_HEAP 0
117 #define MGA_AGP_HEAP 1
118 #define MGA_NR_TEX_HEAPS 2
119 #define MGA_NR_TEX_REGIONS 16
120 #define MGA_LOG_MIN_TEX_REGION_SIZE 16
121
122 #define DRM_MGA_IDLE_RETRY 2048
123
124 #endif /* __MGA_SAREA_DEFINES__ */
125
126
127 /* Setup registers for 3D context
128 */
129 typedef struct {
130 unsigned int dstorg;
131 unsigned int maccess;
132 unsigned int plnwt;
133 unsigned int dwgctl;
134 unsigned int alphactrl;
135 unsigned int fogcolor;
136 unsigned int wflag;
137 unsigned int tdualstage0;
138 unsigned int tdualstage1;
139 unsigned int fcol;
140 unsigned int stencil;
141 unsigned int stencilctl;
142 } drm_mga_context_regs_t;
143
144 /* Setup registers for 2D, X server
145 */
146 typedef struct {
147 unsigned int pitch;
148 } drm_mga_server_regs_t;
149
150 /* Setup registers for each texture unit
151 */
152 typedef struct {
153 unsigned int texctl;
154 unsigned int texctl2;
155 unsigned int texfilter;
156 unsigned int texbordercol;
157 unsigned int texorg;
158 unsigned int texwidth;
159 unsigned int texheight;
160 unsigned int texorg1;
161 unsigned int texorg2;
162 unsigned int texorg3;
163 unsigned int texorg4;
164 } drm_mga_texture_regs_t;
165
166 /* General aging mechanism
167 */
168 typedef struct {
169 unsigned int head; /* Position of head pointer */
170 unsigned int wrap; /* Primary DMA wrap count */
171 } drm_mga_age_t;
172
173 typedef struct _drm_mga_sarea {
174 /* The channel for communication of state information to the kernel
175 * on firing a vertex dma buffer.
176 */
177 drm_mga_context_regs_t context_state;
178 drm_mga_server_regs_t server_state;
179 drm_mga_texture_regs_t tex_state[2];
180 unsigned int warp_pipe;
181 unsigned int dirty;
182 unsigned int vertsize;
183
184 /* The current cliprects, or a subset thereof.
185 */
186 drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
187 unsigned int nbox;
188
189 /* Information about the most recently used 3d drawable. The
190 * client fills in the req_* fields, the server fills in the
191 * exported_ fields and puts the cliprects into boxes, above.
192 *
193 * The client clears the exported_drawable field before
194 * clobbering the boxes data.
195 */
196 unsigned int req_drawable; /* the X drawable id */
197 unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
198
199 unsigned int exported_drawable;
200 unsigned int exported_index;
201 unsigned int exported_stamp;
202 unsigned int exported_buffers;
203 unsigned int exported_nfront;
204 unsigned int exported_nback;
205 int exported_back_x, exported_front_x, exported_w;
206 int exported_back_y, exported_front_y, exported_h;
207 drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
208
209 /* Counters for aging textures and for client-side throttling.
210 */
211 unsigned int status[4];
212 unsigned int last_wrap;
213
214 drm_mga_age_t last_frame;
215 unsigned int last_enqueue; /* last time a buffer was enqueued */
216 unsigned int last_dispatch; /* age of the most recently dispatched buffer */
217 unsigned int last_quiescent; /* */
218
219 /* LRU lists for texture memory in agp space and on the card.
220 */
221 drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
222 unsigned int texAge[MGA_NR_TEX_HEAPS];
223
224 /* Mechanism to validate card state.
225 */
226 int ctxOwner;
227 } drm_mga_sarea_t;
228
229
230 /* WARNING: If you change any of these defines, make sure to change the
231 * defines in the Xserver file (xf86drmMga.h)
232 */
233
234 /* MGA specific ioctls
235 * The device specific ioctl range is 0x40 to 0x79.
236 */
237 #define DRM_MGA_INIT 0x00
238 #define DRM_MGA_FLUSH 0x01
239 #define DRM_MGA_RESET 0x02
240 #define DRM_MGA_SWAP 0x03
241 #define DRM_MGA_CLEAR 0x04
242 #define DRM_MGA_VERTEX 0x05
243 #define DRM_MGA_INDICES 0x06
244 #define DRM_MGA_ILOAD 0x07
245 #define DRM_MGA_BLIT 0x08
246 #define DRM_MGA_GETPARAM 0x09
247
248 #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
249 #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t)
250 #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET)
251 #define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP)
252 #define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
253 #define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
254 #define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
255 #define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
256 #define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
257 #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
258
259 typedef struct _drm_mga_warp_index {
260 int installed;
261 unsigned long phys_addr;
262 int size;
263 } drm_mga_warp_index_t;
264
265 typedef struct drm_mga_init {
266 enum {
267 MGA_INIT_DMA = 0x01,
268 MGA_CLEANUP_DMA = 0x02
269 } func;
270
271 unsigned long sarea_priv_offset;
272
273 int chipset;
274 int sgram;
275
276 unsigned int maccess;
277
278 unsigned int fb_cpp;
279 unsigned int front_offset, front_pitch;
280 unsigned int back_offset, back_pitch;
281
282 unsigned int depth_cpp;
283 unsigned int depth_offset, depth_pitch;
284
285 unsigned int texture_offset[MGA_NR_TEX_HEAPS];
286 unsigned int texture_size[MGA_NR_TEX_HEAPS];
287
288 unsigned long fb_offset;
289 unsigned long mmio_offset;
290 unsigned long status_offset;
291 unsigned long warp_offset;
292 unsigned long primary_offset;
293 unsigned long buffers_offset;
294 } drm_mga_init_t;
295
296 typedef struct drm_mga_fullscreen {
297 enum {
298 MGA_INIT_FULLSCREEN = 0x01,
299 MGA_CLEANUP_FULLSCREEN = 0x02
300 } func;
301 } drm_mga_fullscreen_t;
302
303 typedef struct drm_mga_clear {
304 unsigned int flags;
305 unsigned int clear_color;
306 unsigned int clear_depth;
307 unsigned int color_mask;
308 unsigned int depth_mask;
309 } drm_mga_clear_t;
310
311 typedef struct drm_mga_vertex {
312 int idx; /* buffer to queue */
313 int used; /* bytes in use */
314 int discard; /* client finished with buffer? */
315 } drm_mga_vertex_t;
316
317 typedef struct drm_mga_indices {
318 int idx; /* buffer to queue */
319 unsigned int start;
320 unsigned int end;
321 int discard; /* client finished with buffer? */
322 } drm_mga_indices_t;
323
324 typedef struct drm_mga_iload {
325 int idx;
326 unsigned int dstorg;
327 unsigned int length;
328 } drm_mga_iload_t;
329
330 typedef struct _drm_mga_blit {
331 unsigned int planemask;
332 unsigned int srcorg;
333 unsigned int dstorg;
334 int src_pitch, dst_pitch;
335 int delta_sx, delta_sy;
336 int delta_dx, delta_dy;
337 int height, ydir; /* flip image vertically */
338 int source_pitch, dest_pitch;
339 } drm_mga_blit_t;
340
341 /* 3.1: An ioctl to get parameters that aren't available to the 3d
342 * client any other way.
343 */
344 #define MGA_PARAM_IRQ_NR 1
345
346 typedef struct drm_mga_getparam {
347 int param;
348 void *value;
349 } drm_mga_getparam_t;
350
351 #endif
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