The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/r128_drm.h

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    1 /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
    2  * Created: Wed Apr  5 19:24:19 2000 by kevin@precisioninsight.com */
    3 /*-
    4  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
    5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
    6  * All rights reserved.
    7  *
    8  * Permission is hereby granted, free of charge, to any person obtaining a
    9  * copy of this software and associated documentation files (the "Software"),
   10  * to deal in the Software without restriction, including without limitation
   11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   12  * and/or sell copies of the Software, and to permit persons to whom the
   13  * Software is furnished to do so, subject to the following conditions:
   14  *
   15  * The above copyright notice and this permission notice (including the next
   16  * paragraph) shall be included in all copies or substantial portions of the
   17  * Software.
   18  *
   19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
   22  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
   23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
   24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
   25  * DEALINGS IN THE SOFTWARE.
   26  *
   27  * Authors:
   28  *    Gareth Hughes <gareth@valinux.com>
   29  *    Kevin E. Martin <martin@valinux.com>
   30  *
   31  * $FreeBSD$
   32  */
   33 
   34 #ifndef __R128_DRM_H__
   35 #define __R128_DRM_H__
   36 
   37 /* WARNING: If you change any of these defines, make sure to change the
   38  * defines in the X server file (r128_sarea.h)
   39  */
   40 #ifndef __R128_SAREA_DEFINES__
   41 #define __R128_SAREA_DEFINES__
   42 
   43 /* What needs to be changed for the current vertex buffer?
   44  */
   45 #define R128_UPLOAD_CONTEXT             0x001
   46 #define R128_UPLOAD_SETUP               0x002
   47 #define R128_UPLOAD_TEX0                0x004
   48 #define R128_UPLOAD_TEX1                0x008
   49 #define R128_UPLOAD_TEX0IMAGES          0x010
   50 #define R128_UPLOAD_TEX1IMAGES          0x020
   51 #define R128_UPLOAD_CORE                0x040
   52 #define R128_UPLOAD_MASKS               0x080
   53 #define R128_UPLOAD_WINDOW              0x100
   54 #define R128_UPLOAD_CLIPRECTS           0x200   /* handled client-side */
   55 #define R128_REQUIRE_QUIESCENCE         0x400
   56 #define R128_UPLOAD_ALL                 0x7ff
   57 
   58 #define R128_FRONT                      0x1
   59 #define R128_BACK                       0x2
   60 #define R128_DEPTH                      0x4
   61 
   62 /* Primitive types
   63  */
   64 #define R128_POINTS                     0x1
   65 #define R128_LINES                      0x2
   66 #define R128_LINE_STRIP                 0x3
   67 #define R128_TRIANGLES                  0x4
   68 #define R128_TRIANGLE_FAN               0x5
   69 #define R128_TRIANGLE_STRIP             0x6
   70 
   71 /* Vertex/indirect buffer size
   72  */
   73 #define R128_BUFFER_SIZE                16384
   74 
   75 /* Byte offsets for indirect buffer data
   76  */
   77 #define R128_INDEX_PRIM_OFFSET          20
   78 #define R128_HOSTDATA_BLIT_OFFSET       32
   79 
   80 /* Keep these small for testing.
   81  */
   82 #define R128_NR_SAREA_CLIPRECTS         12
   83 
   84 /* There are 2 heaps (local/AGP).  Each region within a heap is a
   85  *  minimum of 64k, and there are at most 64 of them per heap.
   86  */
   87 #define R128_LOCAL_TEX_HEAP             0
   88 #define R128_AGP_TEX_HEAP               1
   89 #define R128_NR_TEX_HEAPS               2
   90 #define R128_NR_TEX_REGIONS             64
   91 #define R128_LOG_TEX_GRANULARITY        16
   92 
   93 #define R128_NR_CONTEXT_REGS            12
   94 
   95 #define R128_MAX_TEXTURE_LEVELS         11
   96 #define R128_MAX_TEXTURE_UNITS          2
   97 
   98 #endif /* __R128_SAREA_DEFINES__ */
   99 
  100 typedef struct {
  101         /* Context state - can be written in one large chunk */
  102         unsigned int dst_pitch_offset_c;
  103         unsigned int dp_gui_master_cntl_c;
  104         unsigned int sc_top_left_c;
  105         unsigned int sc_bottom_right_c;
  106         unsigned int z_offset_c;
  107         unsigned int z_pitch_c;
  108         unsigned int z_sten_cntl_c;
  109         unsigned int tex_cntl_c;
  110         unsigned int misc_3d_state_cntl_reg;
  111         unsigned int texture_clr_cmp_clr_c;
  112         unsigned int texture_clr_cmp_msk_c;
  113         unsigned int fog_color_c;
  114 
  115         /* Texture state */
  116         unsigned int tex_size_pitch_c;
  117         unsigned int constant_color_c;
  118 
  119         /* Setup state */
  120         unsigned int pm4_vc_fpu_setup;
  121         unsigned int setup_cntl;
  122 
  123         /* Mask state */
  124         unsigned int dp_write_mask;
  125         unsigned int sten_ref_mask_c;
  126         unsigned int plane_3d_mask_c;
  127 
  128         /* Window state */
  129         unsigned int window_xy_offset;
  130 
  131         /* Core state */
  132         unsigned int scale_3d_cntl;
  133 } drm_r128_context_regs_t;
  134 
  135 /* Setup registers for each texture unit
  136  */
  137 typedef struct {
  138         unsigned int tex_cntl;
  139         unsigned int tex_combine_cntl;
  140         unsigned int tex_size_pitch;
  141         unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
  142         unsigned int tex_border_color;
  143 } drm_r128_texture_regs_t;
  144 
  145 
  146 typedef struct drm_r128_sarea {
  147         /* The channel for communication of state information to the kernel
  148          * on firing a vertex buffer.
  149          */
  150         drm_r128_context_regs_t context_state;
  151         drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
  152         unsigned int dirty;
  153         unsigned int vertsize;
  154         unsigned int vc_format;
  155 
  156         /* The current cliprects, or a subset thereof.
  157          */
  158         drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
  159         unsigned int nbox;
  160 
  161         /* Counters for client-side throttling of rendering clients.
  162          */
  163         unsigned int last_frame;
  164         unsigned int last_dispatch;
  165 
  166         drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
  167         unsigned int tex_age[R128_NR_TEX_HEAPS];
  168         int ctx_owner;
  169         int pfAllowPageFlip;        /* number of 3d windows (0,1,2 or more) */
  170         int pfCurrentPage;          /* which buffer is being displayed? */
  171 } drm_r128_sarea_t;
  172 
  173 
  174 /* WARNING: If you change any of these defines, make sure to change the
  175  * defines in the Xserver file (xf86drmR128.h)
  176  */
  177 
  178 /* Rage 128 specific ioctls
  179  * The device specific ioctl range is 0x40 to 0x79.
  180  */
  181 #define DRM_R128_INIT       0x00
  182 #define DRM_R128_CCE_START  0x01
  183 #define DRM_R128_CCE_STOP   0x02
  184 #define DRM_R128_CCE_RESET  0x03
  185 #define DRM_R128_CCE_IDLE   0x04
  186 /* 0x05 not used */
  187 #define DRM_R128_RESET      0x06
  188 #define DRM_R128_SWAP       0x07
  189 #define DRM_R128_CLEAR      0x08
  190 #define DRM_R128_VERTEX     0x09
  191 #define DRM_R128_INDICES    0x0a
  192 #define DRM_R128_BLIT       0x0b
  193 #define DRM_R128_DEPTH      0x0c
  194 #define DRM_R128_STIPPLE    0x0d
  195 /* 0x0e not used */
  196 #define DRM_R128_INDIRECT   0x0f
  197 #define DRM_R128_FULLSCREEN 0x10
  198 #define DRM_R128_CLEAR2     0x11
  199 #define DRM_R128_GETPARAM   0x12
  200 #define DRM_R128_FLIP       0x13
  201 
  202 #define DRM_IOCTL_R128_INIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
  203 #define DRM_IOCTL_R128_CCE_START  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_START)
  204 #define DRM_IOCTL_R128_CCE_STOP   DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
  205 #define DRM_IOCTL_R128_CCE_RESET  DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
  206 #define DRM_IOCTL_R128_CCE_IDLE   DRM_IO(  DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
  207 /* 0x05 not used */
  208 #define DRM_IOCTL_R128_RESET      DRM_IO(  DRM_COMMAND_BASE + DRM_R128_RESET)
  209 #define DRM_IOCTL_R128_SWAP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_SWAP)
  210 #define DRM_IOCTL_R128_CLEAR      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
  211 #define DRM_IOCTL_R128_VERTEX     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
  212 #define DRM_IOCTL_R128_INDICES    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
  213 #define DRM_IOCTL_R128_BLIT       DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
  214 #define DRM_IOCTL_R128_DEPTH      DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
  215 #define DRM_IOCTL_R128_STIPPLE    DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
  216 /* 0x0e not used */
  217 #define DRM_IOCTL_R128_INDIRECT   DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
  218 #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
  219 #define DRM_IOCTL_R128_CLEAR2     DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
  220 #define DRM_IOCTL_R128_GETPARAM   DRM_IOW( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
  221 #define DRM_IOCTL_R128_FLIP       DRM_IO(  DRM_COMMAND_BASE + DRM_R128_FLIP)
  222 
  223 typedef struct drm_r128_init {
  224         enum {
  225                 R128_INIT_CCE    = 0x01,
  226                 R128_CLEANUP_CCE = 0x02
  227         } func;
  228 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  229         int sarea_priv_offset;
  230 #else
  231         unsigned long sarea_priv_offset;
  232 #endif
  233         int is_pci;
  234         int cce_mode;
  235         int cce_secure;
  236         int ring_size;
  237         int usec_timeout;
  238 
  239         unsigned int fb_bpp;
  240         unsigned int front_offset, front_pitch;
  241         unsigned int back_offset, back_pitch;
  242         unsigned int depth_bpp;
  243         unsigned int depth_offset, depth_pitch;
  244         unsigned int span_offset;
  245 
  246 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  247         unsigned int fb_offset;
  248         unsigned int mmio_offset;
  249         unsigned int ring_offset;
  250         unsigned int ring_rptr_offset;
  251         unsigned int buffers_offset;
  252         unsigned int agp_textures_offset;
  253 #else
  254         unsigned long fb_offset;
  255         unsigned long mmio_offset;
  256         unsigned long ring_offset;
  257         unsigned long ring_rptr_offset;
  258         unsigned long buffers_offset;
  259         unsigned long agp_textures_offset;
  260 #endif
  261 } drm_r128_init_t;
  262 
  263 typedef struct drm_r128_cce_stop {
  264         int flush;
  265         int idle;
  266 } drm_r128_cce_stop_t;
  267 
  268 typedef struct drm_r128_clear {
  269         unsigned int flags;
  270 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
  271         int x, y, w, h;
  272 #endif
  273         unsigned int clear_color;
  274         unsigned int clear_depth;
  275 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
  276         unsigned int color_mask;
  277         unsigned int depth_mask;
  278 #endif
  279 } drm_r128_clear_t;
  280 
  281 typedef struct drm_r128_vertex {
  282         int prim;
  283         int idx;                        /* Index of vertex buffer */
  284         int count;                      /* Number of vertices in buffer */
  285         int discard;                    /* Client finished with buffer? */
  286 } drm_r128_vertex_t;
  287 
  288 typedef struct drm_r128_indices {
  289         int prim;
  290         int idx;
  291         int start;
  292         int end;
  293         int discard;                    /* Client finished with buffer? */
  294 } drm_r128_indices_t;
  295 
  296 typedef struct drm_r128_blit {
  297         int idx;
  298         int pitch;
  299         int offset;
  300         int format;
  301         unsigned short x, y;
  302         unsigned short width, height;
  303 } drm_r128_blit_t;
  304 
  305 typedef struct drm_r128_depth {
  306         enum {
  307                 R128_WRITE_SPAN         = 0x01,
  308                 R128_WRITE_PIXELS       = 0x02,
  309                 R128_READ_SPAN          = 0x03,
  310                 R128_READ_PIXELS        = 0x04
  311         } func;
  312         int n;
  313         int *x;
  314         int *y;
  315         unsigned int *buffer;
  316         unsigned char *mask;
  317 } drm_r128_depth_t;
  318 
  319 typedef struct drm_r128_stipple {
  320         unsigned int *mask;
  321 } drm_r128_stipple_t;
  322 
  323 typedef struct drm_r128_indirect {
  324         int idx;
  325         int start;
  326         int end;
  327         int discard;
  328 } drm_r128_indirect_t;
  329 
  330 typedef struct drm_r128_fullscreen {
  331         enum {
  332                 R128_INIT_FULLSCREEN    = 0x01,
  333                 R128_CLEANUP_FULLSCREEN = 0x02
  334         } func;
  335 } drm_r128_fullscreen_t;
  336 
  337 /* 2.3: An ioctl to get parameters that aren't available to the 3d
  338  * client any other way.  
  339  */
  340 #define R128_PARAM_IRQ_NR            1
  341 
  342 typedef struct drm_r128_getparam {
  343         int param;
  344         void *value;
  345 } drm_r128_getparam_t;
  346 
  347 #endif

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