Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm/radeon.h
Version:
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1 /* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*- 2 * Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com */ 3 /*- 4 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 5 * All Rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the next 15 * paragraph) shall be included in all copies or substantial portions of the 16 * Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 24 * OTHER DEALINGS IN THE SOFTWARE. 25 * 26 * Authors: 27 * Gareth Hughes <gareth@valinux.com> 28 * Keith Whitwell <keith@tungstengraphics.com> 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef __RADEON_H__ 34 #define __RADEON_H__ 35 36 /* This remains constant for all DRM template files. 37 */ 38 #define DRM(x) radeon_##x 39 40 /* General customization: 41 */ 42 #define __HAVE_AGP 1 43 #define __MUST_HAVE_AGP 0 44 #define __HAVE_MTRR 1 45 #define __HAVE_CTX_BITMAP 1 46 #define __HAVE_SG 1 47 #define __HAVE_PCI_DMA 1 48 49 #define DRIVER_AUTHOR "Gareth Hughes, Keith Whitwell, others." 50 51 #define DRIVER_NAME "radeon" 52 #define DRIVER_DESC "ATI Radeon" 53 #define DRIVER_DATE "20020828" 54 55 #define DRIVER_MAJOR 1 56 #define DRIVER_MINOR 11 57 #define DRIVER_PATCHLEVEL 0 58 59 /* Interface history: 60 * 61 * 1.1 - ?? 62 * 1.2 - Add vertex2 ioctl (keith) 63 * - Add stencil capability to clear ioctl (gareth, keith) 64 * - Increase MAX_TEXTURE_LEVELS (brian) 65 * 1.3 - Add cmdbuf ioctl (keith) 66 * - Add support for new radeon packets (keith) 67 * - Add getparam ioctl (keith) 68 * - Add flip-buffers ioctl, deprecate fullscreen foo (keith). 69 * 1.4 - Add scratch registers to get_param ioctl. 70 * 1.5 - Add r200 packets to cmdbuf ioctl 71 * - Add r200 function to init ioctl 72 * - Add 'scalar2' instruction to cmdbuf 73 * 1.6 - Add static GART memory manager 74 * Add irq handler (won't be turned on unless X server knows to) 75 * Add irq ioctls and irq_active getparam. 76 * Add wait command for cmdbuf ioctl 77 * Add GART offset query for getparam 78 * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5] 79 * and R200_PP_CUBIC_OFFSET_F1_[0..5]. 80 * Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and 81 * R200_EMIT_PP_CUBIC_OFFSETS_[0..5]. (brian) 82 * 1.8 - Remove need to call cleanup ioctls on last client exit (keith) 83 * Add 'GET' queries for starting additional clients on different VT's. 84 * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl. 85 * Add texture rectangle support for r100. 86 * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which 87 * clients use to tell the DRM where they think the framebuffer is 88 * located in the card's address space 89 * 1.11 Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color 90 * and GL_EXT_blend_[func|equation]_separate on r200 91 */ 92 #define DRIVER_IOCTLS \ 93 [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \ 94 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)] = { radeon_cp_init, 1, 1 }, \ 95 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)] = { radeon_cp_start, 1, 1 }, \ 96 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)] = { radeon_cp_stop, 1, 1 }, \ 97 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)] = { radeon_cp_reset, 1, 1 }, \ 98 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)] = { radeon_cp_idle, 1, 0 }, \ 99 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESUME)] = { radeon_cp_resume, 1, 0 }, \ 100 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)] = { radeon_engine_reset, 1, 0 }, \ 101 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen, 1, 0 }, \ 102 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)] = { radeon_cp_swap, 1, 0 }, \ 103 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)] = { radeon_cp_clear, 1, 0 }, \ 104 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)] = { radeon_cp_vertex, 1, 0 }, \ 105 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)] = { radeon_cp_indices, 1, 0 }, \ 106 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)] = { radeon_cp_texture, 1, 0 }, \ 107 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)] = { radeon_cp_stipple, 1, 0 }, \ 108 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)] = { radeon_cp_indirect, 1, 1 }, \ 109 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)] = { radeon_cp_vertex2, 1, 0 }, \ 110 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)] = { radeon_cp_cmdbuf, 1, 0 }, \ 111 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)] = { radeon_cp_getparam, 1, 0 }, \ 112 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)] = { radeon_cp_flip, 1, 0 }, \ 113 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)] = { radeon_mem_alloc, 1, 0 }, \ 114 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)] = { radeon_mem_free, 1, 0 }, \ 115 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)] = { radeon_mem_init_heap, 1, 1 }, \ 116 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)] = { radeon_irq_emit, 1, 0 }, \ 117 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)] = { radeon_irq_wait, 1, 0 }, \ 118 [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SETPARAM)] = { radeon_cp_setparam, 1, 0 }, \ 119 120 #define DRIVER_FILE_FIELDS \ 121 int64_t radeon_fb_delta; \ 122 123 #define DRIVER_OPEN_HELPER( filp_priv, dev ) \ 124 do { \ 125 drm_radeon_private_t *dev_priv = dev->dev_private; \ 126 if ( dev_priv ) \ 127 filp_priv->radeon_fb_delta = dev_priv->fb_location; \ 128 else \ 129 filp_priv->radeon_fb_delta = 0; \ 130 } while( 0 ) 131 132 /* When a client dies: 133 * - Check for and clean up flipped page state 134 * - Free any alloced GART memory. 135 * 136 * DRM infrastructure takes care of reclaiming dma buffers. 137 */ 138 #define DRIVER_PRERELEASE() \ 139 do { \ 140 if ( dev->dev_private ) { \ 141 drm_radeon_private_t *dev_priv = dev->dev_private; \ 142 if ( dev_priv->page_flipping ) { \ 143 radeon_do_cleanup_pageflip( dev ); \ 144 } \ 145 radeon_mem_release( filp, dev_priv->gart_heap ); \ 146 radeon_mem_release( filp, dev_priv->fb_heap ); \ 147 } \ 148 } while (0) 149 150 /* When the last client dies, shut down the CP and free dev->dev_priv. 151 */ 152 /* #define __HAVE_RELEASE 1 */ 153 #define DRIVER_PRETAKEDOWN( dev ) \ 154 do { \ 155 radeon_do_release( dev ); \ 156 } while (0) 157 158 159 160 /* DMA customization: 161 */ 162 #define __HAVE_DMA 1 163 #define __HAVE_IRQ 1 164 #define __HAVE_VBL_IRQ 1 165 #define __HAVE_SHARED_IRQ 1 166 167 168 /* Buffer customization: 169 */ 170 #define DRIVER_BUF_PRIV_T drm_radeon_buf_priv_t 171 172 #define DRIVER_AGP_BUFFERS_MAP( dev ) \ 173 ((drm_radeon_private_t *)((dev)->dev_private))->buffers 174 175 #endif
Cache object: 261df85608a7e81f4a453253dc6f3141
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