FreeBSD/Linux Kernel Cross Reference
sys/dev/drm2/drm.h
1 /**
2 * \file drm.h
3 * Header for the Direct Rendering Manager
4 *
5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
6 *
7 * \par Acknowledgments:
8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
9 */
10
11 /*-
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
15 *
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
22 *
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
25 * Software.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
34 */
35
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
38
39 #ifndef _DRM_H_
40 #define _DRM_H_
41
42 #if defined(__linux__)
43
44 #include <linux/types.h>
45 #include <asm/ioctl.h>
46 typedef unsigned int drm_handle_t;
47
48 #else /* One of the BSDs */
49
50 #include <sys/ioccom.h>
51 #include <sys/types.h>
52 typedef int8_t __s8;
53 typedef uint8_t __u8;
54 typedef int16_t __s16;
55 typedef uint16_t __u16;
56 typedef int32_t __s32;
57 typedef uint32_t __u32;
58 typedef int64_t __s64;
59 typedef uint64_t __u64;
60 typedef unsigned long drm_handle_t;
61
62 #include <dev/drm2/drm_os_freebsd.h>
63 #endif
64
65 #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
66 #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
67 #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
68 #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
69
70 #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
71 #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
72 #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
73 #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
74 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
75
76 typedef unsigned int drm_context_t;
77 typedef unsigned int drm_drawable_t;
78 typedef unsigned int drm_magic_t;
79
80 /**
81 * Cliprect.
82 *
83 * \warning: If you change this structure, make sure you change
84 * XF86DRIClipRectRec in the server as well
85 *
86 * \note KW: Actually it's illegal to change either for
87 * backwards-compatibility reasons.
88 */
89 struct drm_clip_rect {
90 unsigned short x1;
91 unsigned short y1;
92 unsigned short x2;
93 unsigned short y2;
94 };
95
96 /**
97 * Drawable information.
98 */
99 struct drm_drawable_info {
100 unsigned int num_rects;
101 struct drm_clip_rect *rects;
102 };
103
104 /**
105 * Texture region,
106 */
107 struct drm_tex_region {
108 unsigned char next;
109 unsigned char prev;
110 unsigned char in_use;
111 unsigned char padding;
112 unsigned int age;
113 };
114
115 /**
116 * Hardware lock.
117 *
118 * The lock structure is a simple cache-line aligned integer. To avoid
119 * processor bus contention on a multiprocessor system, there should not be any
120 * other data stored in the same cache line.
121 */
122 struct drm_hw_lock {
123 __volatile__ unsigned int lock; /**< lock variable */
124 char padding[60]; /**< Pad to cache line */
125 };
126
127 /**
128 * DRM_IOCTL_VERSION ioctl argument type.
129 *
130 * \sa drmGetVersion().
131 */
132 struct drm_version {
133 int version_major; /**< Major version */
134 int version_minor; /**< Minor version */
135 int version_patchlevel; /**< Patch level */
136 size_t name_len; /**< Length of name buffer */
137 char __user *name; /**< Name of driver */
138 size_t date_len; /**< Length of date buffer */
139 char __user *date; /**< User-space buffer to hold date */
140 size_t desc_len; /**< Length of desc buffer */
141 char __user *desc; /**< User-space buffer to hold desc */
142 };
143
144 /**
145 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
146 *
147 * \sa drmGetBusid() and drmSetBusId().
148 */
149 struct drm_unique {
150 size_t unique_len; /**< Length of unique */
151 char __user *unique; /**< Unique name for driver instantiation */
152 };
153
154 struct drm_list {
155 int count; /**< Length of user-space structures */
156 struct drm_version __user *version;
157 };
158
159 struct drm_block {
160 int unused;
161 };
162
163 /**
164 * DRM_IOCTL_CONTROL ioctl argument type.
165 *
166 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
167 */
168 struct drm_control {
169 enum {
170 DRM_ADD_COMMAND,
171 DRM_RM_COMMAND,
172 DRM_INST_HANDLER,
173 DRM_UNINST_HANDLER
174 } func;
175 int irq;
176 };
177
178 /**
179 * Type of memory to map.
180 */
181 enum drm_map_type {
182 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
183 _DRM_REGISTERS = 1, /**< no caching, no core dump */
184 _DRM_SHM = 2, /**< shared, cached */
185 _DRM_AGP = 3, /**< AGP/GART */
186 _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
187 _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
188 _DRM_GEM = 6, /**< GEM object */
189 };
190
191 /**
192 * Memory mapping flags.
193 */
194 enum drm_map_flags {
195 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
196 _DRM_READ_ONLY = 0x02,
197 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
198 _DRM_KERNEL = 0x08, /**< kernel requires access */
199 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
200 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
201 _DRM_REMOVABLE = 0x40, /**< Removable mapping */
202 _DRM_DRIVER = 0x80 /**< Managed by driver */
203 };
204
205 struct drm_ctx_priv_map {
206 unsigned int ctx_id; /**< Context requesting private mapping */
207 void *handle; /**< Handle of map */
208 };
209
210 /**
211 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
212 * argument type.
213 *
214 * \sa drmAddMap().
215 */
216 struct drm_map {
217 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
218 unsigned long size; /**< Requested physical size (bytes) */
219 enum drm_map_type type; /**< Type of memory to map */
220 enum drm_map_flags flags; /**< Flags */
221 void *handle; /**< User-space: "Handle" to pass to mmap() */
222 /**< Kernel-space: kernel-virtual address */
223 int mtrr; /**< MTRR slot used */
224 /* Private data */
225 };
226
227 /**
228 * DRM_IOCTL_GET_CLIENT ioctl argument type.
229 */
230 struct drm_client {
231 int idx; /**< Which client desired? */
232 int auth; /**< Is client authenticated? */
233 unsigned long pid; /**< Process ID */
234 unsigned long uid; /**< User ID */
235 unsigned long magic; /**< Magic */
236 unsigned long iocs; /**< Ioctl count */
237 };
238
239 enum drm_stat_type {
240 _DRM_STAT_LOCK,
241 _DRM_STAT_OPENS,
242 _DRM_STAT_CLOSES,
243 _DRM_STAT_IOCTLS,
244 _DRM_STAT_LOCKS,
245 _DRM_STAT_UNLOCKS,
246 _DRM_STAT_VALUE, /**< Generic value */
247 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
248 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
249
250 _DRM_STAT_IRQ, /**< IRQ */
251 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
252 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
253 _DRM_STAT_DMA, /**< DMA */
254 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
255 _DRM_STAT_MISSED /**< Missed DMA opportunity */
256 /* Add to the *END* of the list */
257 };
258
259 /**
260 * DRM_IOCTL_GET_STATS ioctl argument type.
261 */
262 struct drm_stats {
263 unsigned long count;
264 struct {
265 unsigned long value;
266 enum drm_stat_type type;
267 } data[15];
268 };
269
270 /**
271 * Hardware locking flags.
272 */
273 enum drm_lock_flags {
274 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
275 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
276 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
277 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
278 /* These *HALT* flags aren't supported yet
279 -- they will be used to support the
280 full-screen DGA-like mode. */
281 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
282 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
283 };
284
285 /**
286 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
287 *
288 * \sa drmGetLock() and drmUnlock().
289 */
290 struct drm_lock {
291 int context;
292 enum drm_lock_flags flags;
293 };
294
295 /**
296 * DMA flags
297 *
298 * \warning
299 * These values \e must match xf86drm.h.
300 *
301 * \sa drm_dma.
302 */
303 enum drm_dma_flags {
304 /* Flags for DMA buffer dispatch */
305 _DRM_DMA_BLOCK = 0x01, /**<
306 * Block until buffer dispatched.
307 *
308 * \note The buffer may not yet have
309 * been processed by the hardware --
310 * getting a hardware lock with the
311 * hardware quiescent will ensure
312 * that the buffer has been
313 * processed.
314 */
315 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
316 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
317
318 /* Flags for DMA buffer request */
319 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
320 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
321 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
322 };
323
324 /**
325 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
326 *
327 * \sa drmAddBufs().
328 */
329 struct drm_buf_desc {
330 int count; /**< Number of buffers of this size */
331 int size; /**< Size in bytes */
332 int low_mark; /**< Low water mark */
333 int high_mark; /**< High water mark */
334 enum {
335 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
336 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
337 _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
338 _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
339 _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
340 } flags;
341 unsigned long agp_start; /**<
342 * Start address of where the AGP buffers are
343 * in the AGP aperture
344 */
345 };
346
347 /**
348 * DRM_IOCTL_INFO_BUFS ioctl argument type.
349 */
350 struct drm_buf_info {
351 int count; /**< Entries in list */
352 struct drm_buf_desc __user *list;
353 };
354
355 /**
356 * DRM_IOCTL_FREE_BUFS ioctl argument type.
357 */
358 struct drm_buf_free {
359 int count;
360 int __user *list;
361 };
362
363 /**
364 * Buffer information
365 *
366 * \sa drm_buf_map.
367 */
368 struct drm_buf_pub {
369 int idx; /**< Index into the master buffer list */
370 int total; /**< Buffer size */
371 int used; /**< Amount of buffer in use (for DMA) */
372 void __user *address; /**< Address of buffer */
373 };
374
375 /**
376 * DRM_IOCTL_MAP_BUFS ioctl argument type.
377 */
378 struct drm_buf_map {
379 int count; /**< Length of the buffer list */
380 void __user *virtual; /**< Mmap'd area in user-virtual */
381 struct drm_buf_pub __user *list; /**< Buffer information */
382 };
383
384 /**
385 * DRM_IOCTL_DMA ioctl argument type.
386 *
387 * Indices here refer to the offset into the buffer list in drm_buf_get.
388 *
389 * \sa drmDMA().
390 */
391 struct drm_dma {
392 int context; /**< Context handle */
393 int send_count; /**< Number of buffers to send */
394 int __user *send_indices; /**< List of handles to buffers */
395 int __user *send_sizes; /**< Lengths of data to send */
396 enum drm_dma_flags flags; /**< Flags */
397 int request_count; /**< Number of buffers requested */
398 int request_size; /**< Desired size for buffers */
399 int __user *request_indices; /**< Buffer information */
400 int __user *request_sizes;
401 int granted_count; /**< Number of buffers granted */
402 };
403
404 enum drm_ctx_flags {
405 _DRM_CONTEXT_PRESERVED = 0x01,
406 _DRM_CONTEXT_2DONLY = 0x02
407 };
408
409 /**
410 * DRM_IOCTL_ADD_CTX ioctl argument type.
411 *
412 * \sa drmCreateContext() and drmDestroyContext().
413 */
414 struct drm_ctx {
415 drm_context_t handle;
416 enum drm_ctx_flags flags;
417 };
418
419 /**
420 * DRM_IOCTL_RES_CTX ioctl argument type.
421 */
422 struct drm_ctx_res {
423 int count;
424 struct drm_ctx __user *contexts;
425 };
426
427 /**
428 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
429 */
430 struct drm_draw {
431 drm_drawable_t handle;
432 };
433
434 /**
435 * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
436 */
437 typedef enum {
438 DRM_DRAWABLE_CLIPRECTS,
439 } drm_drawable_info_type_t;
440
441 struct drm_update_draw {
442 drm_drawable_t handle;
443 unsigned int type;
444 unsigned int num;
445 unsigned long long data;
446 };
447
448 /**
449 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
450 */
451 struct drm_auth {
452 drm_magic_t magic;
453 };
454
455 /**
456 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
457 *
458 * \sa drmGetInterruptFromBusID().
459 */
460 struct drm_irq_busid {
461 int irq; /**< IRQ number */
462 int busnum; /**< bus number */
463 int devnum; /**< device number */
464 int funcnum; /**< function number */
465 };
466
467 enum drm_vblank_seq_type {
468 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
469 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
470 /* bits 1-6 are reserved for high crtcs */
471 _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
472 _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
473 _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
474 _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
475 _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
476 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
477 };
478 #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
479
480 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
481 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
482 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
483
484 struct drm_wait_vblank_request {
485 enum drm_vblank_seq_type type;
486 unsigned int sequence;
487 unsigned long signal;
488 };
489
490 struct drm_wait_vblank_reply {
491 enum drm_vblank_seq_type type;
492 unsigned int sequence;
493 long tval_sec;
494 long tval_usec;
495 };
496
497 /**
498 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
499 *
500 * \sa drmWaitVBlank().
501 */
502 union drm_wait_vblank {
503 struct drm_wait_vblank_request request;
504 struct drm_wait_vblank_reply reply;
505 };
506
507 #define _DRM_PRE_MODESET 1
508 #define _DRM_POST_MODESET 2
509
510 /**
511 * DRM_IOCTL_MODESET_CTL ioctl argument type
512 *
513 * \sa drmModesetCtl().
514 */
515 struct drm_modeset_ctl {
516 __u32 crtc;
517 __u32 cmd;
518 };
519
520 /**
521 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
522 *
523 * \sa drmAgpEnable().
524 */
525 struct drm_agp_mode {
526 unsigned long mode; /**< AGP mode */
527 };
528
529 /**
530 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
531 *
532 * \sa drmAgpAlloc() and drmAgpFree().
533 */
534 struct drm_agp_buffer {
535 unsigned long size; /**< In bytes -- will round to page boundary */
536 unsigned long handle; /**< Used for binding / unbinding */
537 unsigned long type; /**< Type of memory to allocate */
538 unsigned long physical; /**< Physical used by i810 */
539 };
540
541 /**
542 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
543 *
544 * \sa drmAgpBind() and drmAgpUnbind().
545 */
546 struct drm_agp_binding {
547 unsigned long handle; /**< From drm_agp_buffer */
548 unsigned long offset; /**< In bytes -- will round to page boundary */
549 };
550
551 /**
552 * DRM_IOCTL_AGP_INFO ioctl argument type.
553 *
554 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
555 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
556 * drmAgpVendorId() and drmAgpDeviceId().
557 */
558 struct drm_agp_info {
559 int agp_version_major;
560 int agp_version_minor;
561 unsigned long mode;
562 unsigned long aperture_base; /* physical address */
563 unsigned long aperture_size; /* bytes */
564 unsigned long memory_allowed; /* bytes */
565 unsigned long memory_used;
566
567 /* PCI information */
568 unsigned short id_vendor;
569 unsigned short id_device;
570 };
571
572 /**
573 * DRM_IOCTL_SG_ALLOC ioctl argument type.
574 */
575 struct drm_scatter_gather {
576 unsigned long size; /**< In bytes -- will round to page boundary */
577 unsigned long handle; /**< Used for mapping / unmapping */
578 };
579
580 /**
581 * DRM_IOCTL_SET_VERSION ioctl argument type.
582 */
583 struct drm_set_version {
584 int drm_di_major;
585 int drm_di_minor;
586 int drm_dd_major;
587 int drm_dd_minor;
588 };
589
590 /** DRM_IOCTL_GEM_CLOSE ioctl argument type */
591 struct drm_gem_close {
592 /** Handle of the object to be closed. */
593 __u32 handle;
594 __u32 pad;
595 };
596
597 /** DRM_IOCTL_GEM_FLINK ioctl argument type */
598 struct drm_gem_flink {
599 /** Handle for the object being named */
600 __u32 handle;
601
602 /** Returned global name */
603 __u32 name;
604 };
605
606 /** DRM_IOCTL_GEM_OPEN ioctl argument type */
607 struct drm_gem_open {
608 /** Name of object being opened */
609 __u32 name;
610
611 /** Returned handle for the object */
612 __u32 handle;
613
614 /** Returned size of the object */
615 __u64 size;
616 };
617
618 /** DRM_IOCTL_GET_CAP ioctl argument type */
619 struct drm_get_cap {
620 __u64 capability;
621 __u64 value;
622 };
623
624 #define DRM_CLOEXEC O_CLOEXEC
625 struct drm_prime_handle {
626 __u32 handle;
627
628 /** Flags.. only applicable for handle->fd */
629 __u32 flags;
630
631 /** Returned dmabuf file descriptor */
632 __s32 fd;
633 };
634
635 #include <dev/drm2/drm_mode.h>
636
637 #define DRM_IOCTL_BASE 'd'
638 #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
639 #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
640 #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
641 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
642
643 #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
644 #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
645 #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
646 #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
647 #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
648 #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
649 #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
650 #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
651 #define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
652 #define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
653 #define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
654 #define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
655 #define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
656
657 #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
658 #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
659 #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
660 #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
661 #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
662 #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
663 #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
664 #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
665 #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
666 #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
667 #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
668
669 #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
670
671 #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
672 #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
673
674 #define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
675 #define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
676
677 #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
678 #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
679 #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
680 #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
681 #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
682 #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
683 #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
684 #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
685 #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
686 #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
687 #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
688 #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
689 #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
690
691 #define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
692 #define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
693
694 #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
695 #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
696 #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
697 #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
698 #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
699 #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
700 #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
701 #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
702
703 #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
704 #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
705
706 #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
707
708 #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
709
710 #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
711 #define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
712 #define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
713 #define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
714 #define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
715 #define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
716 #define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
717 #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
718 #define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd)
719 #define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd)
720
721 #define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
722 #define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
723 #define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
724 #define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
725 #define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
726 #define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
727 #define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
728 #define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
729
730 #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
731 #define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
732 #define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
733 #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
734 #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
735 #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
736 #define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
737 #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
738 #define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
739
740 /**
741 * Device specific ioctls should only be in their respective headers
742 * The device specific ioctl range is from 0x40 to 0x99.
743 * Generic IOCTLS restart at 0xA0.
744 *
745 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
746 * drmCommandReadWrite().
747 */
748 #define DRM_COMMAND_BASE 0x40
749 #define DRM_COMMAND_END 0xA0
750
751 /**
752 * Header for events written back to userspace on the drm fd. The
753 * type defines the type of event, the length specifies the total
754 * length of the event (including the header), and user_data is
755 * typically a 64 bit value passed with the ioctl that triggered the
756 * event. A read on the drm fd will always only return complete
757 * events, that is, if for example the read buffer is 100 bytes, and
758 * there are two 64 byte events pending, only one will be returned.
759 *
760 * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and
761 * up are chipset specific.
762 */
763 struct drm_event {
764 __u32 type;
765 __u32 length;
766 };
767
768 #define DRM_EVENT_VBLANK 0x01
769 #define DRM_EVENT_FLIP_COMPLETE 0x02
770
771 struct drm_event_vblank {
772 struct drm_event base;
773 __u64 user_data;
774 __u32 tv_sec;
775 __u32 tv_usec;
776 __u32 sequence;
777 __u32 reserved;
778 };
779
780 #define DRM_CAP_DUMB_BUFFER 0x1
781 #define DRM_CAP_VBLANK_HIGH_CRTC 0x2
782 #define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
783 #define DRM_CAP_DUMB_PREFER_SHADOW 0x4
784 #define DRM_CAP_PRIME 0x5
785 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
786
787 #define DRM_PRIME_CAP_IMPORT 0x1
788 #define DRM_PRIME_CAP_EXPORT 0x2
789
790 /* typedef area */
791 #ifndef __KERNEL__
792 typedef struct drm_clip_rect drm_clip_rect_t;
793 typedef struct drm_drawable_info drm_drawable_info_t;
794 typedef struct drm_tex_region drm_tex_region_t;
795 typedef struct drm_hw_lock drm_hw_lock_t;
796 typedef struct drm_version drm_version_t;
797 typedef struct drm_unique drm_unique_t;
798 typedef struct drm_list drm_list_t;
799 typedef struct drm_block drm_block_t;
800 typedef struct drm_control drm_control_t;
801 typedef enum drm_map_type drm_map_type_t;
802 typedef enum drm_map_flags drm_map_flags_t;
803 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
804 typedef struct drm_map drm_map_t;
805 typedef struct drm_client drm_client_t;
806 typedef enum drm_stat_type drm_stat_type_t;
807 typedef struct drm_stats drm_stats_t;
808 typedef enum drm_lock_flags drm_lock_flags_t;
809 typedef struct drm_lock drm_lock_t;
810 typedef enum drm_dma_flags drm_dma_flags_t;
811 typedef struct drm_buf_desc drm_buf_desc_t;
812 typedef struct drm_buf_info drm_buf_info_t;
813 typedef struct drm_buf_free drm_buf_free_t;
814 typedef struct drm_buf_pub drm_buf_pub_t;
815 typedef struct drm_buf_map drm_buf_map_t;
816 typedef struct drm_dma drm_dma_t;
817 typedef union drm_wait_vblank drm_wait_vblank_t;
818 typedef struct drm_agp_mode drm_agp_mode_t;
819 typedef enum drm_ctx_flags drm_ctx_flags_t;
820 typedef struct drm_ctx drm_ctx_t;
821 typedef struct drm_ctx_res drm_ctx_res_t;
822 typedef struct drm_draw drm_draw_t;
823 typedef struct drm_update_draw drm_update_draw_t;
824 typedef struct drm_auth drm_auth_t;
825 typedef struct drm_irq_busid drm_irq_busid_t;
826 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
827
828 typedef struct drm_agp_buffer drm_agp_buffer_t;
829 typedef struct drm_agp_binding drm_agp_binding_t;
830 typedef struct drm_agp_info drm_agp_info_t;
831 typedef struct drm_scatter_gather drm_scatter_gather_t;
832 typedef struct drm_set_version drm_set_version_t;
833 #endif
834
835 #endif
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