Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm2/drm_modes.c
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1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <dev/drm2/drmP.h> 37 #include <dev/drm2/drm_crtc.h> 38 39 /** 40 * drm_mode_debug_printmodeline - debug print a mode 41 * @dev: DRM device 42 * @mode: mode to print 43 * 44 * LOCKING: 45 * None. 46 * 47 * Describe @mode using DRM_DEBUG. 48 */ 49 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 50 { 51 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 52 "0x%x 0x%x\n", 53 mode->base.id, mode->name, mode->vrefresh, mode->clock, 54 mode->hdisplay, mode->hsync_start, 55 mode->hsync_end, mode->htotal, 56 mode->vdisplay, mode->vsync_start, 57 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 58 } 59 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 60 61 /** 62 * drm_cvt_mode -create a modeline based on CVT algorithm 63 * @dev: DRM device 64 * @hdisplay: hdisplay size 65 * @vdisplay: vdisplay size 66 * @vrefresh : vrefresh rate 67 * @reduced : Whether the GTF calculation is simplified 68 * @interlaced:Whether the interlace is supported 69 * 70 * LOCKING: 71 * none. 72 * 73 * return the modeline based on CVT algorithm 74 * 75 * This function is called to generate the modeline based on CVT algorithm 76 * according to the hdisplay, vdisplay, vrefresh. 77 * It is based from the VESA(TM) Coordinated Video Timing Generator by 78 * Graham Loveridge April 9, 2003 available at 79 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 80 * 81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 82 * What I have done is to translate it by using integer calculation. 83 */ 84 #define HV_FACTOR 1000 85 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 86 int vdisplay, int vrefresh, 87 bool reduced, bool interlaced, bool margins) 88 { 89 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 90 #define CVT_MARGIN_PERCENTAGE 18 91 /* 2) character cell horizontal granularity (pixels) - default 8 */ 92 #define CVT_H_GRANULARITY 8 93 /* 3) Minimum vertical porch (lines) - default 3 */ 94 #define CVT_MIN_V_PORCH 3 95 /* 4) Minimum number of vertical back porch lines - default 6 */ 96 #define CVT_MIN_V_BPORCH 6 97 /* Pixel Clock step (kHz) */ 98 #define CVT_CLOCK_STEP 250 99 struct drm_display_mode *drm_mode; 100 unsigned int vfieldrate, hperiod; 101 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 102 int interlace; 103 104 /* allocate the drm_display_mode structure. If failure, we will 105 * return directly 106 */ 107 drm_mode = drm_mode_create(dev); 108 if (!drm_mode) 109 return NULL; 110 111 /* the CVT default refresh rate is 60Hz */ 112 if (!vrefresh) 113 vrefresh = 60; 114 115 /* the required field fresh rate */ 116 if (interlaced) 117 vfieldrate = vrefresh * 2; 118 else 119 vfieldrate = vrefresh; 120 121 /* horizontal pixels */ 122 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 123 124 /* determine the left&right borders */ 125 hmargin = 0; 126 if (margins) { 127 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 128 hmargin -= hmargin % CVT_H_GRANULARITY; 129 } 130 /* find the total active pixels */ 131 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 132 133 /* find the number of lines per field */ 134 if (interlaced) 135 vdisplay_rnd = vdisplay / 2; 136 else 137 vdisplay_rnd = vdisplay; 138 139 /* find the top & bottom borders */ 140 vmargin = 0; 141 if (margins) 142 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 143 144 drm_mode->vdisplay = vdisplay + 2 * vmargin; 145 146 /* Interlaced */ 147 if (interlaced) 148 interlace = 1; 149 else 150 interlace = 0; 151 152 /* Determine VSync Width from aspect ratio */ 153 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 154 vsync = 4; 155 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 156 vsync = 5; 157 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 158 vsync = 6; 159 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 160 vsync = 7; 161 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 162 vsync = 7; 163 else /* custom */ 164 vsync = 10; 165 166 if (!reduced) { 167 /* simplify the GTF calculation */ 168 /* 4) Minimum time of vertical sync + back porch interval (µs) 169 * default 550.0 170 */ 171 int tmp1, tmp2; 172 #define CVT_MIN_VSYNC_BP 550 173 /* 3) Nominal HSync width (% of line period) - default 8 */ 174 #define CVT_HSYNC_PERCENTAGE 8 175 unsigned int hblank_percentage; 176 int vsyncandback_porch, hblank; 177 178 /* estimated the horizontal period */ 179 tmp1 = HV_FACTOR * 1000000 - 180 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 181 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 182 interlace; 183 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 184 185 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 186 /* 9. Find number of lines in sync + backporch */ 187 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 188 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 189 else 190 vsyncandback_porch = tmp1; 191 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 192 vsyncandback_porch + CVT_MIN_V_PORCH; 193 /* 5) Definition of Horizontal blanking time limitation */ 194 /* Gradient (%/kHz) - default 600 */ 195 #define CVT_M_FACTOR 600 196 /* Offset (%) - default 40 */ 197 #define CVT_C_FACTOR 40 198 /* Blanking time scaling factor - default 128 */ 199 #define CVT_K_FACTOR 128 200 /* Scaling factor weighting - default 20 */ 201 #define CVT_J_FACTOR 20 202 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 203 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 204 CVT_J_FACTOR) 205 /* 12. Find ideal blanking duty cycle from formula */ 206 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 207 hperiod / 1000; 208 /* 13. Blanking time */ 209 if (hblank_percentage < 20 * HV_FACTOR) 210 hblank_percentage = 20 * HV_FACTOR; 211 hblank = drm_mode->hdisplay * hblank_percentage / 212 (100 * HV_FACTOR - hblank_percentage); 213 hblank -= hblank % (2 * CVT_H_GRANULARITY); 214 /* 14. find the total pixes per line */ 215 drm_mode->htotal = drm_mode->hdisplay + hblank; 216 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 217 drm_mode->hsync_start = drm_mode->hsync_end - 218 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 219 drm_mode->hsync_start += CVT_H_GRANULARITY - 220 drm_mode->hsync_start % CVT_H_GRANULARITY; 221 /* fill the Vsync values */ 222 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 223 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 224 } else { 225 /* Reduced blanking */ 226 /* Minimum vertical blanking interval time (µs)- default 460 */ 227 #define CVT_RB_MIN_VBLANK 460 228 /* Fixed number of clocks for horizontal sync */ 229 #define CVT_RB_H_SYNC 32 230 /* Fixed number of clocks for horizontal blanking */ 231 #define CVT_RB_H_BLANK 160 232 /* Fixed number of lines for vertical front porch - default 3*/ 233 #define CVT_RB_VFPORCH 3 234 int vbilines; 235 int tmp1, tmp2; 236 /* 8. Estimate Horizontal period. */ 237 tmp1 = HV_FACTOR * 1000000 - 238 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 239 tmp2 = vdisplay_rnd + 2 * vmargin; 240 hperiod = tmp1 / (tmp2 * vfieldrate); 241 /* 9. Find number of lines in vertical blanking */ 242 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 243 /* 10. Check if vertical blanking is sufficient */ 244 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 245 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 246 /* 11. Find total number of lines in vertical field */ 247 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 248 /* 12. Find total number of pixels in a line */ 249 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 250 /* Fill in HSync values */ 251 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 252 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 253 /* Fill in VSync values */ 254 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 255 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 256 } 257 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 258 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 259 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 260 /* 18/16. Find actual vertical frame frequency */ 261 /* ignore - just set the mode flag for interlaced */ 262 if (interlaced) { 263 drm_mode->vtotal *= 2; 264 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 265 } 266 /* Fill the mode line name */ 267 drm_mode_set_name(drm_mode); 268 if (reduced) 269 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 270 DRM_MODE_FLAG_NVSYNC); 271 else 272 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 273 DRM_MODE_FLAG_NHSYNC); 274 275 return drm_mode; 276 } 277 EXPORT_SYMBOL(drm_cvt_mode); 278 279 /** 280 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 281 * 282 * @dev :drm device 283 * @hdisplay :hdisplay size 284 * @vdisplay :vdisplay size 285 * @vrefresh :vrefresh rate. 286 * @interlaced :whether the interlace is supported 287 * @margins :desired margin size 288 * @GTF_[MCKJ] :extended GTF formula parameters 289 * 290 * LOCKING. 291 * none. 292 * 293 * return the modeline based on full GTF algorithm. 294 * 295 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 296 * in here multiplied by two. For a C of 40, pass in 80. 297 */ 298 struct drm_display_mode * 299 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 300 int vrefresh, bool interlaced, int margins, 301 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 302 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 303 #define GTF_MARGIN_PERCENTAGE 18 304 /* 2) character cell horizontal granularity (pixels) - default 8 */ 305 #define GTF_CELL_GRAN 8 306 /* 3) Minimum vertical porch (lines) - default 3 */ 307 #define GTF_MIN_V_PORCH 1 308 /* width of vsync in lines */ 309 #define V_SYNC_RQD 3 310 /* width of hsync as % of total line */ 311 #define H_SYNC_PERCENT 8 312 /* min time of vsync + back porch (microsec) */ 313 #define MIN_VSYNC_PLUS_BP 550 314 /* C' and M' are part of the Blanking Duty Cycle computation */ 315 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 316 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 317 struct drm_display_mode *drm_mode; 318 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 319 int top_margin, bottom_margin; 320 int interlace; 321 unsigned int hfreq_est; 322 int vsync_plus_bp; 323 unsigned int vtotal_lines; 324 int left_margin, right_margin; 325 unsigned int total_active_pixels, ideal_duty_cycle; 326 unsigned int hblank, total_pixels, pixel_freq; 327 int hsync, hfront_porch, vodd_front_porch_lines; 328 unsigned int tmp1, tmp2; 329 330 drm_mode = drm_mode_create(dev); 331 if (!drm_mode) 332 return NULL; 333 334 /* 1. In order to give correct results, the number of horizontal 335 * pixels requested is first processed to ensure that it is divisible 336 * by the character size, by rounding it to the nearest character 337 * cell boundary: 338 */ 339 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 340 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 341 342 /* 2. If interlace is requested, the number of vertical lines assumed 343 * by the calculation must be halved, as the computation calculates 344 * the number of vertical lines per field. 345 */ 346 if (interlaced) 347 vdisplay_rnd = vdisplay / 2; 348 else 349 vdisplay_rnd = vdisplay; 350 351 /* 3. Find the frame rate required: */ 352 if (interlaced) 353 vfieldrate_rqd = vrefresh * 2; 354 else 355 vfieldrate_rqd = vrefresh; 356 357 /* 4. Find number of lines in Top margin: */ 358 top_margin = 0; 359 if (margins) 360 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 361 1000; 362 /* 5. Find number of lines in bottom margin: */ 363 bottom_margin = top_margin; 364 365 /* 6. If interlace is required, then set variable interlace: */ 366 if (interlaced) 367 interlace = 1; 368 else 369 interlace = 0; 370 371 /* 7. Estimate the Horizontal frequency */ 372 { 373 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 374 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 375 2 + interlace; 376 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 377 } 378 379 /* 8. Find the number of lines in V sync + back porch */ 380 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 381 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 382 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 383 /* 10. Find the total number of lines in Vertical field period: */ 384 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 385 vsync_plus_bp + GTF_MIN_V_PORCH; 386 387 /* 15. Find number of pixels in left margin: */ 388 if (margins) 389 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 390 1000; 391 else 392 left_margin = 0; 393 394 /* 16.Find number of pixels in right margin: */ 395 right_margin = left_margin; 396 /* 17.Find total number of active pixels in image and left and right */ 397 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 398 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 399 ideal_duty_cycle = GTF_C_PRIME * 1000 - 400 (GTF_M_PRIME * 1000000 / hfreq_est); 401 /* 19.Find the number of pixels in the blanking time to the nearest 402 * double character cell: */ 403 hblank = total_active_pixels * ideal_duty_cycle / 404 (100000 - ideal_duty_cycle); 405 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 406 hblank = hblank * 2 * GTF_CELL_GRAN; 407 /* 20.Find total number of pixels: */ 408 total_pixels = total_active_pixels + hblank; 409 /* 21.Find pixel clock frequency: */ 410 pixel_freq = total_pixels * hfreq_est / 1000; 411 /* Stage 1 computations are now complete; I should really pass 412 * the results to another function and do the Stage 2 computations, 413 * but I only need a few more values so I'll just append the 414 * computations here for now */ 415 /* 17. Find the number of pixels in the horizontal sync period: */ 416 hsync = H_SYNC_PERCENT * total_pixels / 100; 417 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 418 hsync = hsync * GTF_CELL_GRAN; 419 /* 18. Find the number of pixels in horizontal front porch period */ 420 hfront_porch = hblank / 2 - hsync; 421 /* 36. Find the number of lines in the odd front porch period: */ 422 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 423 424 /* finally, pack the results in the mode struct */ 425 drm_mode->hdisplay = hdisplay_rnd; 426 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 427 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 428 drm_mode->htotal = total_pixels; 429 drm_mode->vdisplay = vdisplay_rnd; 430 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 431 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 432 drm_mode->vtotal = vtotal_lines; 433 434 drm_mode->clock = pixel_freq; 435 436 if (interlaced) { 437 drm_mode->vtotal *= 2; 438 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 439 } 440 441 drm_mode_set_name(drm_mode); 442 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 443 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 444 else 445 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 446 447 return drm_mode; 448 } 449 EXPORT_SYMBOL(drm_gtf_mode_complex); 450 451 /** 452 * drm_gtf_mode - create the modeline based on GTF algorithm 453 * 454 * @dev :drm device 455 * @hdisplay :hdisplay size 456 * @vdisplay :vdisplay size 457 * @vrefresh :vrefresh rate. 458 * @interlaced :whether the interlace is supported 459 * @margins :whether the margin is supported 460 * 461 * LOCKING. 462 * none. 463 * 464 * return the modeline based on GTF algorithm 465 * 466 * This function is to create the modeline based on the GTF algorithm. 467 * Generalized Timing Formula is derived from: 468 * GTF Spreadsheet by Andy Morrish (1/5/97) 469 * available at http://www.vesa.org 470 * 471 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 472 * What I have done is to translate it by using integer calculation. 473 * I also refer to the function of fb_get_mode in the file of 474 * drivers/video/fbmon.c 475 * 476 * Standard GTF parameters: 477 * M = 600 478 * C = 40 479 * K = 128 480 * J = 20 481 */ 482 struct drm_display_mode * 483 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 484 bool lace, int margins) 485 { 486 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 487 margins, 600, 40 * 2, 128, 20 * 2); 488 } 489 EXPORT_SYMBOL(drm_gtf_mode); 490 491 /** 492 * drm_mode_set_name - set the name on a mode 493 * @mode: name will be set in this mode 494 * 495 * LOCKING: 496 * None. 497 * 498 * Set the name of @mode to a standard format. 499 */ 500 void drm_mode_set_name(struct drm_display_mode *mode) 501 { 502 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 503 504 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 505 mode->hdisplay, mode->vdisplay, 506 interlaced ? "i" : ""); 507 } 508 EXPORT_SYMBOL(drm_mode_set_name); 509 510 /** 511 * drm_mode_list_concat - move modes from one list to another 512 * @head: source list 513 * @new: dst list 514 * 515 * LOCKING: 516 * Caller must ensure both lists are locked. 517 * 518 * Move all the modes from @head to @new. 519 */ 520 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 521 { 522 523 struct list_head *entry, *tmp; 524 525 list_for_each_safe(entry, tmp, head) { 526 list_move_tail(entry, new); 527 } 528 } 529 EXPORT_SYMBOL(drm_mode_list_concat); 530 531 /** 532 * drm_mode_width - get the width of a mode 533 * @mode: mode 534 * 535 * LOCKING: 536 * None. 537 * 538 * Return @mode's width (hdisplay) value. 539 * 540 * FIXME: is this needed? 541 * 542 * RETURNS: 543 * @mode->hdisplay 544 */ 545 int drm_mode_width(const struct drm_display_mode *mode) 546 { 547 return mode->hdisplay; 548 549 } 550 EXPORT_SYMBOL(drm_mode_width); 551 552 /** 553 * drm_mode_height - get the height of a mode 554 * @mode: mode 555 * 556 * LOCKING: 557 * None. 558 * 559 * Return @mode's height (vdisplay) value. 560 * 561 * FIXME: is this needed? 562 * 563 * RETURNS: 564 * @mode->vdisplay 565 */ 566 int drm_mode_height(const struct drm_display_mode *mode) 567 { 568 return mode->vdisplay; 569 } 570 EXPORT_SYMBOL(drm_mode_height); 571 572 /** drm_mode_hsync - get the hsync of a mode 573 * @mode: mode 574 * 575 * LOCKING: 576 * None. 577 * 578 * Return @modes's hsync rate in kHz, rounded to the nearest int. 579 */ 580 int drm_mode_hsync(const struct drm_display_mode *mode) 581 { 582 unsigned int calc_val; 583 584 if (mode->hsync) 585 return mode->hsync; 586 587 if (mode->htotal < 0) 588 return 0; 589 590 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 591 calc_val += 500; /* round to 1000Hz */ 592 calc_val /= 1000; /* truncate to kHz */ 593 594 return calc_val; 595 } 596 EXPORT_SYMBOL(drm_mode_hsync); 597 598 /** 599 * drm_mode_vrefresh - get the vrefresh of a mode 600 * @mode: mode 601 * 602 * LOCKING: 603 * None. 604 * 605 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 606 * 607 * FIXME: why is this needed? shouldn't vrefresh be set already? 608 * 609 * RETURNS: 610 * Vertical refresh rate. It will be the result of actual value plus 0.5. 611 * If it is 70.288, it will return 70Hz. 612 * If it is 59.6, it will return 60Hz. 613 */ 614 int drm_mode_vrefresh(const struct drm_display_mode *mode) 615 { 616 int refresh = 0; 617 unsigned int calc_val; 618 619 if (mode->vrefresh > 0) 620 refresh = mode->vrefresh; 621 else if (mode->htotal > 0 && mode->vtotal > 0) { 622 int vtotal; 623 vtotal = mode->vtotal; 624 /* work out vrefresh the value will be x1000 */ 625 calc_val = (mode->clock * 1000); 626 calc_val /= mode->htotal; 627 refresh = (calc_val + vtotal / 2) / vtotal; 628 629 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 630 refresh *= 2; 631 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 632 refresh /= 2; 633 if (mode->vscan > 1) 634 refresh /= mode->vscan; 635 } 636 return refresh; 637 } 638 EXPORT_SYMBOL(drm_mode_vrefresh); 639 640 /** 641 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 642 * @p: mode 643 * @adjust_flags: unused? (FIXME) 644 * 645 * LOCKING: 646 * None. 647 * 648 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 649 */ 650 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 651 { 652 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 653 return; 654 655 p->crtc_hdisplay = p->hdisplay; 656 p->crtc_hsync_start = p->hsync_start; 657 p->crtc_hsync_end = p->hsync_end; 658 p->crtc_htotal = p->htotal; 659 p->crtc_hskew = p->hskew; 660 p->crtc_vdisplay = p->vdisplay; 661 p->crtc_vsync_start = p->vsync_start; 662 p->crtc_vsync_end = p->vsync_end; 663 p->crtc_vtotal = p->vtotal; 664 665 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 666 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 667 p->crtc_vdisplay /= 2; 668 p->crtc_vsync_start /= 2; 669 p->crtc_vsync_end /= 2; 670 p->crtc_vtotal /= 2; 671 } 672 } 673 674 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 675 p->crtc_vdisplay *= 2; 676 p->crtc_vsync_start *= 2; 677 p->crtc_vsync_end *= 2; 678 p->crtc_vtotal *= 2; 679 } 680 681 if (p->vscan > 1) { 682 p->crtc_vdisplay *= p->vscan; 683 p->crtc_vsync_start *= p->vscan; 684 p->crtc_vsync_end *= p->vscan; 685 p->crtc_vtotal *= p->vscan; 686 } 687 688 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 689 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 690 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 691 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 692 } 693 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 694 695 696 /** 697 * drm_mode_copy - copy the mode 698 * @dst: mode to overwrite 699 * @src: mode to copy 700 * 701 * LOCKING: 702 * None. 703 * 704 * Copy an existing mode into another mode, preserving the object id 705 * of the destination mode. 706 */ 707 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 708 { 709 int id = dst->base.id; 710 711 *dst = *src; 712 dst->base.id = id; 713 INIT_LIST_HEAD(&dst->head); 714 } 715 EXPORT_SYMBOL(drm_mode_copy); 716 717 /** 718 * drm_mode_duplicate - allocate and duplicate an existing mode 719 * @m: mode to duplicate 720 * 721 * LOCKING: 722 * None. 723 * 724 * Just allocate a new mode, copy the existing mode into it, and return 725 * a pointer to it. Used to create new instances of established modes. 726 */ 727 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 728 const struct drm_display_mode *mode) 729 { 730 struct drm_display_mode *nmode; 731 732 nmode = drm_mode_create(dev); 733 if (!nmode) 734 return NULL; 735 736 drm_mode_copy(nmode, mode); 737 738 return nmode; 739 } 740 EXPORT_SYMBOL(drm_mode_duplicate); 741 742 /** 743 * drm_mode_equal - test modes for equality 744 * @mode1: first mode 745 * @mode2: second mode 746 * 747 * LOCKING: 748 * None. 749 * 750 * Check to see if @mode1 and @mode2 are equivalent. 751 * 752 * RETURNS: 753 * True if the modes are equal, false otherwise. 754 */ 755 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 756 { 757 /* do clock check convert to PICOS so fb modes get matched 758 * the same */ 759 if (mode1->clock && mode2->clock) { 760 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 761 return false; 762 } else if (mode1->clock != mode2->clock) 763 return false; 764 765 if (mode1->hdisplay == mode2->hdisplay && 766 mode1->hsync_start == mode2->hsync_start && 767 mode1->hsync_end == mode2->hsync_end && 768 mode1->htotal == mode2->htotal && 769 mode1->hskew == mode2->hskew && 770 mode1->vdisplay == mode2->vdisplay && 771 mode1->vsync_start == mode2->vsync_start && 772 mode1->vsync_end == mode2->vsync_end && 773 mode1->vtotal == mode2->vtotal && 774 mode1->vscan == mode2->vscan && 775 mode1->flags == mode2->flags) 776 return true; 777 778 return false; 779 } 780 EXPORT_SYMBOL(drm_mode_equal); 781 782 /** 783 * drm_mode_validate_size - make sure modes adhere to size constraints 784 * @dev: DRM device 785 * @mode_list: list of modes to check 786 * @maxX: maximum width 787 * @maxY: maximum height 788 * @maxPitch: max pitch 789 * 790 * LOCKING: 791 * Caller must hold a lock protecting @mode_list. 792 * 793 * The DRM device (@dev) has size and pitch limits. Here we validate the 794 * modes we probed for @dev against those limits and set their status as 795 * necessary. 796 */ 797 void drm_mode_validate_size(struct drm_device *dev, 798 struct list_head *mode_list, 799 int maxX, int maxY, int maxPitch) 800 { 801 struct drm_display_mode *mode; 802 803 list_for_each_entry(mode, mode_list, head) { 804 if (maxPitch > 0 && mode->hdisplay > maxPitch) 805 mode->status = MODE_BAD_WIDTH; 806 807 if (maxX > 0 && mode->hdisplay > maxX) 808 mode->status = MODE_VIRTUAL_X; 809 810 if (maxY > 0 && mode->vdisplay > maxY) 811 mode->status = MODE_VIRTUAL_Y; 812 } 813 } 814 EXPORT_SYMBOL(drm_mode_validate_size); 815 816 /** 817 * drm_mode_validate_clocks - validate modes against clock limits 818 * @dev: DRM device 819 * @mode_list: list of modes to check 820 * @min: minimum clock rate array 821 * @max: maximum clock rate array 822 * @n_ranges: number of clock ranges (size of arrays) 823 * 824 * LOCKING: 825 * Caller must hold a lock protecting @mode_list. 826 * 827 * Some code may need to check a mode list against the clock limits of the 828 * device in question. This function walks the mode list, testing to make 829 * sure each mode falls within a given range (defined by @min and @max 830 * arrays) and sets @mode->status as needed. 831 */ 832 void drm_mode_validate_clocks(struct drm_device *dev, 833 struct list_head *mode_list, 834 int *min, int *max, int n_ranges) 835 { 836 struct drm_display_mode *mode; 837 int i; 838 839 list_for_each_entry(mode, mode_list, head) { 840 bool good = false; 841 for (i = 0; i < n_ranges; i++) { 842 if (mode->clock >= min[i] && mode->clock <= max[i]) { 843 good = true; 844 break; 845 } 846 } 847 if (!good) 848 mode->status = MODE_CLOCK_RANGE; 849 } 850 } 851 EXPORT_SYMBOL(drm_mode_validate_clocks); 852 853 /** 854 * drm_mode_prune_invalid - remove invalid modes from mode list 855 * @dev: DRM device 856 * @mode_list: list of modes to check 857 * @verbose: be verbose about it 858 * 859 * LOCKING: 860 * Caller must hold a lock protecting @mode_list. 861 * 862 * Once mode list generation is complete, a caller can use this routine to 863 * remove invalid modes from a mode list. If any of the modes have a 864 * status other than %MODE_OK, they are removed from @mode_list and freed. 865 */ 866 void drm_mode_prune_invalid(struct drm_device *dev, 867 struct list_head *mode_list, bool verbose) 868 { 869 struct drm_display_mode *mode, *t; 870 871 list_for_each_entry_safe(mode, t, mode_list, head) { 872 if (mode->status != MODE_OK) { 873 list_del(&mode->head); 874 if (verbose) { 875 drm_mode_debug_printmodeline(mode); 876 DRM_DEBUG_KMS("Not using %s mode %d\n", 877 mode->name, mode->status); 878 } 879 drm_mode_destroy(dev, mode); 880 } 881 } 882 } 883 EXPORT_SYMBOL(drm_mode_prune_invalid); 884 885 /** 886 * drm_mode_compare - compare modes for favorability 887 * @priv: unused 888 * @lh_a: list_head for first mode 889 * @lh_b: list_head for second mode 890 * 891 * LOCKING: 892 * None. 893 * 894 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 895 * which is better. 896 * 897 * RETURNS: 898 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 899 * positive if @lh_b is better than @lh_a. 900 */ 901 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 902 { 903 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 904 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 905 int diff; 906 907 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 908 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 909 if (diff) 910 return diff; 911 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 912 if (diff) 913 return diff; 914 915 diff = b->vrefresh - a->vrefresh; 916 if (diff) 917 return diff; 918 919 diff = b->clock - a->clock; 920 return diff; 921 } 922 923 /** 924 * drm_mode_sort - sort mode list 925 * @mode_list: list to sort 926 * 927 * LOCKING: 928 * Caller must hold a lock protecting @mode_list. 929 * 930 * Sort @mode_list by favorability, putting good modes first. 931 */ 932 void drm_mode_sort(struct list_head *mode_list) 933 { 934 drm_list_sort(NULL, mode_list, drm_mode_compare); 935 } 936 EXPORT_SYMBOL(drm_mode_sort); 937 938 /** 939 * drm_mode_connector_list_update - update the mode list for the connector 940 * @connector: the connector to update 941 * 942 * LOCKING: 943 * Caller must hold a lock protecting @mode_list. 944 * 945 * This moves the modes from the @connector probed_modes list 946 * to the actual mode list. It compares the probed mode against the current 947 * list and only adds different modes. All modes unverified after this point 948 * will be removed by the prune invalid modes. 949 */ 950 void drm_mode_connector_list_update(struct drm_connector *connector) 951 { 952 struct drm_display_mode *mode; 953 struct drm_display_mode *pmode, *pt; 954 int found_it; 955 956 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 957 head) { 958 found_it = 0; 959 /* go through current modes checking for the new probed mode */ 960 list_for_each_entry(mode, &connector->modes, head) { 961 if (drm_mode_equal(pmode, mode)) { 962 found_it = 1; 963 /* if equal delete the probed mode */ 964 mode->status = pmode->status; 965 /* Merge type bits together */ 966 mode->type |= pmode->type; 967 list_del(&pmode->head); 968 drm_mode_destroy(connector->dev, pmode); 969 break; 970 } 971 } 972 973 if (!found_it) { 974 list_move_tail(&pmode->head, &connector->modes); 975 } 976 } 977 } 978 EXPORT_SYMBOL(drm_mode_connector_list_update); 979 980 /** 981 * drm_mode_parse_command_line_for_connector - parse command line for connector 982 * @mode_option - per connector mode option 983 * @connector - connector to parse line for 984 * 985 * This parses the connector specific then generic command lines for 986 * modes and options to configure the connector. 987 * 988 * This uses the same parameters as the fb modedb.c, except for extra 989 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 990 * 991 * enable/enable Digital/disable bit at the end 992 */ 993 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 994 struct drm_connector *connector, 995 struct drm_cmdline_mode *mode) 996 { 997 const char *name; 998 unsigned int namelen; 999 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1000 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1001 bool yres_specified = false, cvt = false, rb = false; 1002 bool interlace = false, margins = false, was_digit = false; 1003 int i; 1004 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1005 1006 #ifdef CONFIG_FB 1007 if (!mode_option) 1008 mode_option = fb_mode_option; 1009 #endif 1010 1011 if (!mode_option) { 1012 mode->specified = false; 1013 return false; 1014 } 1015 1016 name = mode_option; 1017 namelen = strlen(name); 1018 for (i = namelen-1; i >= 0; i--) { 1019 switch (name[i]) { 1020 case '@': 1021 if (!refresh_specified && !bpp_specified && 1022 !yres_specified && !cvt && !rb && was_digit) { 1023 refresh = simple_strtol(&name[i+1], NULL, 10); 1024 refresh_specified = true; 1025 was_digit = false; 1026 } else 1027 goto done; 1028 break; 1029 case '-': 1030 if (!bpp_specified && !yres_specified && !cvt && 1031 !rb && was_digit) { 1032 bpp = simple_strtol(&name[i+1], NULL, 10); 1033 bpp_specified = true; 1034 was_digit = false; 1035 } else 1036 goto done; 1037 break; 1038 case 'x': 1039 if (!yres_specified && was_digit) { 1040 yres = simple_strtol(&name[i+1], NULL, 10); 1041 yres_specified = true; 1042 was_digit = false; 1043 } else 1044 goto done; 1045 case '' ... '9': 1046 was_digit = true; 1047 break; 1048 case 'M': 1049 if (yres_specified || cvt || was_digit) 1050 goto done; 1051 cvt = true; 1052 break; 1053 case 'R': 1054 if (yres_specified || cvt || rb || was_digit) 1055 goto done; 1056 rb = true; 1057 break; 1058 case 'm': 1059 if (cvt || yres_specified || was_digit) 1060 goto done; 1061 margins = true; 1062 break; 1063 case 'i': 1064 if (cvt || yres_specified || was_digit) 1065 goto done; 1066 interlace = true; 1067 break; 1068 case 'e': 1069 if (yres_specified || bpp_specified || refresh_specified || 1070 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1071 goto done; 1072 1073 force = DRM_FORCE_ON; 1074 break; 1075 case 'D': 1076 if (yres_specified || bpp_specified || refresh_specified || 1077 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1078 goto done; 1079 1080 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1081 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1082 force = DRM_FORCE_ON; 1083 else 1084 force = DRM_FORCE_ON_DIGITAL; 1085 break; 1086 case 'd': 1087 if (yres_specified || bpp_specified || refresh_specified || 1088 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1089 goto done; 1090 1091 force = DRM_FORCE_OFF; 1092 break; 1093 default: 1094 goto done; 1095 } 1096 } 1097 1098 if (i < 0 && yres_specified) { 1099 char *ch; 1100 xres = simple_strtol(name, &ch, 10); 1101 if ((ch != NULL) && (*ch == 'x')) 1102 res_specified = true; 1103 else 1104 i = ch - name; 1105 } else if (!yres_specified && was_digit) { 1106 /* catch mode that begins with digits but has no 'x' */ 1107 i = 0; 1108 } 1109 done: 1110 if (i >= 0) { 1111 DRM_WARNING( 1112 "parse error at position %i in video mode '%s'\n", 1113 i, name); 1114 mode->specified = false; 1115 return false; 1116 } 1117 1118 if (res_specified) { 1119 mode->specified = true; 1120 mode->xres = xres; 1121 mode->yres = yres; 1122 } 1123 1124 if (refresh_specified) { 1125 mode->refresh_specified = true; 1126 mode->refresh = refresh; 1127 } 1128 1129 if (bpp_specified) { 1130 mode->bpp_specified = true; 1131 mode->bpp = bpp; 1132 } 1133 mode->rb = rb; 1134 mode->cvt = cvt; 1135 mode->interlace = interlace; 1136 mode->margins = margins; 1137 mode->force = force; 1138 1139 return true; 1140 } 1141 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1142 1143 struct drm_display_mode * 1144 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1145 struct drm_cmdline_mode *cmd) 1146 { 1147 struct drm_display_mode *mode; 1148 1149 if (cmd->cvt) 1150 mode = drm_cvt_mode(dev, 1151 cmd->xres, cmd->yres, 1152 cmd->refresh_specified ? cmd->refresh : 60, 1153 cmd->rb, cmd->interlace, 1154 cmd->margins); 1155 else 1156 mode = drm_gtf_mode(dev, 1157 cmd->xres, cmd->yres, 1158 cmd->refresh_specified ? cmd->refresh : 60, 1159 cmd->interlace, 1160 cmd->margins); 1161 if (!mode) 1162 return NULL; 1163 1164 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1165 return mode; 1166 } 1167 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
Cache object: 59651fec01294b02958e0a56d6b558ec
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