Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/drm2/drm_modes.c
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1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <dev/drm2/drmP.h> 37 #include <dev/drm2/drm_crtc.h> 38 39 /** 40 * drm_mode_debug_printmodeline - debug print a mode 41 * @dev: DRM device 42 * @mode: mode to print 43 * 44 * LOCKING: 45 * None. 46 * 47 * Describe @mode using DRM_DEBUG. 48 */ 49 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 50 { 51 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 52 "0x%x 0x%x\n", 53 mode->base.id, mode->name, mode->vrefresh, mode->clock, 54 mode->hdisplay, mode->hsync_start, 55 mode->hsync_end, mode->htotal, 56 mode->vdisplay, mode->vsync_start, 57 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 58 } 59 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 60 61 /** 62 * drm_cvt_mode -create a modeline based on CVT algorithm 63 * @dev: DRM device 64 * @hdisplay: hdisplay size 65 * @vdisplay: vdisplay size 66 * @vrefresh : vrefresh rate 67 * @reduced : Whether the GTF calculation is simplified 68 * @interlaced:Whether the interlace is supported 69 * 70 * LOCKING: 71 * none. 72 * 73 * return the modeline based on CVT algorithm 74 * 75 * This function is called to generate the modeline based on CVT algorithm 76 * according to the hdisplay, vdisplay, vrefresh. 77 * It is based from the VESA(TM) Coordinated Video Timing Generator by 78 * Graham Loveridge April 9, 2003 available at 79 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 80 * 81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 82 * What I have done is to translate it by using integer calculation. 83 */ 84 #define HV_FACTOR 1000 85 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 86 int vdisplay, int vrefresh, 87 bool reduced, bool interlaced, bool margins) 88 { 89 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 90 #define CVT_MARGIN_PERCENTAGE 18 91 /* 2) character cell horizontal granularity (pixels) - default 8 */ 92 #define CVT_H_GRANULARITY 8 93 /* 3) Minimum vertical porch (lines) - default 3 */ 94 #define CVT_MIN_V_PORCH 3 95 /* 4) Minimum number of vertical back porch lines - default 6 */ 96 #define CVT_MIN_V_BPORCH 6 97 /* Pixel Clock step (kHz) */ 98 #define CVT_CLOCK_STEP 250 99 struct drm_display_mode *drm_mode; 100 unsigned int vfieldrate, hperiod; 101 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 102 int interlace; 103 104 /* allocate the drm_display_mode structure. If failure, we will 105 * return directly 106 */ 107 drm_mode = drm_mode_create(dev); 108 if (!drm_mode) 109 return NULL; 110 111 /* the CVT default refresh rate is 60Hz */ 112 if (!vrefresh) 113 vrefresh = 60; 114 115 /* the required field fresh rate */ 116 if (interlaced) 117 vfieldrate = vrefresh * 2; 118 else 119 vfieldrate = vrefresh; 120 121 /* horizontal pixels */ 122 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 123 124 /* determine the left&right borders */ 125 hmargin = 0; 126 if (margins) { 127 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 128 hmargin -= hmargin % CVT_H_GRANULARITY; 129 } 130 /* find the total active pixels */ 131 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 132 133 /* find the number of lines per field */ 134 if (interlaced) 135 vdisplay_rnd = vdisplay / 2; 136 else 137 vdisplay_rnd = vdisplay; 138 139 /* find the top & bottom borders */ 140 vmargin = 0; 141 if (margins) 142 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 143 144 drm_mode->vdisplay = vdisplay + 2 * vmargin; 145 146 /* Interlaced */ 147 if (interlaced) 148 interlace = 1; 149 else 150 interlace = 0; 151 152 /* Determine VSync Width from aspect ratio */ 153 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 154 vsync = 4; 155 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 156 vsync = 5; 157 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 158 vsync = 6; 159 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 160 vsync = 7; 161 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 162 vsync = 7; 163 else /* custom */ 164 vsync = 10; 165 166 if (!reduced) { 167 /* simplify the GTF calculation */ 168 /* 4) Minimum time of vertical sync + back porch interval (µs) 169 * default 550.0 170 */ 171 int tmp1, tmp2; 172 #define CVT_MIN_VSYNC_BP 550 173 /* 3) Nominal HSync width (% of line period) - default 8 */ 174 #define CVT_HSYNC_PERCENTAGE 8 175 unsigned int hblank_percentage; 176 int vsyncandback_porch, vback_porch, hblank; 177 178 /* estimated the horizontal period */ 179 tmp1 = HV_FACTOR * 1000000 - 180 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 181 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 182 interlace; 183 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 184 185 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 186 /* 9. Find number of lines in sync + backporch */ 187 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 188 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 189 else 190 vsyncandback_porch = tmp1; 191 /* 10. Find number of lines in back porch */ 192 vback_porch = vsyncandback_porch - vsync; 193 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 194 vsyncandback_porch + CVT_MIN_V_PORCH; 195 /* 5) Definition of Horizontal blanking time limitation */ 196 /* Gradient (%/kHz) - default 600 */ 197 #define CVT_M_FACTOR 600 198 /* Offset (%) - default 40 */ 199 #define CVT_C_FACTOR 40 200 /* Blanking time scaling factor - default 128 */ 201 #define CVT_K_FACTOR 128 202 /* Scaling factor weighting - default 20 */ 203 #define CVT_J_FACTOR 20 204 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 205 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 206 CVT_J_FACTOR) 207 /* 12. Find ideal blanking duty cycle from formula */ 208 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 209 hperiod / 1000; 210 /* 13. Blanking time */ 211 if (hblank_percentage < 20 * HV_FACTOR) 212 hblank_percentage = 20 * HV_FACTOR; 213 hblank = drm_mode->hdisplay * hblank_percentage / 214 (100 * HV_FACTOR - hblank_percentage); 215 hblank -= hblank % (2 * CVT_H_GRANULARITY); 216 /* 14. find the total pixes per line */ 217 drm_mode->htotal = drm_mode->hdisplay + hblank; 218 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 219 drm_mode->hsync_start = drm_mode->hsync_end - 220 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 221 drm_mode->hsync_start += CVT_H_GRANULARITY - 222 drm_mode->hsync_start % CVT_H_GRANULARITY; 223 /* fill the Vsync values */ 224 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 225 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 226 } else { 227 /* Reduced blanking */ 228 /* Minimum vertical blanking interval time (µs)- default 460 */ 229 #define CVT_RB_MIN_VBLANK 460 230 /* Fixed number of clocks for horizontal sync */ 231 #define CVT_RB_H_SYNC 32 232 /* Fixed number of clocks for horizontal blanking */ 233 #define CVT_RB_H_BLANK 160 234 /* Fixed number of lines for vertical front porch - default 3*/ 235 #define CVT_RB_VFPORCH 3 236 int vbilines; 237 int tmp1, tmp2; 238 /* 8. Estimate Horizontal period. */ 239 tmp1 = HV_FACTOR * 1000000 - 240 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 241 tmp2 = vdisplay_rnd + 2 * vmargin; 242 hperiod = tmp1 / (tmp2 * vfieldrate); 243 /* 9. Find number of lines in vertical blanking */ 244 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 245 /* 10. Check if vertical blanking is sufficient */ 246 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 247 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 248 /* 11. Find total number of lines in vertical field */ 249 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 250 /* 12. Find total number of pixels in a line */ 251 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 252 /* Fill in HSync values */ 253 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 254 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 255 /* Fill in VSync values */ 256 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 257 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 258 } 259 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 260 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 261 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 262 /* 18/16. Find actual vertical frame frequency */ 263 /* ignore - just set the mode flag for interlaced */ 264 if (interlaced) { 265 drm_mode->vtotal *= 2; 266 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 267 } 268 /* Fill the mode line name */ 269 drm_mode_set_name(drm_mode); 270 if (reduced) 271 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 272 DRM_MODE_FLAG_NVSYNC); 273 else 274 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 275 DRM_MODE_FLAG_NHSYNC); 276 277 return drm_mode; 278 } 279 EXPORT_SYMBOL(drm_cvt_mode); 280 281 /** 282 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 283 * 284 * @dev :drm device 285 * @hdisplay :hdisplay size 286 * @vdisplay :vdisplay size 287 * @vrefresh :vrefresh rate. 288 * @interlaced :whether the interlace is supported 289 * @margins :desired margin size 290 * @GTF_[MCKJ] :extended GTF formula parameters 291 * 292 * LOCKING. 293 * none. 294 * 295 * return the modeline based on full GTF algorithm. 296 * 297 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 298 * in here multiplied by two. For a C of 40, pass in 80. 299 */ 300 struct drm_display_mode * 301 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 302 int vrefresh, bool interlaced, int margins, 303 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 304 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 305 #define GTF_MARGIN_PERCENTAGE 18 306 /* 2) character cell horizontal granularity (pixels) - default 8 */ 307 #define GTF_CELL_GRAN 8 308 /* 3) Minimum vertical porch (lines) - default 3 */ 309 #define GTF_MIN_V_PORCH 1 310 /* width of vsync in lines */ 311 #define V_SYNC_RQD 3 312 /* width of hsync as % of total line */ 313 #define H_SYNC_PERCENT 8 314 /* min time of vsync + back porch (microsec) */ 315 #define MIN_VSYNC_PLUS_BP 550 316 /* C' and M' are part of the Blanking Duty Cycle computation */ 317 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 318 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 319 struct drm_display_mode *drm_mode; 320 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 321 int top_margin, bottom_margin; 322 int interlace; 323 unsigned int hfreq_est; 324 int vsync_plus_bp, vback_porch; 325 unsigned int vtotal_lines, vfieldrate_est, hperiod; 326 unsigned int vfield_rate, vframe_rate; 327 int left_margin, right_margin; 328 unsigned int total_active_pixels, ideal_duty_cycle; 329 unsigned int hblank, total_pixels, pixel_freq; 330 int hsync, hfront_porch, vodd_front_porch_lines; 331 unsigned int tmp1, tmp2; 332 333 drm_mode = drm_mode_create(dev); 334 if (!drm_mode) 335 return NULL; 336 337 /* 1. In order to give correct results, the number of horizontal 338 * pixels requested is first processed to ensure that it is divisible 339 * by the character size, by rounding it to the nearest character 340 * cell boundary: 341 */ 342 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 343 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 344 345 /* 2. If interlace is requested, the number of vertical lines assumed 346 * by the calculation must be halved, as the computation calculates 347 * the number of vertical lines per field. 348 */ 349 if (interlaced) 350 vdisplay_rnd = vdisplay / 2; 351 else 352 vdisplay_rnd = vdisplay; 353 354 /* 3. Find the frame rate required: */ 355 if (interlaced) 356 vfieldrate_rqd = vrefresh * 2; 357 else 358 vfieldrate_rqd = vrefresh; 359 360 /* 4. Find number of lines in Top margin: */ 361 top_margin = 0; 362 if (margins) 363 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 364 1000; 365 /* 5. Find number of lines in bottom margin: */ 366 bottom_margin = top_margin; 367 368 /* 6. If interlace is required, then set variable interlace: */ 369 if (interlaced) 370 interlace = 1; 371 else 372 interlace = 0; 373 374 /* 7. Estimate the Horizontal frequency */ 375 { 376 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 377 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 378 2 + interlace; 379 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 380 } 381 382 /* 8. Find the number of lines in V sync + back porch */ 383 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 384 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 385 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 386 /* 9. Find the number of lines in V back porch alone: */ 387 vback_porch = vsync_plus_bp - V_SYNC_RQD; 388 /* 10. Find the total number of lines in Vertical field period: */ 389 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 390 vsync_plus_bp + GTF_MIN_V_PORCH; 391 /* 11. Estimate the Vertical field frequency: */ 392 vfieldrate_est = hfreq_est / vtotal_lines; 393 /* 12. Find the actual horizontal period: */ 394 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 395 396 /* 13. Find the actual Vertical field frequency: */ 397 vfield_rate = hfreq_est / vtotal_lines; 398 /* 14. Find the Vertical frame frequency: */ 399 if (interlaced) 400 vframe_rate = vfield_rate / 2; 401 else 402 vframe_rate = vfield_rate; 403 /* 15. Find number of pixels in left margin: */ 404 if (margins) 405 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 406 1000; 407 else 408 left_margin = 0; 409 410 /* 16.Find number of pixels in right margin: */ 411 right_margin = left_margin; 412 /* 17.Find total number of active pixels in image and left and right */ 413 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 414 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 415 ideal_duty_cycle = GTF_C_PRIME * 1000 - 416 (GTF_M_PRIME * 1000000 / hfreq_est); 417 /* 19.Find the number of pixels in the blanking time to the nearest 418 * double character cell: */ 419 hblank = total_active_pixels * ideal_duty_cycle / 420 (100000 - ideal_duty_cycle); 421 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 422 hblank = hblank * 2 * GTF_CELL_GRAN; 423 /* 20.Find total number of pixels: */ 424 total_pixels = total_active_pixels + hblank; 425 /* 21.Find pixel clock frequency: */ 426 pixel_freq = total_pixels * hfreq_est / 1000; 427 /* Stage 1 computations are now complete; I should really pass 428 * the results to another function and do the Stage 2 computations, 429 * but I only need a few more values so I'll just append the 430 * computations here for now */ 431 /* 17. Find the number of pixels in the horizontal sync period: */ 432 hsync = H_SYNC_PERCENT * total_pixels / 100; 433 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 434 hsync = hsync * GTF_CELL_GRAN; 435 /* 18. Find the number of pixels in horizontal front porch period */ 436 hfront_porch = hblank / 2 - hsync; 437 /* 36. Find the number of lines in the odd front porch period: */ 438 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 439 440 /* finally, pack the results in the mode struct */ 441 drm_mode->hdisplay = hdisplay_rnd; 442 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 443 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 444 drm_mode->htotal = total_pixels; 445 drm_mode->vdisplay = vdisplay_rnd; 446 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 447 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 448 drm_mode->vtotal = vtotal_lines; 449 450 drm_mode->clock = pixel_freq; 451 452 if (interlaced) { 453 drm_mode->vtotal *= 2; 454 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 455 } 456 457 drm_mode_set_name(drm_mode); 458 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 459 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 460 else 461 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 462 463 return drm_mode; 464 } 465 EXPORT_SYMBOL(drm_gtf_mode_complex); 466 467 /** 468 * drm_gtf_mode - create the modeline based on GTF algorithm 469 * 470 * @dev :drm device 471 * @hdisplay :hdisplay size 472 * @vdisplay :vdisplay size 473 * @vrefresh :vrefresh rate. 474 * @interlaced :whether the interlace is supported 475 * @margins :whether the margin is supported 476 * 477 * LOCKING. 478 * none. 479 * 480 * return the modeline based on GTF algorithm 481 * 482 * This function is to create the modeline based on the GTF algorithm. 483 * Generalized Timing Formula is derived from: 484 * GTF Spreadsheet by Andy Morrish (1/5/97) 485 * available at http://www.vesa.org 486 * 487 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 488 * What I have done is to translate it by using integer calculation. 489 * I also refer to the function of fb_get_mode in the file of 490 * drivers/video/fbmon.c 491 * 492 * Standard GTF parameters: 493 * M = 600 494 * C = 40 495 * K = 128 496 * J = 20 497 */ 498 struct drm_display_mode * 499 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 500 bool lace, int margins) 501 { 502 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 503 margins, 600, 40 * 2, 128, 20 * 2); 504 } 505 EXPORT_SYMBOL(drm_gtf_mode); 506 507 /** 508 * drm_mode_set_name - set the name on a mode 509 * @mode: name will be set in this mode 510 * 511 * LOCKING: 512 * None. 513 * 514 * Set the name of @mode to a standard format. 515 */ 516 void drm_mode_set_name(struct drm_display_mode *mode) 517 { 518 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 519 520 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 521 mode->hdisplay, mode->vdisplay, 522 interlaced ? "i" : ""); 523 } 524 EXPORT_SYMBOL(drm_mode_set_name); 525 526 /** 527 * drm_mode_list_concat - move modes from one list to another 528 * @head: source list 529 * @new: dst list 530 * 531 * LOCKING: 532 * Caller must ensure both lists are locked. 533 * 534 * Move all the modes from @head to @new. 535 */ 536 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 537 { 538 539 struct list_head *entry, *tmp; 540 541 list_for_each_safe(entry, tmp, head) { 542 list_move_tail(entry, new); 543 } 544 } 545 EXPORT_SYMBOL(drm_mode_list_concat); 546 547 /** 548 * drm_mode_width - get the width of a mode 549 * @mode: mode 550 * 551 * LOCKING: 552 * None. 553 * 554 * Return @mode's width (hdisplay) value. 555 * 556 * FIXME: is this needed? 557 * 558 * RETURNS: 559 * @mode->hdisplay 560 */ 561 int drm_mode_width(const struct drm_display_mode *mode) 562 { 563 return mode->hdisplay; 564 565 } 566 EXPORT_SYMBOL(drm_mode_width); 567 568 /** 569 * drm_mode_height - get the height of a mode 570 * @mode: mode 571 * 572 * LOCKING: 573 * None. 574 * 575 * Return @mode's height (vdisplay) value. 576 * 577 * FIXME: is this needed? 578 * 579 * RETURNS: 580 * @mode->vdisplay 581 */ 582 int drm_mode_height(const struct drm_display_mode *mode) 583 { 584 return mode->vdisplay; 585 } 586 EXPORT_SYMBOL(drm_mode_height); 587 588 /** drm_mode_hsync - get the hsync of a mode 589 * @mode: mode 590 * 591 * LOCKING: 592 * None. 593 * 594 * Return @modes's hsync rate in kHz, rounded to the nearest int. 595 */ 596 int drm_mode_hsync(const struct drm_display_mode *mode) 597 { 598 unsigned int calc_val; 599 600 if (mode->hsync) 601 return mode->hsync; 602 603 if (mode->htotal < 0) 604 return 0; 605 606 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 607 calc_val += 500; /* round to 1000Hz */ 608 calc_val /= 1000; /* truncate to kHz */ 609 610 return calc_val; 611 } 612 EXPORT_SYMBOL(drm_mode_hsync); 613 614 /** 615 * drm_mode_vrefresh - get the vrefresh of a mode 616 * @mode: mode 617 * 618 * LOCKING: 619 * None. 620 * 621 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 622 * 623 * FIXME: why is this needed? shouldn't vrefresh be set already? 624 * 625 * RETURNS: 626 * Vertical refresh rate. It will be the result of actual value plus 0.5. 627 * If it is 70.288, it will return 70Hz. 628 * If it is 59.6, it will return 60Hz. 629 */ 630 int drm_mode_vrefresh(const struct drm_display_mode *mode) 631 { 632 int refresh = 0; 633 unsigned int calc_val; 634 635 if (mode->vrefresh > 0) 636 refresh = mode->vrefresh; 637 else if (mode->htotal > 0 && mode->vtotal > 0) { 638 int vtotal; 639 vtotal = mode->vtotal; 640 /* work out vrefresh the value will be x1000 */ 641 calc_val = (mode->clock * 1000); 642 calc_val /= mode->htotal; 643 refresh = (calc_val + vtotal / 2) / vtotal; 644 645 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 646 refresh *= 2; 647 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 648 refresh /= 2; 649 if (mode->vscan > 1) 650 refresh /= mode->vscan; 651 } 652 return refresh; 653 } 654 EXPORT_SYMBOL(drm_mode_vrefresh); 655 656 /** 657 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 658 * @p: mode 659 * @adjust_flags: unused? (FIXME) 660 * 661 * LOCKING: 662 * None. 663 * 664 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 665 */ 666 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 667 { 668 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 669 return; 670 671 p->crtc_hdisplay = p->hdisplay; 672 p->crtc_hsync_start = p->hsync_start; 673 p->crtc_hsync_end = p->hsync_end; 674 p->crtc_htotal = p->htotal; 675 p->crtc_hskew = p->hskew; 676 p->crtc_vdisplay = p->vdisplay; 677 p->crtc_vsync_start = p->vsync_start; 678 p->crtc_vsync_end = p->vsync_end; 679 p->crtc_vtotal = p->vtotal; 680 681 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 682 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 683 p->crtc_vdisplay /= 2; 684 p->crtc_vsync_start /= 2; 685 p->crtc_vsync_end /= 2; 686 p->crtc_vtotal /= 2; 687 } 688 } 689 690 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 691 p->crtc_vdisplay *= 2; 692 p->crtc_vsync_start *= 2; 693 p->crtc_vsync_end *= 2; 694 p->crtc_vtotal *= 2; 695 } 696 697 if (p->vscan > 1) { 698 p->crtc_vdisplay *= p->vscan; 699 p->crtc_vsync_start *= p->vscan; 700 p->crtc_vsync_end *= p->vscan; 701 p->crtc_vtotal *= p->vscan; 702 } 703 704 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 705 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 706 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 707 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 708 } 709 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 710 711 712 /** 713 * drm_mode_copy - copy the mode 714 * @dst: mode to overwrite 715 * @src: mode to copy 716 * 717 * LOCKING: 718 * None. 719 * 720 * Copy an existing mode into another mode, preserving the object id 721 * of the destination mode. 722 */ 723 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 724 { 725 int id = dst->base.id; 726 727 *dst = *src; 728 dst->base.id = id; 729 INIT_LIST_HEAD(&dst->head); 730 } 731 EXPORT_SYMBOL(drm_mode_copy); 732 733 /** 734 * drm_mode_duplicate - allocate and duplicate an existing mode 735 * @m: mode to duplicate 736 * 737 * LOCKING: 738 * None. 739 * 740 * Just allocate a new mode, copy the existing mode into it, and return 741 * a pointer to it. Used to create new instances of established modes. 742 */ 743 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 744 const struct drm_display_mode *mode) 745 { 746 struct drm_display_mode *nmode; 747 748 nmode = drm_mode_create(dev); 749 if (!nmode) 750 return NULL; 751 752 drm_mode_copy(nmode, mode); 753 754 return nmode; 755 } 756 EXPORT_SYMBOL(drm_mode_duplicate); 757 758 /** 759 * drm_mode_equal - test modes for equality 760 * @mode1: first mode 761 * @mode2: second mode 762 * 763 * LOCKING: 764 * None. 765 * 766 * Check to see if @mode1 and @mode2 are equivalent. 767 * 768 * RETURNS: 769 * True if the modes are equal, false otherwise. 770 */ 771 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 772 { 773 /* do clock check convert to PICOS so fb modes get matched 774 * the same */ 775 if (mode1->clock && mode2->clock) { 776 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 777 return false; 778 } else if (mode1->clock != mode2->clock) 779 return false; 780 781 if (mode1->hdisplay == mode2->hdisplay && 782 mode1->hsync_start == mode2->hsync_start && 783 mode1->hsync_end == mode2->hsync_end && 784 mode1->htotal == mode2->htotal && 785 mode1->hskew == mode2->hskew && 786 mode1->vdisplay == mode2->vdisplay && 787 mode1->vsync_start == mode2->vsync_start && 788 mode1->vsync_end == mode2->vsync_end && 789 mode1->vtotal == mode2->vtotal && 790 mode1->vscan == mode2->vscan && 791 mode1->flags == mode2->flags) 792 return true; 793 794 return false; 795 } 796 EXPORT_SYMBOL(drm_mode_equal); 797 798 /** 799 * drm_mode_validate_size - make sure modes adhere to size constraints 800 * @dev: DRM device 801 * @mode_list: list of modes to check 802 * @maxX: maximum width 803 * @maxY: maximum height 804 * @maxPitch: max pitch 805 * 806 * LOCKING: 807 * Caller must hold a lock protecting @mode_list. 808 * 809 * The DRM device (@dev) has size and pitch limits. Here we validate the 810 * modes we probed for @dev against those limits and set their status as 811 * necessary. 812 */ 813 void drm_mode_validate_size(struct drm_device *dev, 814 struct list_head *mode_list, 815 int maxX, int maxY, int maxPitch) 816 { 817 struct drm_display_mode *mode; 818 819 list_for_each_entry(mode, mode_list, head) { 820 if (maxPitch > 0 && mode->hdisplay > maxPitch) 821 mode->status = MODE_BAD_WIDTH; 822 823 if (maxX > 0 && mode->hdisplay > maxX) 824 mode->status = MODE_VIRTUAL_X; 825 826 if (maxY > 0 && mode->vdisplay > maxY) 827 mode->status = MODE_VIRTUAL_Y; 828 } 829 } 830 EXPORT_SYMBOL(drm_mode_validate_size); 831 832 /** 833 * drm_mode_validate_clocks - validate modes against clock limits 834 * @dev: DRM device 835 * @mode_list: list of modes to check 836 * @min: minimum clock rate array 837 * @max: maximum clock rate array 838 * @n_ranges: number of clock ranges (size of arrays) 839 * 840 * LOCKING: 841 * Caller must hold a lock protecting @mode_list. 842 * 843 * Some code may need to check a mode list against the clock limits of the 844 * device in question. This function walks the mode list, testing to make 845 * sure each mode falls within a given range (defined by @min and @max 846 * arrays) and sets @mode->status as needed. 847 */ 848 void drm_mode_validate_clocks(struct drm_device *dev, 849 struct list_head *mode_list, 850 int *min, int *max, int n_ranges) 851 { 852 struct drm_display_mode *mode; 853 int i; 854 855 list_for_each_entry(mode, mode_list, head) { 856 bool good = false; 857 for (i = 0; i < n_ranges; i++) { 858 if (mode->clock >= min[i] && mode->clock <= max[i]) { 859 good = true; 860 break; 861 } 862 } 863 if (!good) 864 mode->status = MODE_CLOCK_RANGE; 865 } 866 } 867 EXPORT_SYMBOL(drm_mode_validate_clocks); 868 869 /** 870 * drm_mode_prune_invalid - remove invalid modes from mode list 871 * @dev: DRM device 872 * @mode_list: list of modes to check 873 * @verbose: be verbose about it 874 * 875 * LOCKING: 876 * Caller must hold a lock protecting @mode_list. 877 * 878 * Once mode list generation is complete, a caller can use this routine to 879 * remove invalid modes from a mode list. If any of the modes have a 880 * status other than %MODE_OK, they are removed from @mode_list and freed. 881 */ 882 void drm_mode_prune_invalid(struct drm_device *dev, 883 struct list_head *mode_list, bool verbose) 884 { 885 struct drm_display_mode *mode, *t; 886 887 list_for_each_entry_safe(mode, t, mode_list, head) { 888 if (mode->status != MODE_OK) { 889 list_del(&mode->head); 890 if (verbose) { 891 drm_mode_debug_printmodeline(mode); 892 DRM_DEBUG_KMS("Not using %s mode %d\n", 893 mode->name, mode->status); 894 } 895 drm_mode_destroy(dev, mode); 896 } 897 } 898 } 899 EXPORT_SYMBOL(drm_mode_prune_invalid); 900 901 /** 902 * drm_mode_compare - compare modes for favorability 903 * @priv: unused 904 * @lh_a: list_head for first mode 905 * @lh_b: list_head for second mode 906 * 907 * LOCKING: 908 * None. 909 * 910 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 911 * which is better. 912 * 913 * RETURNS: 914 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 915 * positive if @lh_b is better than @lh_a. 916 */ 917 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 918 { 919 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 920 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 921 int diff; 922 923 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 924 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 925 if (diff) 926 return diff; 927 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 928 if (diff) 929 return diff; 930 931 diff = b->vrefresh - a->vrefresh; 932 if (diff) 933 return diff; 934 935 diff = b->clock - a->clock; 936 return diff; 937 } 938 939 /** 940 * drm_mode_sort - sort mode list 941 * @mode_list: list to sort 942 * 943 * LOCKING: 944 * Caller must hold a lock protecting @mode_list. 945 * 946 * Sort @mode_list by favorability, putting good modes first. 947 */ 948 void drm_mode_sort(struct list_head *mode_list) 949 { 950 drm_list_sort(NULL, mode_list, drm_mode_compare); 951 } 952 EXPORT_SYMBOL(drm_mode_sort); 953 954 /** 955 * drm_mode_connector_list_update - update the mode list for the connector 956 * @connector: the connector to update 957 * 958 * LOCKING: 959 * Caller must hold a lock protecting @mode_list. 960 * 961 * This moves the modes from the @connector probed_modes list 962 * to the actual mode list. It compares the probed mode against the current 963 * list and only adds different modes. All modes unverified after this point 964 * will be removed by the prune invalid modes. 965 */ 966 void drm_mode_connector_list_update(struct drm_connector *connector) 967 { 968 struct drm_display_mode *mode; 969 struct drm_display_mode *pmode, *pt; 970 int found_it; 971 972 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 973 head) { 974 found_it = 0; 975 /* go through current modes checking for the new probed mode */ 976 list_for_each_entry(mode, &connector->modes, head) { 977 if (drm_mode_equal(pmode, mode)) { 978 found_it = 1; 979 /* if equal delete the probed mode */ 980 mode->status = pmode->status; 981 /* Merge type bits together */ 982 mode->type |= pmode->type; 983 list_del(&pmode->head); 984 drm_mode_destroy(connector->dev, pmode); 985 break; 986 } 987 } 988 989 if (!found_it) { 990 list_move_tail(&pmode->head, &connector->modes); 991 } 992 } 993 } 994 EXPORT_SYMBOL(drm_mode_connector_list_update); 995 996 /** 997 * drm_mode_parse_command_line_for_connector - parse command line for connector 998 * @mode_option - per connector mode option 999 * @connector - connector to parse line for 1000 * 1001 * This parses the connector specific then generic command lines for 1002 * modes and options to configure the connector. 1003 * 1004 * This uses the same parameters as the fb modedb.c, except for extra 1005 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1006 * 1007 * enable/enable Digital/disable bit at the end 1008 */ 1009 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1010 struct drm_connector *connector, 1011 struct drm_cmdline_mode *mode) 1012 { 1013 const char *name; 1014 unsigned int namelen; 1015 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1016 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1017 bool yres_specified = false, cvt = false, rb = false; 1018 bool interlace = false, margins = false, was_digit = false; 1019 int i; 1020 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1021 1022 #ifdef CONFIG_FB 1023 if (!mode_option) 1024 mode_option = fb_mode_option; 1025 #endif 1026 1027 if (!mode_option) { 1028 mode->specified = false; 1029 return false; 1030 } 1031 1032 name = mode_option; 1033 namelen = strlen(name); 1034 for (i = namelen-1; i >= 0; i--) { 1035 switch (name[i]) { 1036 case '@': 1037 if (!refresh_specified && !bpp_specified && 1038 !yres_specified && !cvt && !rb && was_digit) { 1039 refresh = simple_strtol(&name[i+1], NULL, 10); 1040 refresh_specified = true; 1041 was_digit = false; 1042 } else 1043 goto done; 1044 break; 1045 case '-': 1046 if (!bpp_specified && !yres_specified && !cvt && 1047 !rb && was_digit) { 1048 bpp = simple_strtol(&name[i+1], NULL, 10); 1049 bpp_specified = true; 1050 was_digit = false; 1051 } else 1052 goto done; 1053 break; 1054 case 'x': 1055 if (!yres_specified && was_digit) { 1056 yres = simple_strtol(&name[i+1], NULL, 10); 1057 yres_specified = true; 1058 was_digit = false; 1059 } else 1060 goto done; 1061 case '' ... '9': 1062 was_digit = true; 1063 break; 1064 case 'M': 1065 if (yres_specified || cvt || was_digit) 1066 goto done; 1067 cvt = true; 1068 break; 1069 case 'R': 1070 if (yres_specified || cvt || rb || was_digit) 1071 goto done; 1072 rb = true; 1073 break; 1074 case 'm': 1075 if (cvt || yres_specified || was_digit) 1076 goto done; 1077 margins = true; 1078 break; 1079 case 'i': 1080 if (cvt || yres_specified || was_digit) 1081 goto done; 1082 interlace = true; 1083 break; 1084 case 'e': 1085 if (yres_specified || bpp_specified || refresh_specified || 1086 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1087 goto done; 1088 1089 force = DRM_FORCE_ON; 1090 break; 1091 case 'D': 1092 if (yres_specified || bpp_specified || refresh_specified || 1093 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1094 goto done; 1095 1096 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1097 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1098 force = DRM_FORCE_ON; 1099 else 1100 force = DRM_FORCE_ON_DIGITAL; 1101 break; 1102 case 'd': 1103 if (yres_specified || bpp_specified || refresh_specified || 1104 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1105 goto done; 1106 1107 force = DRM_FORCE_OFF; 1108 break; 1109 default: 1110 goto done; 1111 } 1112 } 1113 1114 if (i < 0 && yres_specified) { 1115 char *ch; 1116 xres = simple_strtol(name, &ch, 10); 1117 if ((ch != NULL) && (*ch == 'x')) 1118 res_specified = true; 1119 else 1120 i = ch - name; 1121 } else if (!yres_specified && was_digit) { 1122 /* catch mode that begins with digits but has no 'x' */ 1123 i = 0; 1124 } 1125 done: 1126 if (i >= 0) { 1127 DRM_WARNING( 1128 "parse error at position %i in video mode '%s'\n", 1129 i, name); 1130 mode->specified = false; 1131 return false; 1132 } 1133 1134 if (res_specified) { 1135 mode->specified = true; 1136 mode->xres = xres; 1137 mode->yres = yres; 1138 } 1139 1140 if (refresh_specified) { 1141 mode->refresh_specified = true; 1142 mode->refresh = refresh; 1143 } 1144 1145 if (bpp_specified) { 1146 mode->bpp_specified = true; 1147 mode->bpp = bpp; 1148 } 1149 mode->rb = rb; 1150 mode->cvt = cvt; 1151 mode->interlace = interlace; 1152 mode->margins = margins; 1153 mode->force = force; 1154 1155 return true; 1156 } 1157 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1158 1159 struct drm_display_mode * 1160 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1161 struct drm_cmdline_mode *cmd) 1162 { 1163 struct drm_display_mode *mode; 1164 1165 if (cmd->cvt) 1166 mode = drm_cvt_mode(dev, 1167 cmd->xres, cmd->yres, 1168 cmd->refresh_specified ? cmd->refresh : 60, 1169 cmd->rb, cmd->interlace, 1170 cmd->margins); 1171 else 1172 mode = drm_gtf_mode(dev, 1173 cmd->xres, cmd->yres, 1174 cmd->refresh_specified ? cmd->refresh : 60, 1175 cmd->interlace, 1176 cmd->margins); 1177 if (!mode) 1178 return NULL; 1179 1180 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1181 return mode; 1182 } 1183 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
Cache object: d48eaa77d2065f15913aaae55ec7dd63
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