1 /*-
2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
7 * ("CTSRD"), as part of the DARPA CRASH research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: releng/12.0/sys/dev/dwc/if_dwcvar.h 298816 2016-04-29 21:46:43Z jmcneill $
31 */
32
33 /*
34 * Ethernet media access controller (EMAC)
35 * Chapter 17, Altera Cyclone V Device Handbook (CV-5V2 2014.07.22)
36 *
37 * EMAC is an instance of the Synopsys DesignWare 3504-0
38 * Universal 10/100/1000 Ethernet MAC (DWC_gmac).
39 */
40
41 #ifndef __IF_DWCVAR_H__
42 #define __IF_DWCVAR_H__
43
44 /*
45 * Driver data and defines.
46 */
47 #define RX_MAX_PACKET 0x7ff
48 #define RX_DESC_COUNT 1024
49 #define RX_DESC_SIZE (sizeof(struct dwc_hwdesc) * RX_DESC_COUNT)
50 #define TX_DESC_COUNT 1024
51 #define TX_DESC_SIZE (sizeof(struct dwc_hwdesc) * TX_DESC_COUNT)
52
53 struct dwc_bufmap {
54 bus_dmamap_t map;
55 struct mbuf *mbuf;
56 };
57
58 struct dwc_softc {
59 struct resource *res[2];
60 bus_space_tag_t bst;
61 bus_space_handle_t bsh;
62 device_t dev;
63 int mactype;
64 int mii_clk;
65 device_t miibus;
66 struct mii_data * mii_softc;
67 struct ifnet *ifp;
68 int if_flags;
69 struct mtx mtx;
70 void * intr_cookie;
71 struct callout dwc_callout;
72 boolean_t link_is_up;
73 boolean_t is_attached;
74 boolean_t is_detaching;
75 int tx_watchdog_count;
76 int stats_harvest_count;
77
78 /* RX */
79 bus_dma_tag_t rxdesc_tag;
80 bus_dmamap_t rxdesc_map;
81 struct dwc_hwdesc *rxdesc_ring;
82 bus_addr_t rxdesc_ring_paddr;
83 bus_dma_tag_t rxbuf_tag;
84 struct dwc_bufmap rxbuf_map[RX_DESC_COUNT];
85 uint32_t rx_idx;
86
87 /* TX */
88 bus_dma_tag_t txdesc_tag;
89 bus_dmamap_t txdesc_map;
90 struct dwc_hwdesc *txdesc_ring;
91 bus_addr_t txdesc_ring_paddr;
92 bus_dma_tag_t txbuf_tag;
93 struct dwc_bufmap txbuf_map[TX_DESC_COUNT];
94 uint32_t tx_idx_head;
95 uint32_t tx_idx_tail;
96 int txcount;
97 };
98
99 #endif /* __IF_DWCVAR_H__ */
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