FreeBSD/Linux Kernel Cross Reference
sys/dev/e1000/e1000_osdep.c

     /******************************************************************************
       SPDX-License-Identifier: BSD-3-Clause
     
       Copyright (c) 2001-2020, Intel Corporation
       All rights reserved.
     
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       3. Neither the name of the Intel Corporation nor the names of its
          contributors may be used to endorse or promote products derived from
          this software without specific prior written permission.
    
      THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
      AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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      ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
      LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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    ******************************************************************************/
    /*$FreeBSD$*/
    
    #include "e1000_api.h"
    
    /*
     * NOTE: the following routines using the e1000 
     *      naming style are provided to the shared
     *      code but are OS specific
     */
    
    void
    e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
    {
            pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);
    }
    
    void
    e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
    {
            *value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);
    }
    
    void
    e1000_pci_set_mwi(struct e1000_hw *hw)
    {
            pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
                (hw->bus.pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
    }
    
    void
    e1000_pci_clear_mwi(struct e1000_hw *hw)
    {
            pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
                (hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
    }
    
    /*
     * Read the PCI Express capabilities
     */
    int32_t
    e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
    {
            device_t dev = ((struct e1000_osdep *)hw->back)->dev;
            u32     offset;
    
            pci_find_cap(dev, PCIY_EXPRESS, &offset);
            *value = pci_read_config(dev, offset + reg, 2);
            return (E1000_SUCCESS);
    }
    
    /*
     * Write the PCI Express capabilities
     */
    int32_t
    e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
    {
            device_t dev = ((struct e1000_osdep *)hw->back)->dev;
            u32     offset;
    
            pci_find_cap(dev, PCIY_EXPRESS, &offset);
            pci_write_config(dev, offset + reg, *value, 2);
            return (E1000_SUCCESS);
    }

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