FreeBSD/Linux Kernel Cross Reference
sys/dev/e1000/if_em.h
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2016 Nicole Graziano <nicole@nextbsd.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 /*$FreeBSD$*/
30
31 #ifndef _EM_H_DEFINED_
32 #define _EM_H_DEFINED_
33
34 #include "opt_ddb.h"
35 #include "opt_inet.h"
36 #include "opt_inet6.h"
37 #include "opt_rss.h"
38
39 #ifdef HAVE_KERNEL_OPTION_HEADERS
40 #include "opt_device_polling.h"
41 #endif
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #ifdef DDB
46 #include <sys/types.h>
47 #include <ddb/ddb.h>
48 #endif
49 #include <sys/buf_ring.h>
50 #include <sys/bus.h>
51 #include <sys/endian.h>
52 #include <sys/kernel.h>
53 #include <sys/kthread.h>
54 #include <sys/malloc.h>
55 #include <sys/mbuf.h>
56 #include <sys/module.h>
57 #include <sys/rman.h>
58 #include <sys/smp.h>
59 #include <sys/socket.h>
60 #include <sys/sockio.h>
61 #include <sys/sysctl.h>
62 #include <sys/taskqueue.h>
63 #include <sys/eventhandler.h>
64 #include <machine/bus.h>
65 #include <machine/resource.h>
66
67 #include <net/bpf.h>
68 #include <net/ethernet.h>
69 #include <net/if.h>
70 #include <net/if_var.h>
71 #include <net/if_arp.h>
72 #include <net/if_dl.h>
73 #include <net/if_media.h>
74 #include <net/iflib.h>
75 #ifdef RSS
76 #include <net/rss_config.h>
77 #include <netinet/in_rss.h>
78 #endif
79
80 #include <net/if_types.h>
81 #include <net/if_vlan_var.h>
82
83 #include <netinet/in_systm.h>
84 #include <netinet/in.h>
85 #include <netinet/if_ether.h>
86 #include <netinet/ip.h>
87 #include <netinet/ip6.h>
88 #include <netinet/tcp.h>
89 #include <netinet/udp.h>
90
91 #include <machine/in_cksum.h>
92 #include <dev/led/led.h>
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95
96 #include "e1000_api.h"
97 #include "e1000_82571.h"
98 #include "ifdi_if.h"
99
100 /* Tunables */
101
102 /*
103 * EM_MAX_TXD: Maximum number of Transmit Descriptors
104 * Valid Range: 80-256 for 82542 and 82543-based adapters
105 * 80-4096 for others
106 * Default Value: 1024
107 * This value is the number of transmit descriptors allocated by the driver.
108 * Increasing this value allows the driver to queue more transmits. Each
109 * descriptor is 16 bytes.
110 * Since TDLEN should be multiple of 128bytes, the number of transmit
111 * desscriptors should meet the following condition.
112 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
113 */
114 #define EM_MIN_TXD 128
115 #define EM_MAX_TXD 4096
116 #define EM_DEFAULT_TXD 1024
117 #define EM_DEFAULT_MULTI_TXD 4096
118 #define IGB_MAX_TXD 4096
119
120 /*
121 * EM_MAX_RXD - Maximum number of receive Descriptors
122 * Valid Range: 80-256 for 82542 and 82543-based adapters
123 * 80-4096 for others
124 * Default Value: 1024
125 * This value is the number of receive descriptors allocated by the driver.
126 * Increasing this value allows the driver to buffer more incoming packets.
127 * Each descriptor is 16 bytes. A receive buffer is also allocated for each
128 * descriptor. The maximum MTU size is 16110.
129 * Since TDLEN should be multiple of 128bytes, the number of transmit
130 * desscriptors should meet the following condition.
131 * (num_tx_desc * sizeof(struct e1000_tx_desc)) % 128 == 0
132 */
133 #define EM_MIN_RXD 128
134 #define EM_MAX_RXD 4096
135 #define EM_DEFAULT_RXD 1024
136 #define EM_DEFAULT_MULTI_RXD 4096
137 #define IGB_MAX_RXD 4096
138
139 /*
140 * EM_TIDV - Transmit Interrupt Delay Value
141 * Valid Range: 0-65535 (0=off)
142 * Default Value: 64
143 * This value delays the generation of transmit interrupts in units of
144 * 1.024 microseconds. Transmit interrupt reduction can improve CPU
145 * efficiency if properly tuned for specific network traffic. If the
146 * system is reporting dropped transmits, this value may be set too high
147 * causing the driver to run out of available transmit descriptors.
148 */
149 #define EM_TIDV 64
150
151 /*
152 * EM_TADV - Transmit Absolute Interrupt Delay Value
153 * (Not valid for 82542/82543/82544)
154 * Valid Range: 0-65535 (0=off)
155 * Default Value: 64
156 * This value, in units of 1.024 microseconds, limits the delay in which a
157 * transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
158 * this value ensures that an interrupt is generated after the initial
159 * packet is sent on the wire within the set amount of time. Proper tuning,
160 * along with EM_TIDV, may improve traffic throughput in specific
161 * network conditions.
162 */
163 #define EM_TADV 64
164
165 /*
166 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
167 * Valid Range: 0-65535 (0=off)
168 * Default Value: 0
169 * This value delays the generation of receive interrupts in units of 1.024
170 * microseconds. Receive interrupt reduction can improve CPU efficiency if
171 * properly tuned for specific network traffic. Increasing this value adds
172 * extra latency to frame reception and can end up decreasing the throughput
173 * of TCP traffic. If the system is reporting dropped receives, this value
174 * may be set too high, causing the driver to run out of available receive
175 * descriptors.
176 *
177 * CAUTION: When setting EM_RDTR to a value other than 0, adapters
178 * may hang (stop transmitting) under certain network conditions.
179 * If this occurs a WATCHDOG message is logged in the system
180 * event log. In addition, the controller is automatically reset,
181 * restoring the network connection. To eliminate the potential
182 * for the hang ensure that EM_RDTR is set to 0.
183 */
184 #define EM_RDTR 0
185
186 /*
187 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
188 * Valid Range: 0-65535 (0=off)
189 * Default Value: 64
190 * This value, in units of 1.024 microseconds, limits the delay in which a
191 * receive interrupt is generated. Useful only if EM_RDTR is non-zero,
192 * this value ensures that an interrupt is generated after the initial
193 * packet is received within the set amount of time. Proper tuning,
194 * along with EM_RDTR, may improve traffic throughput in specific network
195 * conditions.
196 */
197 #define EM_RADV 64
198
199 /*
200 * This parameter controls whether or not autonegotiation is enabled.
201 * 0 - Disable autonegotiation
202 * 1 - Enable autonegotiation
203 */
204 #define DO_AUTO_NEG 1
205
206 /*
207 * This parameter control whether or not the driver will wait for
208 * autonegotiation to complete.
209 * 1 - Wait for autonegotiation to complete
210 * 0 - Don't wait for autonegotiation to complete
211 */
212 #define WAIT_FOR_AUTO_NEG_DEFAULT 0
213
214 /* Tunables -- End */
215
216 #define AUTONEG_ADV_DEFAULT (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
217 ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
218 ADVERTISE_1000_FULL)
219
220 #define AUTO_ALL_MODES 0
221
222 /* PHY master/slave setting */
223 #define EM_MASTER_SLAVE e1000_ms_hw_default
224
225 /*
226 * Miscellaneous constants
227 */
228 #define EM_VENDOR_ID 0x8086
229 #define EM_FLASH 0x0014
230
231 #define EM_JUMBO_PBA 0x00000028
232 #define EM_DEFAULT_PBA 0x00000030
233 #define EM_SMARTSPEED_DOWNSHIFT 3
234 #define EM_SMARTSPEED_MAX 15
235 #define EM_MAX_LOOP 10
236
237 #define MAX_NUM_MULTICAST_ADDRESSES 128
238 #define PCI_ANY_ID (~0U)
239 #define ETHER_ALIGN 2
240 #define EM_FC_PAUSE_TIME 0x0680
241 #define EM_EEPROM_APME 0x400;
242 #define EM_82544_APME 0x0004;
243
244 /* Support AutoMediaDetect for Marvell M88 PHY in i354 */
245 #define IGB_MEDIA_RESET (1 << 0)
246
247 /* Define the starting Interrupt rate per Queue */
248 #define IGB_INTS_PER_SEC 8000
249 #define IGB_DEFAULT_ITR ((1000000/IGB_INTS_PER_SEC) << 2)
250
251 #define IGB_LINK_ITR 2000
252 #define I210_LINK_DELAY 1000
253
254 #define IGB_TXPBSIZE 20408
255 #define IGB_HDR_BUF 128
256 #define IGB_PKTTYPE_MASK 0x0000FFF0
257 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
258
259 /*
260 * Driver state logic for the detection of a hung state
261 * in hardware. Set TX_HUNG whenever a TX packet is used
262 * (data is sent) and clear it when txeof() is invoked if
263 * any descriptors from the ring are cleaned/reclaimed.
264 * Increment internal counter if no descriptors are cleaned
265 * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES,
266 * reset adapter.
267 */
268 #define EM_TX_IDLE 0x00000000
269 #define EM_TX_BUSY 0x00000001
270 #define EM_TX_HUNG 0x80000000
271 #define EM_TX_MAXTRIES 10
272
273 #define PCICFG_DESC_RING_STATUS 0xe4
274 #define FLUSH_DESC_REQUIRED 0x100
275
276
277 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : \
278 ((hw->mac.type <= e1000_82576) ? 16 : 8))
279 #define IGB_RX_HTHRESH 8
280 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
281 (sc->intr_type == IFLIB_INTR_MSIX)) ? 1 : 4)
282
283 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
284 #define IGB_TX_HTHRESH 1
285 #define IGB_TX_WTHRESH ((hw->mac.type != e1000_82575 && \
286 sc->intr_type == IFLIB_INTR_MSIX) ? 1 : 16)
287
288 /*
289 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
290 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary. This will
291 * also optimize cache line size effect. H/W supports up to cache line size 128.
292 */
293 #define EM_DBA_ALIGN 128
294
295 /*
296 * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9
297 */
298 #define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */
299 #define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */
300 #define TARC_MQ_FIX (1 << 23) | \
301 (1 << 24) | \
302 (1 << 25) /* Handle errata in MQ mode */
303 #define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */
304
305 /* PCI Config defines */
306 #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK)
307 #define EM_BAR_TYPE_MASK 0x00000001
308 #define EM_BAR_TYPE_MMEM 0x00000000
309 #define EM_BAR_TYPE_IO 0x00000001
310 #define EM_BAR_TYPE_FLASH 0x0014
311 #define EM_BAR_MEM_TYPE(v) ((v) & EM_BAR_MEM_TYPE_MASK)
312 #define EM_BAR_MEM_TYPE_MASK 0x00000006
313 #define EM_BAR_MEM_TYPE_32BIT 0x00000000
314 #define EM_BAR_MEM_TYPE_64BIT 0x00000004
315
316 /* Defines for printing debug information */
317 #define DEBUG_INIT 0
318 #define DEBUG_IOCTL 0
319 #define DEBUG_HW 0
320
321 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
322 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
323 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
324 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
325 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
326 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
327 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
328 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
329 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
330
331 #define EM_MAX_SCATTER 40
332 #define EM_VFTA_SIZE 128
333 #define EM_TSO_SIZE 65535
334 #define EM_TSO_SEG_SIZE 4096 /* Max dma segment size */
335 #define ETH_ZLEN 60
336 #define EM_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP) /* Offload bits in mbuf flag */
337 #define IGB_CSUM_OFFLOAD (CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP | \
338 CSUM_IP_SCTP | CSUM_IP6_UDP | CSUM_IP6_TCP | \
339 CSUM_IP6_SCTP) /* Offload bits in mbuf flag */
340
341 #define IGB_PKTTYPE_MASK 0x0000FFF0
342 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000 /* Disable DMA Coalesce Flush */
343
344 /*
345 * 82574 has a nonstandard address for EIAC
346 * and since its only used in MSI-X, and in
347 * the em driver only 82574 uses MSI-X we can
348 * solve it just using this define.
349 */
350 #define EM_EIAC 0x000DC
351 /*
352 * 82574 only reports 3 MSI-X vectors by default;
353 * defines assisting with making it report 5 are
354 * located here.
355 */
356 #define EM_NVM_PCIE_CTRL 0x1B
357 #define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT)
358 #define EM_NVM_MSIX_N_SHIFT 7
359
360 struct e1000_softc;
361
362 struct em_int_delay_info {
363 struct e1000_softc *sc; /* Back-pointer to the sc struct */
364 int offset; /* Register offset to read/write */
365 int value; /* Current value in usecs */
366 };
367
368 /*
369 * The transmit ring, one per tx queue
370 */
371 struct tx_ring {
372 struct e1000_softc *sc;
373 struct e1000_tx_desc *tx_base;
374 uint64_t tx_paddr;
375 qidx_t *tx_rsq;
376 bool tx_tso; /* last tx was tso */
377 uint8_t me;
378 qidx_t tx_rs_cidx;
379 qidx_t tx_rs_pidx;
380 qidx_t tx_cidx_processed;
381 /* Interrupt resources */
382 void *tag;
383 struct resource *res;
384 unsigned long tx_irq;
385
386 /* Saved csum offloading context information */
387 int csum_flags;
388 int csum_lhlen;
389 int csum_iphlen;
390
391 int csum_thlen;
392 int csum_mss;
393 int csum_pktlen;
394
395 uint32_t csum_txd_upper;
396 uint32_t csum_txd_lower; /* last field */
397 };
398
399 /*
400 * The Receive ring, one per rx queue
401 */
402 struct rx_ring {
403 struct e1000_softc *sc;
404 struct em_rx_queue *que;
405 u32 me;
406 u32 payload;
407 union e1000_rx_desc_extended *rx_base;
408 uint64_t rx_paddr;
409
410 /* Interrupt resources */
411 void *tag;
412 struct resource *res;
413 bool discard;
414
415 /* Soft stats */
416 unsigned long rx_irq;
417 unsigned long rx_discarded;
418 unsigned long rx_packets;
419 unsigned long rx_bytes;
420 };
421
422 struct em_tx_queue {
423 struct e1000_softc *sc;
424 u32 msix;
425 u32 eims; /* This queue's EIMS bit */
426 u32 me;
427 struct tx_ring txr;
428 };
429
430 struct em_rx_queue {
431 struct e1000_softc *sc;
432 u32 me;
433 u32 msix;
434 u32 eims;
435 struct rx_ring rxr;
436 u64 irqs;
437 struct if_irq que_irq;
438 };
439
440 /* Our softc structure */
441 struct e1000_softc {
442 struct e1000_hw hw;
443
444 if_softc_ctx_t shared;
445 if_ctx_t ctx;
446 #define tx_num_queues shared->isc_ntxqsets
447 #define rx_num_queues shared->isc_nrxqsets
448 #define intr_type shared->isc_intr
449 /* FreeBSD operating-system-specific structures. */
450 struct e1000_osdep osdep;
451 device_t dev;
452 struct cdev *led_dev;
453
454 struct em_tx_queue *tx_queues;
455 struct em_rx_queue *rx_queues;
456 struct if_irq irq;
457
458 struct resource *memory;
459 struct resource *flash;
460 struct resource *ioport;
461
462 struct resource *res;
463 void *tag;
464 u32 linkvec;
465 u32 ivars;
466
467 struct ifmedia *media;
468 int msix;
469 int if_flags;
470 int em_insert_vlan_header;
471 u32 ims;
472 bool in_detach;
473
474 u32 flags;
475 /* Task for FAST handling */
476 struct grouptask link_task;
477
478 u16 num_vlans;
479 u32 txd_cmd;
480
481 u32 tx_process_limit;
482 u32 rx_process_limit;
483 u32 rx_mbuf_sz;
484
485 /* Management and WOL features */
486 u32 wol;
487 bool has_manage;
488 bool has_amt;
489
490 /* Multicast array memory */
491 u8 *mta;
492
493 /*
494 ** Shadow VFTA table, this is needed because
495 ** the real vlan filter table gets cleared during
496 ** a soft reset and the driver needs to be able
497 ** to repopulate it.
498 */
499 u32 shadow_vfta[EM_VFTA_SIZE];
500
501 /* Info about the interface */
502 u16 link_active;
503 u16 fc;
504 u16 link_speed;
505 u16 link_duplex;
506 u32 smartspeed;
507 u32 dmac;
508 int link_mask;
509
510 u64 que_mask;
511
512 /* We need to store this at attach due to e1000 hw/sw locking model */
513 struct e1000_fw_version fw_ver;
514
515 struct em_int_delay_info tx_int_delay;
516 struct em_int_delay_info tx_abs_int_delay;
517 struct em_int_delay_info rx_int_delay;
518 struct em_int_delay_info rx_abs_int_delay;
519 struct em_int_delay_info tx_itr;
520
521 /* Misc stats maintained by the driver */
522 unsigned long dropped_pkts;
523 unsigned long link_irq;
524 unsigned long rx_overruns;
525 unsigned long watchdog_events;
526
527 struct e1000_hw_stats stats;
528 u16 vf_ifp;
529 };
530
531 /********************************************************************************
532 * vendor_info_array
533 *
534 * This array contains the list of Subvendor/Subdevice IDs on which the driver
535 * should load.
536 *
537 ********************************************************************************/
538 typedef struct _em_vendor_info_t {
539 unsigned int vendor_id;
540 unsigned int device_id;
541 unsigned int subvendor_id;
542 unsigned int subdevice_id;
543 unsigned int index;
544 } em_vendor_info_t;
545
546 void em_dump_rs(struct e1000_softc *);
547
548 #define EM_RSSRK_SIZE 4
549 #define EM_RSSRK_VAL(key, i) (key[(i) * EM_RSSRK_SIZE] | \
550 key[(i) * EM_RSSRK_SIZE + 1] << 8 | \
551 key[(i) * EM_RSSRK_SIZE + 2] << 16 | \
552 key[(i) * EM_RSSRK_SIZE + 3] << 24)
553 #endif /* _EM_H_DEFINED_ */
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