FreeBSD/Linux Kernel Cross Reference
sys/dev/ed/if_ed.c
1 /*-
2 * Copyright (c) 1995, David Greenman
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 /*
32 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
33 * adapters. By David Greenman, 29-April-1993
34 *
35 * Currently supports the Western Digital/SMC 8003 and 8013 series,
36 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
37 * and a variety of similar clones.
38 *
39 */
40
41 #include "opt_ed.h"
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/sockio.h>
46 #include <sys/mbuf.h>
47 #include <sys/kernel.h>
48 #include <sys/socket.h>
49 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
51
52 #include <sys/bus.h>
53
54 #include <machine/bus.h>
55 #include <sys/rman.h>
56 #include <machine/resource.h>
57
58 #include <net/ethernet.h>
59 #include <net/if.h>
60 #include <net/if_arp.h>
61 #include <net/if_dl.h>
62 #include <net/if_mib.h>
63 #include <net/if_media.h>
64 #include <net/if_types.h>
65
66 #include <net/bpf.h>
67
68 #include <dev/ed/if_edreg.h>
69 #include <dev/ed/if_edvar.h>
70 #include <sys/kdb.h>
71
72 devclass_t ed_devclass;
73
74 static void ed_init(void *);
75 static void ed_init_locked(struct ed_softc *);
76 static int ed_ioctl(struct ifnet *, u_long, caddr_t);
77 static void ed_start(struct ifnet *);
78 static void ed_start_locked(struct ifnet *);
79 static void ed_reset(struct ifnet *);
80 static void ed_watchdog(struct ifnet *);
81
82 static void ed_ds_getmcaf(struct ed_softc *, uint32_t *);
83
84 static void ed_get_packet(struct ed_softc *, bus_size_t, u_short);
85 static void ed_stop_hw(struct ed_softc *sc);
86
87 static __inline void ed_rint(struct ed_softc *);
88 static __inline void ed_xmit(struct ed_softc *);
89 static __inline void ed_ring_copy(struct ed_softc *, bus_size_t, char *,
90 u_short);
91
92 static void ed_setrcr(struct ed_softc *);
93
94 /*
95 * Generic probe routine for testing for the existance of a DS8390.
96 * Must be called after the NIC has just been reset. This routine
97 * works by looking at certain register values that are guaranteed
98 * to be initialized a certain way after power-up or reset. Seems
99 * not to currently work on the 83C690.
100 *
101 * Specifically:
102 *
103 * Register reset bits set bits
104 * Command Register (CR) TXP, STA RD2, STP
105 * Interrupt Status (ISR) RST
106 * Interrupt Mask (IMR) All bits
107 * Data Control (DCR) LAS
108 * Transmit Config. (TCR) LB1, LB0
109 *
110 * We only look at the CR and ISR registers, however, because looking at
111 * the others would require changing register pages (which would be
112 * intrusive if this isn't an 8390).
113 *
114 * Return 1 if 8390 was found, 0 if not.
115 */
116
117 int
118 ed_probe_generic8390(struct ed_softc *sc)
119 {
120 if ((ed_nic_inb(sc, ED_P0_CR) &
121 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
122 (ED_CR_RD2 | ED_CR_STP))
123 return (0);
124 if ((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
125 return (0);
126
127 return (1);
128 }
129
130 void
131 ed_disable_16bit_access(struct ed_softc *sc)
132 {
133 /*
134 * Disable 16 bit access to shared memory
135 */
136 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
137 if (sc->chip_type == ED_CHIP_TYPE_WD790)
138 ed_asic_outb(sc, ED_WD_MSR, 0x00);
139 ed_asic_outb(sc, ED_WD_LAAR,
140 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
141 }
142 }
143
144 void
145 ed_enable_16bit_access(struct ed_softc *sc)
146 {
147 if (sc->isa16bit && sc->vendor == ED_VENDOR_WD_SMC) {
148 ed_asic_outb(sc, ED_WD_LAAR,
149 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
150 if (sc->chip_type == ED_CHIP_TYPE_WD790)
151 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
152 }
153 }
154
155 /*
156 * Allocate a port resource with the given resource id.
157 */
158 int
159 ed_alloc_port(device_t dev, int rid, int size)
160 {
161 struct ed_softc *sc = device_get_softc(dev);
162 struct resource *res;
163
164 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
165 0ul, ~0ul, size, RF_ACTIVE);
166 if (res) {
167 sc->port_res = res;
168 sc->port_used = size;
169 sc->port_bst = rman_get_bustag(res);
170 sc->port_bsh = rman_get_bushandle(res);
171 return (0);
172 }
173 return (ENOENT);
174 }
175
176 /*
177 * Allocate a memory resource with the given resource id.
178 */
179 int
180 ed_alloc_memory(device_t dev, int rid, int size)
181 {
182 struct ed_softc *sc = device_get_softc(dev);
183 struct resource *res;
184
185 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
186 0ul, ~0ul, size, RF_ACTIVE);
187 if (res) {
188 sc->mem_res = res;
189 sc->mem_used = size;
190 sc->mem_bst = rman_get_bustag(res);
191 sc->mem_bsh = rman_get_bushandle(res);
192 return (0);
193 }
194 return (ENOENT);
195 }
196
197 /*
198 * Allocate an irq resource with the given resource id.
199 */
200 int
201 ed_alloc_irq(device_t dev, int rid, int flags)
202 {
203 struct ed_softc *sc = device_get_softc(dev);
204 struct resource *res;
205
206 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags);
207 if (res) {
208 sc->irq_res = res;
209 return (0);
210 }
211 return (ENOENT);
212 }
213
214 /*
215 * Release all resources
216 */
217 void
218 ed_release_resources(device_t dev)
219 {
220 struct ed_softc *sc = device_get_softc(dev);
221
222 if (sc->port_res)
223 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res);
224 if (sc->port_res2)
225 bus_free_resource(dev, SYS_RES_IOPORT, sc->port_res2);
226 if (sc->mem_res)
227 bus_free_resource(dev, SYS_RES_MEMORY, sc->mem_res);
228 if (sc->irq_res)
229 bus_free_resource(dev, SYS_RES_IRQ, sc->irq_res);
230 sc->port_res = 0;
231 sc->port_res2 = 0;
232 sc->mem_res = 0;
233 sc->irq_res = 0;
234 if (sc->ifp)
235 if_free(sc->ifp);
236 }
237
238 /*
239 * Install interface into kernel networking data structures
240 */
241 int
242 ed_attach(device_t dev)
243 {
244 struct ed_softc *sc = device_get_softc(dev);
245 struct ifnet *ifp;
246
247 sc->dev = dev;
248 ED_LOCK_INIT(sc);
249 ifp = sc->ifp = if_alloc(IFT_ETHER);
250 if (ifp == NULL) {
251 device_printf(dev, "can not if_alloc()\n");
252 ED_LOCK_DESTROY(sc);
253 return (ENOSPC);
254 }
255
256 if (sc->readmem == NULL) {
257 if (sc->mem_shared) {
258 if (sc->isa16bit)
259 sc->readmem = ed_shmem_readmem16;
260 else
261 sc->readmem = ed_shmem_readmem8;
262 } else {
263 sc->readmem = ed_pio_readmem;
264 }
265 }
266 if (sc->sc_write_mbufs == NULL) {
267 device_printf(dev, "No write mbufs routine set\n");
268 return (ENXIO);
269 }
270
271 callout_init_mtx(&sc->tick_ch, ED_MUTEX(sc), 0);
272 /*
273 * Set interface to stopped condition (reset)
274 */
275 ed_stop_hw(sc);
276
277 /*
278 * Initialize ifnet structure
279 */
280 ifp->if_softc = sc;
281 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
282 ifp->if_start = ed_start;
283 ifp->if_ioctl = ed_ioctl;
284 ifp->if_watchdog = ed_watchdog;
285 ifp->if_init = ed_init;
286 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
287 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
288 IFQ_SET_READY(&ifp->if_snd);
289 ifp->if_linkmib = &sc->mibdata;
290 ifp->if_linkmiblen = sizeof sc->mibdata;
291 /*
292 * XXX - should do a better job.
293 */
294 if (sc->chip_type == ED_CHIP_TYPE_WD790)
295 sc->mibdata.dot3StatsEtherChipSet =
296 DOT3CHIPSET(dot3VendorWesternDigital,
297 dot3ChipSetWesternDigital83C790);
298 else
299 sc->mibdata.dot3StatsEtherChipSet =
300 DOT3CHIPSET(dot3VendorNational,
301 dot3ChipSetNational8390);
302 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
303
304 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
305 /*
306 * Set default state for LINK2 flag (used to disable the
307 * tranceiver for AUI operation), based on config option.
308 * We only set this flag before we attach the device, so there's
309 * no race. It is convenient to allow users to turn this off
310 * by default in the kernel config, but given our more advanced
311 * boot time configuration options, this might no longer be needed.
312 */
313 if (device_get_flags(dev) & ED_FLAGS_DISABLE_TRANCEIVER)
314 ifp->if_flags |= IFF_LINK2;
315
316 /*
317 * Attach the interface
318 */
319 ether_ifattach(ifp, sc->enaddr);
320 /* device attach does transition from UNCONFIGURED to IDLE state */
321
322 sc->tx_mem = sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
323 sc->rx_mem = (sc->rec_page_stop - sc->rec_page_start) * ED_PAGE_SIZE;
324 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
325 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
326 0, "type", CTLTYPE_STRING | CTLFLAG_RD, sc->type_str, 0,
327 "Type of chip in card");
328 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
329 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
330 1, "TxMem", CTLTYPE_STRING | CTLFLAG_RD, &sc->tx_mem, 0,
331 "Memory set aside for transmitting packets");
332 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
333 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
334 2, "RxMem", CTLTYPE_STRING | CTLFLAG_RD, &sc->rx_mem, 0,
335 "Memory set aside for receiving packets");
336 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
337 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
338 3, "Mem", CTLTYPE_STRING | CTLFLAG_RD, &sc->mem_size, 0,
339 "Total Card Memory");
340 if (bootverbose) {
341 if (sc->type_str && (*sc->type_str != 0))
342 device_printf(dev, "type %s ", sc->type_str);
343 else
344 device_printf(dev, "type unknown (0x%x) ", sc->type);
345
346 #ifdef ED_HPP
347 if (sc->vendor == ED_VENDOR_HP)
348 printf("(%s %s IO)",
349 (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
350 "16-bit" : "32-bit",
351 sc->hpp_mem_start ? "memory mapped" : "regular");
352 else
353 #endif
354 printf("%s", sc->isa16bit ? "(16 bit)" : "(8 bit)");
355
356 #if defined(ED_HPP) || defined(ED_3C503)
357 printf("%s", (((sc->vendor == ED_VENDOR_3COM) ||
358 (sc->vendor == ED_VENDOR_HP)) &&
359 (ifp->if_flags & IFF_LINK2)) ?
360 " tranceiver disabled" : "");
361 #endif
362 printf("\n");
363 }
364 return (0);
365 }
366
367 /*
368 * Detach the driver from the hardware and other systems in the kernel.
369 */
370 int
371 ed_detach(device_t dev)
372 {
373 struct ed_softc *sc = device_get_softc(dev);
374 struct ifnet *ifp = sc->ifp;
375
376 if (mtx_initialized(ED_MUTEX(sc)))
377 ED_ASSERT_UNLOCKED(sc);
378 if (ifp) {
379 ED_LOCK(sc);
380 if (bus_child_present(dev))
381 ed_stop(sc);
382 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
383 ED_UNLOCK(sc);
384 callout_drain(&sc->tick_ch);
385 ether_ifdetach(ifp);
386 }
387 if (sc->irq_res != NULL && sc->irq_handle)
388 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
389 ed_release_resources(dev);
390 if (sc->miibus)
391 device_delete_child(dev, sc->miibus);
392 if (mtx_initialized(ED_MUTEX(sc)))
393 ED_LOCK_DESTROY(sc);
394 bus_generic_detach(dev);
395 return (0);
396 }
397
398 /*
399 * Reset interface.
400 */
401 static void
402 ed_reset(struct ifnet *ifp)
403 {
404 struct ed_softc *sc = ifp->if_softc;
405
406 ED_ASSERT_LOCKED(sc);
407 /*
408 * Stop interface and re-initialize.
409 */
410 ed_stop(sc);
411 ed_init_locked(sc);
412 }
413
414 static void
415 ed_stop_hw(struct ed_softc *sc)
416 {
417 int n = 5000;
418
419 /*
420 * Stop everything on the interface, and select page 0 registers.
421 */
422 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
423
424 /*
425 * Wait for interface to enter stopped state, but limit # of checks to
426 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
427 * just in case it's an old one.
428 *
429 * The AX88x90 chips don't seem to implement this behavor. The
430 * datasheets say it is only turned on when the chip enters a RESET
431 * state and is silent about behavior for the stopped state we just
432 * entered.
433 */
434 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
435 sc->chip_type == ED_CHIP_TYPE_AX88790)
436 return;
437 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST) == 0) && --n)
438 continue;
439 if (n <= 0)
440 device_printf(sc->dev, "ed_stop_hw RST never set\n");
441 }
442
443 /*
444 * Take interface offline.
445 */
446 void
447 ed_stop(struct ed_softc *sc)
448 {
449 ED_ASSERT_LOCKED(sc);
450 if (sc->sc_tick)
451 callout_stop(&sc->tick_ch);
452 ed_stop_hw(sc);
453 }
454
455 /*
456 * Device timeout/watchdog routine. Entered if the device neglects to
457 * generate an interrupt after a transmit has been started on it.
458 */
459 static void
460 ed_watchdog(struct ifnet *ifp)
461 {
462 struct ed_softc *sc = ifp->if_softc;
463
464 log(LOG_ERR, "%s: device timeout\n", ifp->if_xname);
465 ifp->if_oerrors++;
466
467 ED_LOCK(sc);
468 ed_reset(ifp);
469 ED_UNLOCK(sc);
470 }
471
472 /*
473 * Initialize device.
474 */
475 static void
476 ed_init(void *xsc)
477 {
478 struct ed_softc *sc = xsc;
479
480 ED_ASSERT_UNLOCKED(sc);
481 ED_LOCK(sc);
482 ed_init_locked(sc);
483 ED_UNLOCK(sc);
484 }
485
486 static void
487 ed_init_locked(struct ed_softc *sc)
488 {
489 struct ifnet *ifp = sc->ifp;
490 int i;
491
492 ED_ASSERT_LOCKED(sc);
493
494 /*
495 * Initialize the NIC in the exact order outlined in the NS manual.
496 * This init procedure is "mandatory"...don't change what or when
497 * things happen.
498 */
499
500 /* reset transmitter flags */
501 sc->xmit_busy = 0;
502 ifp->if_timer = 0;
503
504 sc->txb_inuse = 0;
505 sc->txb_new = 0;
506 sc->txb_next_tx = 0;
507
508 /* This variable is used below - don't move this assignment */
509 sc->next_packet = sc->rec_page_start + 1;
510
511 /*
512 * Set interface for page 0, Remote DMA complete, Stopped
513 */
514 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
515
516 if (sc->isa16bit)
517 /*
518 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
519 * order=80x86, word-wide DMA xfers,
520 */
521 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
522 else
523 /*
524 * Same as above, but byte-wide DMA xfers
525 */
526 ed_nic_outb(sc, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
527
528 /*
529 * Clear Remote Byte Count Registers
530 */
531 ed_nic_outb(sc, ED_P0_RBCR0, 0);
532 ed_nic_outb(sc, ED_P0_RBCR1, 0);
533
534 /*
535 * For the moment, don't store incoming packets in memory.
536 */
537 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_MON);
538
539 /*
540 * Place NIC in internal loopback mode
541 */
542 ed_nic_outb(sc, ED_P0_TCR, ED_TCR_LB0);
543
544 /*
545 * Initialize transmit/receive (ring-buffer) Page Start
546 */
547 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start);
548 ed_nic_outb(sc, ED_P0_PSTART, sc->rec_page_start);
549 /* Set lower bits of byte addressable framing to 0 */
550 if (sc->chip_type == ED_CHIP_TYPE_WD790)
551 ed_nic_outb(sc, 0x09, 0);
552
553 /*
554 * Initialize Receiver (ring-buffer) Page Stop and Boundry
555 */
556 ed_nic_outb(sc, ED_P0_PSTOP, sc->rec_page_stop);
557 ed_nic_outb(sc, ED_P0_BNRY, sc->rec_page_start);
558
559 /*
560 * Clear all interrupts. A '1' in each bit position clears the
561 * corresponding flag.
562 */
563 ed_nic_outb(sc, ED_P0_ISR, 0xff);
564
565 /*
566 * Enable the following interrupts: receive/transmit complete,
567 * receive/transmit error, and Receiver OverWrite.
568 *
569 * Counter overflow and Remote DMA complete are *not* enabled.
570 */
571 ed_nic_outb(sc, ED_P0_IMR,
572 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
573
574 /*
575 * Program Command Register for page 1
576 */
577 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
578
579 /*
580 * Copy out our station address
581 */
582 for (i = 0; i < ETHER_ADDR_LEN; ++i)
583 ed_nic_outb(sc, ED_P1_PAR(i), IF_LLADDR(sc->ifp)[i]);
584
585 /*
586 * Set Current Page pointer to next_packet (initialized above)
587 */
588 ed_nic_outb(sc, ED_P1_CURR, sc->next_packet);
589
590 /*
591 * Program Receiver Configuration Register and multicast filter. CR is
592 * set to page 0 on return.
593 */
594 ed_setrcr(sc);
595
596 /*
597 * Take interface out of loopback
598 */
599 ed_nic_outb(sc, ED_P0_TCR, 0);
600
601 if (sc->sc_mediachg)
602 sc->sc_mediachg(sc);
603
604 /*
605 * Set 'running' flag, and clear output active flag.
606 */
607 ifp->if_drv_flags |= IFF_DRV_RUNNING;
608 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
609
610 /*
611 * ...and attempt to start output
612 */
613 ed_start_locked(ifp);
614
615 if (sc->sc_tick)
616 callout_reset(&sc->tick_ch, hz, sc->sc_tick, sc);
617 }
618
619 /*
620 * This routine actually starts the transmission on the interface
621 */
622 static __inline void
623 ed_xmit(struct ed_softc *sc)
624 {
625 struct ifnet *ifp = sc->ifp;
626 unsigned short len;
627
628 len = sc->txb_len[sc->txb_next_tx];
629
630 /*
631 * Set NIC for page 0 register access
632 */
633 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
634
635 /*
636 * Set TX buffer start page
637 */
638 ed_nic_outb(sc, ED_P0_TPSR, sc->tx_page_start +
639 sc->txb_next_tx * ED_TXBUF_SIZE);
640
641 /*
642 * Set TX length
643 */
644 ed_nic_outb(sc, ED_P0_TBCR0, len);
645 ed_nic_outb(sc, ED_P0_TBCR1, len >> 8);
646
647 /*
648 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
649 */
650 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
651 sc->xmit_busy = 1;
652
653 /*
654 * Point to next transmit buffer slot and wrap if necessary.
655 */
656 sc->txb_next_tx++;
657 if (sc->txb_next_tx == sc->txb_cnt)
658 sc->txb_next_tx = 0;
659
660 /*
661 * Set a timer just in case we never hear from the board again
662 */
663 ifp->if_timer = 2;
664 }
665
666 /*
667 * Start output on interface.
668 * We make two assumptions here:
669 * 1) that the current priority is set to splimp _before_ this code
670 * is called *and* is returned to the appropriate priority after
671 * return
672 * 2) that the IFF_DRV_OACTIVE flag is checked before this code is called
673 * (i.e. that the output part of the interface is idle)
674 */
675 static void
676 ed_start(struct ifnet *ifp)
677 {
678 struct ed_softc *sc = ifp->if_softc;
679
680 ED_ASSERT_UNLOCKED(sc);
681 ED_LOCK(sc);
682 ed_start_locked(ifp);
683 ED_UNLOCK(sc);
684 }
685
686 static void
687 ed_start_locked(struct ifnet *ifp)
688 {
689 struct ed_softc *sc = ifp->if_softc;
690 struct mbuf *m0, *m;
691 bus_size_t buffer;
692 int len;
693
694 ED_ASSERT_LOCKED(sc);
695 outloop:
696
697 /*
698 * First, see if there are buffered packets and an idle transmitter -
699 * should never happen at this point.
700 */
701 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
702 printf("ed: packets buffered, but transmitter idle\n");
703 ed_xmit(sc);
704 }
705
706 /*
707 * See if there is room to put another packet in the buffer.
708 */
709 if (sc->txb_inuse == sc->txb_cnt) {
710
711 /*
712 * No room. Indicate this to the outside world and exit.
713 */
714 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
715 return;
716 }
717 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
718 if (m == 0) {
719
720 /*
721 * We are using the !OACTIVE flag to indicate to the outside
722 * world that we can accept an additional packet rather than
723 * that the transmitter is _actually_ active. Indeed, the
724 * transmitter may be active, but if we haven't filled all the
725 * buffers with data then we still want to accept more.
726 */
727 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
728 return;
729 }
730
731 /*
732 * Copy the mbuf chain into the transmit buffer
733 */
734 m0 = m;
735
736 /* txb_new points to next open buffer slot */
737 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
738
739 len = sc->sc_write_mbufs(sc, m, buffer);
740 if (len == 0) {
741 m_freem(m0);
742 goto outloop;
743 }
744
745 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
746
747 sc->txb_inuse++;
748
749 /*
750 * Point to next buffer slot and wrap if necessary.
751 */
752 sc->txb_new++;
753 if (sc->txb_new == sc->txb_cnt)
754 sc->txb_new = 0;
755
756 if (sc->xmit_busy == 0)
757 ed_xmit(sc);
758
759 /*
760 * Tap off here if there is a bpf listener.
761 */
762 BPF_MTAP(ifp, m0);
763
764 m_freem(m0);
765
766 /*
767 * Loop back to the top to possibly buffer more packets
768 */
769 goto outloop;
770 }
771
772 /*
773 * Ethernet interface receiver interrupt.
774 */
775 static __inline void
776 ed_rint(struct ed_softc *sc)
777 {
778 struct ifnet *ifp = sc->ifp;
779 u_char boundry;
780 u_short len;
781 struct ed_ring packet_hdr;
782 bus_size_t packet_ptr;
783
784 ED_ASSERT_LOCKED(sc);
785
786 /*
787 * Set NIC to page 1 registers to get 'current' pointer
788 */
789 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
790
791 /*
792 * 'sc->next_packet' is the logical beginning of the ring-buffer -
793 * i.e. it points to where new data has been buffered. The 'CURR'
794 * (current) register points to the logical end of the ring-buffer -
795 * i.e. it points to where additional new data will be added. We loop
796 * here until the logical beginning equals the logical end (or in
797 * other words, until the ring-buffer is empty).
798 */
799 while (sc->next_packet != ed_nic_inb(sc, ED_P1_CURR)) {
800
801 /* get pointer to this buffer's header structure */
802 packet_ptr = sc->mem_ring +
803 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
804
805 /*
806 * The byte count includes a 4 byte header that was added by
807 * the NIC.
808 */
809 sc->readmem(sc, packet_ptr, (char *) &packet_hdr,
810 sizeof(packet_hdr));
811 len = packet_hdr.count;
812 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
813 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
814 /*
815 * Length is a wild value. There's a good chance that
816 * this was caused by the NIC being old and buggy.
817 * The bug is that the length low byte is duplicated
818 * in the high byte. Try to recalculate the length
819 * based on the pointer to the next packet. Also,
820 * need ot preserve offset into page.
821 *
822 * NOTE: sc->next_packet is pointing at the current
823 * packet.
824 */
825 len &= ED_PAGE_SIZE - 1;
826 if (packet_hdr.next_packet >= sc->next_packet)
827 len += (packet_hdr.next_packet -
828 sc->next_packet) * ED_PAGE_SIZE;
829 else
830 len +=
831 ((packet_hdr.next_packet - sc->rec_page_start) +
832 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
833 /*
834 * because buffers are aligned on 256-byte boundary,
835 * the length computed above is off by 256 in almost
836 * all cases. Fix it...
837 */
838 if (len & 0xff)
839 len -= 256;
840 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
841 + sizeof(struct ed_ring)))
842 sc->mibdata.dot3StatsFrameTooLongs++;
843 }
844
845 /*
846 * Be fairly liberal about what we allow as a "reasonable"
847 * length so that a [crufty] packet will make it to BPF (and
848 * can thus be analyzed). Note that all that is really
849 * important is that we have a length that will fit into one
850 * mbuf cluster or less; the upper layer protocols can then
851 * figure out the length from their own length field(s). But
852 * make sure that we have at least a full ethernet header or
853 * we would be unable to call ether_input() later.
854 */
855 if ((len >= sizeof(struct ed_ring) + ETHER_HDR_LEN) &&
856 (len <= MCLBYTES) &&
857 (packet_hdr.next_packet >= sc->rec_page_start) &&
858 (packet_hdr.next_packet < sc->rec_page_stop)) {
859 /*
860 * Go get packet.
861 */
862 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
863 len - sizeof(struct ed_ring));
864 ifp->if_ipackets++;
865 } else {
866 /*
867 * Really BAD. The ring pointers are corrupted.
868 */
869 log(LOG_ERR,
870 "%s: NIC memory corrupt - invalid packet length %d\n",
871 ifp->if_xname, len);
872 ifp->if_ierrors++;
873 ed_reset(ifp);
874 return;
875 }
876
877 /*
878 * Update next packet pointer
879 */
880 sc->next_packet = packet_hdr.next_packet;
881
882 /*
883 * Update NIC boundry pointer - being careful to keep it one
884 * buffer behind. (as recommended by NS databook)
885 */
886 boundry = sc->next_packet - 1;
887 if (boundry < sc->rec_page_start)
888 boundry = sc->rec_page_stop - 1;
889
890 /*
891 * Set NIC to page 0 registers to update boundry register
892 */
893 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
894 ed_nic_outb(sc, ED_P0_BNRY, boundry);
895
896 /*
897 * Set NIC to page 1 registers before looping to top (prepare
898 * to get 'CURR' current pointer)
899 */
900 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
901 }
902 }
903
904 /*
905 * Ethernet interface interrupt processor
906 */
907 void
908 edintr(void *arg)
909 {
910 struct ed_softc *sc = (struct ed_softc*) arg;
911 struct ifnet *ifp = sc->ifp;
912 u_char isr;
913 int count;
914
915 ED_LOCK(sc);
916 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
917 ED_UNLOCK(sc);
918 return;
919 }
920 /*
921 * Set NIC to page 0 registers
922 */
923 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
924
925 /*
926 * loop until there are no more new interrupts. When the card goes
927 * away, the hardware will read back 0xff. Looking at the interrupts,
928 * it would appear that 0xff is impossible, or at least extremely
929 * unlikely.
930 */
931 while ((isr = ed_nic_inb(sc, ED_P0_ISR)) != 0 && isr != 0xff) {
932
933 /*
934 * reset all the bits that we are 'acknowledging' by writing a
935 * '1' to each bit position that was set (writing a '1'
936 * *clears* the bit)
937 */
938 ed_nic_outb(sc, ED_P0_ISR, isr);
939
940 /*
941 * The AX88190 and AX88190A has problems acking an interrupt
942 * and having them clear. This interferes with top-level loop
943 * here. Wait for all the bits to clear.
944 *
945 * We limit this to 5000 iterations. At 1us per inb/outb,
946 * this translates to about 15ms, which should be plenty of
947 * time, and also gives protection in the card eject case.
948 */
949 if (sc->chip_type == ED_CHIP_TYPE_AX88190) {
950 count = 5000; /* 15ms */
951 while (count-- && (ed_nic_inb(sc, ED_P0_ISR) & isr)) {
952 ed_nic_outb(sc, ED_P0_ISR,0);
953 ed_nic_outb(sc, ED_P0_ISR,isr);
954 }
955 if (count == 0)
956 break;
957 }
958
959 /*
960 * Handle transmitter interrupts. Handle these first because
961 * the receiver will reset the board under some conditions.
962 */
963 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
964 u_char collisions = ed_nic_inb(sc, ED_P0_NCR) & 0x0f;
965
966 /*
967 * Check for transmit error. If a TX completed with an
968 * error, we end up throwing the packet away. Really
969 * the only error that is possible is excessive
970 * collisions, and in this case it is best to allow
971 * the automatic mechanisms of TCP to backoff the
972 * flow. Of course, with UDP we're screwed, but this
973 * is expected when a network is heavily loaded.
974 */
975 (void) ed_nic_inb(sc, ED_P0_TSR);
976 if (isr & ED_ISR_TXE) {
977 u_char tsr;
978
979 /*
980 * Excessive collisions (16)
981 */
982 tsr = ed_nic_inb(sc, ED_P0_TSR);
983 if ((tsr & ED_TSR_ABT)
984 && (collisions == 0)) {
985
986 /*
987 * When collisions total 16, the
988 * P0_NCR will indicate 0, and the
989 * TSR_ABT is set.
990 */
991 collisions = 16;
992 sc->mibdata.dot3StatsExcessiveCollisions++;
993 sc->mibdata.dot3StatsCollFrequencies[15]++;
994 }
995 if (tsr & ED_TSR_OWC)
996 sc->mibdata.dot3StatsLateCollisions++;
997 if (tsr & ED_TSR_CDH)
998 sc->mibdata.dot3StatsSQETestErrors++;
999 if (tsr & ED_TSR_CRS)
1000 sc->mibdata.dot3StatsCarrierSenseErrors++;
1001 if (tsr & ED_TSR_FU)
1002 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
1003
1004 /*
1005 * update output errors counter
1006 */
1007 ifp->if_oerrors++;
1008 } else {
1009
1010 /*
1011 * Update total number of successfully
1012 * transmitted packets.
1013 */
1014 ifp->if_opackets++;
1015 }
1016
1017 /*
1018 * reset tx busy and output active flags
1019 */
1020 sc->xmit_busy = 0;
1021 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1022
1023 /*
1024 * clear watchdog timer
1025 */
1026 ifp->if_timer = 0;
1027
1028 /*
1029 * Add in total number of collisions on last
1030 * transmission.
1031 */
1032 ifp->if_collisions += collisions;
1033 switch(collisions) {
1034 case 0:
1035 case 16:
1036 break;
1037 case 1:
1038 sc->mibdata.dot3StatsSingleCollisionFrames++;
1039 sc->mibdata.dot3StatsCollFrequencies[0]++;
1040 break;
1041 default:
1042 sc->mibdata.dot3StatsMultipleCollisionFrames++;
1043 sc->mibdata.
1044 dot3StatsCollFrequencies[collisions-1]
1045 ++;
1046 break;
1047 }
1048
1049 /*
1050 * Decrement buffer in-use count if not zero (can only
1051 * be zero if a transmitter interrupt occured while
1052 * not actually transmitting). If data is ready to
1053 * transmit, start it transmitting, otherwise defer
1054 * until after handling receiver
1055 */
1056 if (sc->txb_inuse && --sc->txb_inuse)
1057 ed_xmit(sc);
1058 }
1059
1060 /*
1061 * Handle receiver interrupts
1062 */
1063 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
1064
1065 /*
1066 * Overwrite warning. In order to make sure that a
1067 * lockup of the local DMA hasn't occurred, we reset
1068 * and re-init the NIC. The NSC manual suggests only a
1069 * partial reset/re-init is necessary - but some chips
1070 * seem to want more. The DMA lockup has been seen
1071 * only with early rev chips - Methinks this bug was
1072 * fixed in later revs. -DG
1073 */
1074 if (isr & ED_ISR_OVW) {
1075 ifp->if_ierrors++;
1076 #ifdef DIAGNOSTIC
1077 log(LOG_WARNING,
1078 "%s: warning - receiver ring buffer overrun\n",
1079 ifp->if_xname);
1080 #endif
1081
1082 /*
1083 * Stop/reset/re-init NIC
1084 */
1085 ed_reset(ifp);
1086 } else {
1087
1088 /*
1089 * Receiver Error. One or more of: CRC error,
1090 * frame alignment error FIFO overrun, or
1091 * missed packet.
1092 */
1093 if (isr & ED_ISR_RXE) {
1094 u_char rsr;
1095 rsr = ed_nic_inb(sc, ED_P0_RSR);
1096 if (rsr & ED_RSR_CRC)
1097 sc->mibdata.dot3StatsFCSErrors++;
1098 if (rsr & ED_RSR_FAE)
1099 sc->mibdata.dot3StatsAlignmentErrors++;
1100 if (rsr & ED_RSR_FO)
1101 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
1102 ifp->if_ierrors++;
1103 #ifdef ED_DEBUG
1104 if_printf(ifp, "receive error %x\n",
1105 ed_nic_inb(sc, ED_P0_RSR));
1106 #endif
1107 }
1108
1109 /*
1110 * Go get the packet(s) XXX - Doing this on an
1111 * error is dubious because there shouldn't be
1112 * any data to get (we've configured the
1113 * interface to not accept packets with
1114 * errors).
1115 */
1116
1117 /*
1118 * Enable 16bit access to shared memory first
1119 * on WD/SMC boards.
1120 */
1121 ed_enable_16bit_access(sc);
1122 ed_rint(sc);
1123 ed_disable_16bit_access(sc);
1124 }
1125 }
1126
1127 /*
1128 * If it looks like the transmitter can take more data,
1129 * attempt to start output on the interface. This is done
1130 * after handling the receiver to give the receiver priority.
1131 */
1132 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0)
1133 ed_start_locked(ifp);
1134
1135 /*
1136 * return NIC CR to standard state: page 0, remote DMA
1137 * complete, start (toggling the TXP bit off, even if was just
1138 * set in the transmit routine, is *okay* - it is 'edge'
1139 * triggered from low to high)
1140 */
1141 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1142
1143 /*
1144 * If the Network Talley Counters overflow, read them to reset
1145 * them. It appears that old 8390's won't clear the ISR flag
1146 * otherwise - resulting in an infinite loop.
1147 */
1148 if (isr & ED_ISR_CNT) {
1149 (void) ed_nic_inb(sc, ED_P0_CNTR0);
1150 (void) ed_nic_inb(sc, ED_P0_CNTR1);
1151 (void) ed_nic_inb(sc, ED_P0_CNTR2);
1152 }
1153 }
1154 ED_UNLOCK(sc);
1155 }
1156
1157 /*
1158 * Process an ioctl request.
1159 */
1160 static int
1161 ed_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1162 {
1163 struct ed_softc *sc = ifp->if_softc;
1164 struct ifreq *ifr = (struct ifreq *)data;
1165 int error = 0;
1166
1167 switch (command) {
1168 case SIOCSIFFLAGS:
1169 /*
1170 * If the interface is marked up and stopped, then start it.
1171 * If we're up and already running, then it may be a mediachg.
1172 * If it is marked down and running, then stop it.
1173 */
1174 ED_LOCK(sc);
1175 if (ifp->if_flags & IFF_UP) {
1176 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1177 ed_init_locked(sc);
1178 else if (sc->sc_mediachg)
1179 sc->sc_mediachg(sc);
1180 } else {
1181 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1182 ed_stop(sc);
1183 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1184 }
1185 }
1186
1187 /*
1188 * Promiscuous flag may have changed, so reprogram the RCR.
1189 */
1190 ed_setrcr(sc);
1191
1192 ED_UNLOCK(sc);
1193 break;
1194
1195 case SIOCADDMULTI:
1196 case SIOCDELMULTI:
1197 /*
1198 * Multicast list has changed; set the hardware filter
1199 * accordingly.
1200 */
1201 ED_LOCK(sc);
1202 ed_setrcr(sc);
1203 ED_UNLOCK(sc);
1204 error = 0;
1205 break;
1206
1207 case SIOCGIFMEDIA:
1208 case SIOCSIFMEDIA:
1209 if (sc->sc_media_ioctl == NULL) {
1210 error = EINVAL;
1211 break;
1212 }
1213 sc->sc_media_ioctl(sc, ifr, command);
1214 break;
1215
1216 default:
1217 error = ether_ioctl(ifp, command, data);
1218 break;
1219 }
1220 return (error);
1221 }
1222
1223 /*
1224 * Given a source and destination address, copy 'amount' of a packet from
1225 * the ring buffer into a linear destination buffer. Takes into account
1226 * ring-wrap.
1227 */
1228 static __inline void
1229 ed_ring_copy(struct ed_softc *sc, bus_size_t src, char *dst, u_short amount)
1230 {
1231 u_short tmp_amount;
1232
1233 /* does copy wrap to lower addr in ring buffer? */
1234 if (src + amount > sc->mem_end) {
1235 tmp_amount = sc->mem_end - src;
1236 /* copy amount up to end of NIC memory */
1237 sc->readmem(sc, src, dst, tmp_amount);
1238 amount -= tmp_amount;
1239 src = sc->mem_ring;
1240 dst += tmp_amount;
1241 }
1242 sc->readmem(sc, src, dst, amount);
1243 }
1244
1245 /*
1246 * Retreive packet from shared memory and send to the next level up via
1247 * ether_input().
1248 */
1249 static void
1250 ed_get_packet(struct ed_softc *sc, bus_size_t buf, u_short len)
1251 {
1252 struct ifnet *ifp = sc->ifp;
1253 struct ether_header *eh;
1254 struct mbuf *m;
1255
1256 /* Allocate a header mbuf */
1257 MGETHDR(m, M_DONTWAIT, MT_DATA);
1258 if (m == NULL)
1259 return;
1260 m->m_pkthdr.rcvif = ifp;
1261 m->m_pkthdr.len = m->m_len = len;
1262
1263 /*
1264 * We always put the received packet in a single buffer -
1265 * either with just an mbuf header or in a cluster attached
1266 * to the header. The +2 is to compensate for the alignment
1267 * fixup below.
1268 */
1269 if ((len + 2) > MHLEN) {
1270 /* Attach an mbuf cluster */
1271 MCLGET(m, M_DONTWAIT);
1272
1273 /* Insist on getting a cluster */
1274 if ((m->m_flags & M_EXT) == 0) {
1275 m_freem(m);
1276 return;
1277 }
1278 }
1279
1280 /*
1281 * The +2 is to longword align the start of the real packet.
1282 * This is important for NFS.
1283 */
1284 m->m_data += 2;
1285 eh = mtod(m, struct ether_header *);
1286
1287 /*
1288 * Get packet, including link layer address, from interface.
1289 */
1290 ed_ring_copy(sc, buf, (char *)eh, len);
1291
1292 m->m_pkthdr.len = m->m_len = len;
1293
1294 ED_UNLOCK(sc);
1295 (*ifp->if_input)(ifp, m);
1296 ED_LOCK(sc);
1297 }
1298
1299 /*
1300 * Supporting routines
1301 */
1302
1303 /*
1304 * Given a NIC memory source address and a host memory destination
1305 * address, copy 'amount' from NIC to host using shared memory.
1306 * The 'amount' is rounded up to a word - okay as long as mbufs
1307 * are word sized. That's what the +1 is below.
1308 * This routine accesses things as 16 bit quantities.
1309 */
1310 void
1311 ed_shmem_readmem16(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1312 uint16_t amount)
1313 {
1314 bus_space_read_region_2(sc->mem_bst, sc->mem_bsh, src, (uint16_t *)dst,
1315 (amount + 1) / 2);
1316 }
1317
1318 /*
1319 * Given a NIC memory source address and a host memory destination
1320 * address, copy 'amount' from NIC to host using shared memory.
1321 * This routine accesses things as 8 bit quantities.
1322 */
1323 void
1324 ed_shmem_readmem8(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1325 uint16_t amount)
1326 {
1327 bus_space_read_region_1(sc->mem_bst, sc->mem_bsh, src, dst, amount);
1328 }
1329
1330 /*
1331 * Given a NIC memory source address and a host memory destination
1332 * address, copy 'amount' from NIC to host using Programmed I/O.
1333 * The 'amount' is rounded up to a word - okay as long as mbufs
1334 * are word sized.
1335 * This routine is currently Novell-specific.
1336 */
1337 void
1338 ed_pio_readmem(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
1339 uint16_t amount)
1340 {
1341 /* Regular Novell cards */
1342 /* select page 0 registers */
1343 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1344
1345 /* round up to a word */
1346 if (amount & 1)
1347 ++amount;
1348
1349 /* set up DMA byte count */
1350 ed_nic_outb(sc, ED_P0_RBCR0, amount);
1351 ed_nic_outb(sc, ED_P0_RBCR1, amount >> 8);
1352
1353 /* set up source address in NIC mem */
1354 ed_nic_outb(sc, ED_P0_RSAR0, src);
1355 ed_nic_outb(sc, ED_P0_RSAR1, src >> 8);
1356
1357 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
1358
1359 if (sc->isa16bit)
1360 ed_asic_insw(sc, ED_NOVELL_DATA, dst, amount / 2);
1361 else
1362 ed_asic_insb(sc, ED_NOVELL_DATA, dst, amount);
1363 }
1364
1365 /*
1366 * Stripped down routine for writing a linear buffer to NIC memory.
1367 * Only used in the probe routine to test the memory. 'len' must
1368 * be even.
1369 */
1370 void
1371 ed_pio_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
1372 {
1373 int maxwait = 200; /* about 240us */
1374
1375 /* select page 0 registers */
1376 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1377
1378 /* reset remote DMA complete flag */
1379 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1380
1381 /* set up DMA byte count */
1382 ed_nic_outb(sc, ED_P0_RBCR0, len);
1383 ed_nic_outb(sc, ED_P0_RBCR1, len >> 8);
1384
1385 /* set up destination address in NIC mem */
1386 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1387 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1388
1389 /* set remote DMA write */
1390 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1391
1392 if (sc->isa16bit)
1393 ed_asic_outsw(sc, ED_NOVELL_DATA, src, len / 2);
1394 else
1395 ed_asic_outsb(sc, ED_NOVELL_DATA, src, len);
1396
1397 /*
1398 * Wait for remote DMA complete. This is necessary because on the
1399 * transmit side, data is handled internally by the NIC in bursts and
1400 * we can't start another remote DMA until this one completes. Not
1401 * waiting causes really bad things to happen - like the NIC
1402 * irrecoverably jamming the ISA bus.
1403 */
1404 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1405 --maxwait)
1406 continue;
1407 }
1408
1409 /*
1410 * Write an mbuf chain to the destination NIC memory address using
1411 * programmed I/O.
1412 */
1413 u_short
1414 ed_pio_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1415 {
1416 struct ifnet *ifp = sc->ifp;
1417 unsigned short total_len, dma_len;
1418 struct mbuf *mp;
1419 int maxwait = 200; /* about 240us */
1420
1421 ED_ASSERT_LOCKED(sc);
1422
1423 /* Regular Novell cards */
1424 /* First, count up the total number of bytes to copy */
1425 for (total_len = 0, mp = m; mp; mp = mp->m_next)
1426 total_len += mp->m_len;
1427
1428 dma_len = total_len;
1429 if (sc->isa16bit && (dma_len & 1))
1430 dma_len++;
1431
1432 /* select page 0 registers */
1433 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
1434
1435 /* reset remote DMA complete flag */
1436 ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
1437
1438 /* set up DMA byte count */
1439 ed_nic_outb(sc, ED_P0_RBCR0, dma_len);
1440 ed_nic_outb(sc, ED_P0_RBCR1, dma_len >> 8);
1441
1442 /* set up destination address in NIC mem */
1443 ed_nic_outb(sc, ED_P0_RSAR0, dst);
1444 ed_nic_outb(sc, ED_P0_RSAR1, dst >> 8);
1445
1446 /* set remote DMA write */
1447 ed_nic_outb(sc, ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
1448
1449 /*
1450 * Transfer the mbuf chain to the NIC memory.
1451 * 16-bit cards require that data be transferred as words, and only words.
1452 * So that case requires some extra code to patch over odd-length mbufs.
1453 */
1454
1455 if (!sc->isa16bit) {
1456 /* NE1000s are easy */
1457 while (m) {
1458 if (m->m_len)
1459 ed_asic_outsb(sc, ED_NOVELL_DATA,
1460 m->m_data, m->m_len);
1461 m = m->m_next;
1462 }
1463 } else {
1464 /* NE2000s are a pain */
1465 uint8_t *data;
1466 int len, wantbyte;
1467 union {
1468 uint16_t w;
1469 uint8_t b[2];
1470 } saveword;
1471
1472 wantbyte = 0;
1473
1474 while (m) {
1475 len = m->m_len;
1476 if (len) {
1477 data = mtod(m, caddr_t);
1478 /* finish the last word */
1479 if (wantbyte) {
1480 saveword.b[1] = *data;
1481 ed_asic_outw(sc, ED_NOVELL_DATA,
1482 saveword.w);
1483 data++;
1484 len--;
1485 wantbyte = 0;
1486 }
1487 /* output contiguous words */
1488 if (len > 1) {
1489 ed_asic_outsw(sc, ED_NOVELL_DATA,
1490 data, len >> 1);
1491 data += len & ~1;
1492 len &= 1;
1493 }
1494 /* save last byte, if necessary */
1495 if (len == 1) {
1496 saveword.b[0] = *data;
1497 wantbyte = 1;
1498 }
1499 }
1500 m = m->m_next;
1501 }
1502 /* spit last byte */
1503 if (wantbyte)
1504 ed_asic_outw(sc, ED_NOVELL_DATA, saveword.w);
1505 }
1506
1507 /*
1508 * Wait for remote DMA complete. This is necessary because on the
1509 * transmit side, data is handled internally by the NIC in bursts and
1510 * we can't start another remote DMA until this one completes. Not
1511 * waiting causes really bad things to happen - like the NIC
1512 * irrecoverably jamming the ISA bus.
1513 */
1514 while (((ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) &&
1515 --maxwait)
1516 continue;
1517
1518 if (!maxwait) {
1519 log(LOG_WARNING, "%s: remote transmit DMA failed to complete\n",
1520 ifp->if_xname);
1521 ed_reset(ifp);
1522 return(0);
1523 }
1524 return (total_len);
1525 }
1526
1527 static void
1528 ed_setrcr(struct ed_softc *sc)
1529 {
1530 struct ifnet *ifp = sc->ifp;
1531 int i;
1532 u_char reg1;
1533
1534 ED_ASSERT_LOCKED(sc);
1535
1536 /* Bit 6 in AX88190 RCR register must be set. */
1537 if (sc->chip_type == ED_CHIP_TYPE_AX88190 ||
1538 sc->chip_type == ED_CHIP_TYPE_AX88790)
1539 reg1 = ED_RCR_INTT;
1540 else
1541 reg1 = 0x00;
1542
1543 /* set page 1 registers */
1544 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
1545
1546 if (ifp->if_flags & IFF_PROMISC) {
1547
1548 /*
1549 * Reconfigure the multicast filter.
1550 */
1551 for (i = 0; i < 8; i++)
1552 ed_nic_outb(sc, ED_P1_MAR(i), 0xff);
1553
1554 /*
1555 * And turn on promiscuous mode. Also enable reception of
1556 * runts and packets with CRC & alignment errors.
1557 */
1558 /* Set page 0 registers */
1559 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1560
1561 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
1562 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP | reg1);
1563 } else {
1564 /* set up multicast addresses and filter modes */
1565 if (ifp->if_flags & IFF_MULTICAST) {
1566 uint32_t mcaf[2];
1567
1568 if (ifp->if_flags & IFF_ALLMULTI) {
1569 mcaf[0] = 0xffffffff;
1570 mcaf[1] = 0xffffffff;
1571 } else
1572 ed_ds_getmcaf(sc, mcaf);
1573
1574 /*
1575 * Set multicast filter on chip.
1576 */
1577 for (i = 0; i < 8; i++)
1578 ed_nic_outb(sc, ED_P1_MAR(i), ((u_char *) mcaf)[i]);
1579
1580 /* Set page 0 registers */
1581 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1582
1583 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AM | ED_RCR_AB | reg1);
1584 } else {
1585
1586 /*
1587 * Initialize multicast address hashing registers to
1588 * not accept multicasts.
1589 */
1590 for (i = 0; i < 8; ++i)
1591 ed_nic_outb(sc, ED_P1_MAR(i), 0x00);
1592
1593 /* Set page 0 registers */
1594 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STP);
1595
1596 ed_nic_outb(sc, ED_P0_RCR, ED_RCR_AB | reg1);
1597 }
1598 }
1599
1600 /*
1601 * Start interface.
1602 */
1603 ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
1604 }
1605
1606 /*
1607 * Compute the multicast address filter from the
1608 * list of multicast addresses we need to listen to.
1609 */
1610 static void
1611 ed_ds_getmcaf(struct ed_softc *sc, uint32_t *mcaf)
1612 {
1613 uint32_t index;
1614 u_char *af = (u_char *) mcaf;
1615 struct ifmultiaddr *ifma;
1616
1617 mcaf[0] = 0;
1618 mcaf[1] = 0;
1619
1620 if_maddr_rlock(sc->ifp);
1621 TAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
1622 if (ifma->ifma_addr->sa_family != AF_LINK)
1623 continue;
1624 index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
1625 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
1626 af[index >> 3] |= 1 << (index & 7);
1627 }
1628 if_maddr_runlock(sc->ifp);
1629 }
1630
1631 int
1632 ed_isa_mem_ok(device_t dev, u_long pmem, u_int memsize)
1633 {
1634 if (pmem < 0xa0000 || pmem + memsize > 0x1000000) {
1635 device_printf(dev, "Invalid ISA memory address range "
1636 "configured: 0x%lx - 0x%lx\n", pmem, pmem + memsize);
1637 return (ENXIO);
1638 }
1639 return (0);
1640 }
1641
1642 int
1643 ed_clear_memory(device_t dev)
1644 {
1645 struct ed_softc *sc = device_get_softc(dev);
1646 bus_size_t i;
1647
1648 bus_space_set_region_1(sc->mem_bst, sc->mem_bsh, sc->mem_start,
1649 0, sc->mem_size);
1650
1651 for (i = 0; i < sc->mem_size; i++) {
1652 if (bus_space_read_1(sc->mem_bst, sc->mem_bsh,
1653 sc->mem_start + i)) {
1654 device_printf(dev, "failed to clear shared memory at "
1655 "0x%jx - check configuration\n",
1656 (uintmax_t)rman_get_start(sc->mem_res) + i);
1657 return (ENXIO);
1658 }
1659 }
1660 return (0);
1661 }
1662
1663 u_short
1664 ed_shmem_write_mbufs(struct ed_softc *sc, struct mbuf *m, bus_size_t dst)
1665 {
1666 u_short len;
1667
1668 /*
1669 * Special case setup for 16 bit boards...
1670 */
1671 if (sc->isa16bit) {
1672 switch (sc->vendor) {
1673 #ifdef ED_3C503
1674 /*
1675 * For 16bit 3Com boards (which have 16k of
1676 * memory), we have the xmit buffers in a
1677 * different page of memory ('page 0') - so
1678 * change pages.
1679 */
1680 case ED_VENDOR_3COM:
1681 ed_asic_outb(sc, ED_3COM_GACFR, ED_3COM_GACFR_RSEL);
1682 break;
1683 #endif
1684 /*
1685 * Enable 16bit access to shared memory on
1686 * WD/SMC boards.
1687 *
1688 * XXX - same as ed_enable_16bit_access()
1689 */
1690 case ED_VENDOR_WD_SMC:
1691 ed_asic_outb(sc, ED_WD_LAAR,
1692 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
1693 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1694 ed_asic_outb(sc, ED_WD_MSR, ED_WD_MSR_MENB);
1695 break;
1696 }
1697 }
1698 for (len = 0; m != NULL; m = m->m_next) {
1699 if (m->m_len == 0)
1700 continue;
1701 if (sc->isa16bit) {
1702 if (m->m_len > 1)
1703 bus_space_write_region_2(sc->mem_bst,
1704 sc->mem_bsh, dst,
1705 mtod(m, uint16_t *), m->m_len / 2);
1706 if ((m->m_len & 1) != 0)
1707 bus_space_write_1(sc->mem_bst, sc->mem_bsh,
1708 dst + m->m_len - 1,
1709 *(mtod(m, uint8_t *) + m->m_len - 1));
1710 } else
1711 bus_space_write_region_1(sc->mem_bst,
1712 sc->mem_bsh, dst,
1713 mtod(m, uint8_t *), m->m_len);
1714 dst += m->m_len;
1715 len += m->m_len;
1716 }
1717
1718 /*
1719 * Restore previous shared memory access
1720 */
1721 if (sc->isa16bit) {
1722 switch (sc->vendor) {
1723 #ifdef ED_3C503
1724 case ED_VENDOR_3COM:
1725 ed_asic_outb(sc, ED_3COM_GACFR,
1726 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
1727 break;
1728 #endif
1729 case ED_VENDOR_WD_SMC:
1730 /* XXX - same as ed_disable_16bit_access() */
1731 if (sc->chip_type == ED_CHIP_TYPE_WD790)
1732 ed_asic_outb(sc, ED_WD_MSR, 0x00);
1733 ed_asic_outb(sc, ED_WD_LAAR,
1734 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
1735 break;
1736 }
1737 }
1738 return (len);
1739 }
1740
1741 /*
1742 * Generic ifmedia support. By default, the DP8390-based cards don't know
1743 * what their network attachment really is, or even if it is valid (except
1744 * upon successful transmission of a packet). To play nicer with dhclient, as
1745 * well as to fit in with a framework where some cards can provde more
1746 * detailed information, make sure that we use this as a fallback.
1747 */
1748 static int
1749 ed_gen_ifmedia_ioctl(struct ed_softc *sc, struct ifreq *ifr, u_long command)
1750 {
1751 return (ifmedia_ioctl(sc->ifp, ifr, &sc->ifmedia, command));
1752 }
1753
1754 static int
1755 ed_gen_ifmedia_upd(struct ifnet *ifp)
1756 {
1757 return 0;
1758 }
1759
1760 static void
1761 ed_gen_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1762 {
1763 ifmr->ifm_active = IFM_ETHER | IFM_AUTO;
1764 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
1765 }
1766
1767 void
1768 ed_gen_ifmedia_init(struct ed_softc *sc)
1769 {
1770 sc->sc_media_ioctl = &ed_gen_ifmedia_ioctl;
1771 ifmedia_init(&sc->ifmedia, 0, ed_gen_ifmedia_upd, ed_gen_ifmedia_sts);
1772 ifmedia_add(&sc->ifmedia, IFM_ETHER | IFM_AUTO, 0, 0);
1773 ifmedia_set(&sc->ifmedia, IFM_ETHER | IFM_AUTO);
1774 }
Cache object: 9d393de4cd5c13d3126c1fdd8471be39
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