e1000_82540.c

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    1 /*******************************************************************************
    2 
    3   Copyright (c) 2001-2007, Intel Corporation 
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   32 *******************************************************************************/
   33 /* $FreeBSD$ */
   34 
   35 
   36 /* e1000_82540
   37  * e1000_82545
   38  * e1000_82546
   39  * e1000_82545_rev_3
   40  * e1000_82546_rev_3
   41  */
   42 
   43 #include "e1000_api.h"
   44 
   45 void e1000_init_function_pointers_82540(struct e1000_hw *hw);
   46 
   47 STATIC s32  e1000_init_phy_params_82540(struct e1000_hw *hw);
   48 STATIC s32  e1000_init_nvm_params_82540(struct e1000_hw *hw);
   49 STATIC s32  e1000_init_mac_params_82540(struct e1000_hw *hw);
   50 static s32  e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw);
   51 STATIC void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw);
   52 STATIC s32  e1000_init_hw_82540(struct e1000_hw *hw);
   53 STATIC s32  e1000_reset_hw_82540(struct e1000_hw *hw);
   54 static s32  e1000_set_phy_mode_82540(struct e1000_hw *hw);
   55 static s32  e1000_set_vco_speed_82540(struct e1000_hw *hw);
   56 STATIC s32  e1000_setup_copper_link_82540(struct e1000_hw *hw);
   57 STATIC s32  e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw);
   58 
   59 /**
   60  * e1000_init_phy_params_82540 - Init PHY func ptrs.
   61  * @hw: pointer to the HW structure
   62  *
   63  * This is a function pointer entry point called by the api module.
   64  **/
   65 STATIC s32 e1000_init_phy_params_82540(struct e1000_hw *hw)
   66 {
   67         struct e1000_phy_info *phy = &hw->phy;
   68         struct e1000_functions *func = &hw->func;
   69         s32 ret_val = E1000_SUCCESS;
   70 
   71         phy->addr                       = 1;
   72         phy->autoneg_mask               = AUTONEG_ADVERTISE_SPEED_DEFAULT;
   73         phy->reset_delay_us             = 10000;
   74         phy->type                       = e1000_phy_m88;
   75 
   76         /* Function Pointers */
   77         func->check_polarity            = e1000_check_polarity_m88;
   78         func->commit_phy                = e1000_phy_sw_reset_generic;
   79         func->force_speed_duplex        = e1000_phy_force_speed_duplex_m88;
   80         func->get_cable_length          = e1000_get_cable_length_m88;
   81         func->get_cfg_done              = e1000_get_cfg_done_generic;
   82         func->read_phy_reg              = e1000_read_phy_reg_m88;
   83         func->reset_phy                 = e1000_phy_hw_reset_generic;
   84         func->write_phy_reg             = e1000_write_phy_reg_m88;
   85         func->get_phy_info              = e1000_get_phy_info_m88;
   86 
   87         ret_val = e1000_get_phy_id(hw);
   88         if (ret_val)
   89                 goto out;
   90 
   91         /* Verify phy id */
   92         switch (hw->mac.type) {
   93         case e1000_82540:
   94         case e1000_82545:
   95         case e1000_82545_rev_3:
   96         case e1000_82546:
   97         case e1000_82546_rev_3:
   98                 if (phy->id == M88E1011_I_PHY_ID)
   99                         break;
  100                 /* Fall Through */
  101         default:
  102                 ret_val = -E1000_ERR_PHY;
  103                 goto out;
  104                 break;
  105         }
  106 
  107 out:
  108         return ret_val;
  109 }
  110 
  111 /**
  112  * e1000_init_nvm_params_82540 - Init NVM func ptrs.
  113  * @hw: pointer to the HW structure
  114  *
  115  * This is a function pointer entry point called by the api module.
  116  **/
  117 STATIC s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)
  118 {
  119         struct e1000_nvm_info *nvm = &hw->nvm;
  120         struct e1000_functions *func = &hw->func;
  121         u32 eecd = E1000_READ_REG(hw, E1000_EECD);
  122 
  123         DEBUGFUNC("e1000_init_nvm_params_82540");
  124 
  125         nvm->type               = e1000_nvm_eeprom_microwire;
  126         nvm->delay_usec         = 50;
  127         nvm->opcode_bits        = 3;
  128         switch (nvm->override) {
  129         case e1000_nvm_override_microwire_large:
  130                 nvm->address_bits       = 8;
  131                 nvm->word_size          = 256;
  132                 break;
  133         case e1000_nvm_override_microwire_small:
  134                 nvm->address_bits       = 6;
  135                 nvm->word_size          = 64;
  136                 break;
  137         default:
  138                 nvm->address_bits       = eecd & E1000_EECD_SIZE ? 8 : 6;
  139                 nvm->word_size          = eecd & E1000_EECD_SIZE ? 256 : 64;
  140                 break;
  141         }
  142 
  143         /* Function Pointers */
  144         func->acquire_nvm        = e1000_acquire_nvm_generic;
  145         func->read_nvm           = e1000_read_nvm_microwire;
  146         func->release_nvm        = e1000_release_nvm_generic;
  147         func->update_nvm         = e1000_update_nvm_checksum_generic;
  148         func->valid_led_default  = e1000_valid_led_default_generic;
  149         func->validate_nvm       = e1000_validate_nvm_checksum_generic;
  150         func->write_nvm          = e1000_write_nvm_microwire;
  151 
  152         return E1000_SUCCESS;
  153 }
  154 
  155 /**
  156  * e1000_init_mac_params_82540 - Init MAC func ptrs.
  157  * @hw: pointer to the HW structure
  158  *
  159  * This is a function pointer entry point called by the api module.
  160  **/
  161 STATIC s32 e1000_init_mac_params_82540(struct e1000_hw *hw)
  162 {
  163         struct e1000_mac_info *mac = &hw->mac;
  164         struct e1000_functions *func = &hw->func;
  165         s32 ret_val = E1000_SUCCESS;
  166 
  167         DEBUGFUNC("e1000_init_mac_params_82540");
  168 
  169         /* Set media type */
  170         switch (hw->device_id) {
  171         case E1000_DEV_ID_82545EM_FIBER:
  172         case E1000_DEV_ID_82545GM_FIBER:
  173         case E1000_DEV_ID_82546EB_FIBER:
  174         case E1000_DEV_ID_82546GB_FIBER:
  175                 hw->phy.media_type = e1000_media_type_fiber;
  176                 break;
  177         case E1000_DEV_ID_82545GM_SERDES:
  178         case E1000_DEV_ID_82546GB_SERDES:
  179                 hw->phy.media_type = e1000_media_type_internal_serdes;
  180                 break;
  181         default:
  182                 hw->phy.media_type = e1000_media_type_copper;
  183                 break;
  184         }
  185 
  186         /* Set mta register count */
  187         mac->mta_reg_count = 128;
  188         /* Set rar entry count */
  189         mac->rar_entry_count = E1000_RAR_ENTRIES;
  190 
  191         /* Function pointers */
  192 
  193         /* bus type/speed/width */
  194         func->get_bus_info = e1000_get_bus_info_pci_generic;
  195         /* reset */
  196         func->reset_hw = e1000_reset_hw_82540;
  197         /* hw initialization */
  198         func->init_hw = e1000_init_hw_82540;
  199         /* link setup */
  200         func->setup_link = e1000_setup_link_generic;
  201         /* physical interface setup */
  202         func->setup_physical_interface =
  203                 (hw->phy.media_type == e1000_media_type_copper)
  204                         ? e1000_setup_copper_link_82540
  205                         : e1000_setup_fiber_serdes_link_82540;
  206         /* check for link */
  207         switch (hw->phy.media_type) {
  208         case e1000_media_type_copper:
  209                 func->check_for_link = e1000_check_for_copper_link_generic;
  210                 break;
  211         case e1000_media_type_fiber:
  212                 func->check_for_link = e1000_check_for_fiber_link_generic;
  213                 break;
  214         case e1000_media_type_internal_serdes:
  215                 func->check_for_link = e1000_check_for_serdes_link_generic;
  216                 break;
  217         default:
  218                 ret_val = -E1000_ERR_CONFIG;
  219                 goto out;
  220                 break;
  221         }
  222         /* link info */
  223         func->get_link_up_info =
  224                 (hw->phy.media_type == e1000_media_type_copper)
  225                         ? e1000_get_speed_and_duplex_copper_generic
  226                         : e1000_get_speed_and_duplex_fiber_serdes_generic;
  227         /* multicast address update */
  228         func->update_mc_addr_list = e1000_update_mc_addr_list_generic;
  229         /* writing VFTA */
  230         func->write_vfta = e1000_write_vfta_generic;
  231         /* clearing VFTA */
  232         func->clear_vfta = e1000_clear_vfta_generic;
  233         /* setting MTA */
  234         func->mta_set = e1000_mta_set_generic;
  235         /* setup LED */
  236         func->setup_led = e1000_setup_led_generic;
  237         /* cleanup LED */
  238         func->cleanup_led = e1000_cleanup_led_generic;
  239         /* turn on/off LED */
  240         func->led_on = e1000_led_on_generic;
  241         func->led_off = e1000_led_off_generic;
  242         /* clear hardware counters */
  243         func->clear_hw_cntrs = e1000_clear_hw_cntrs_82540;
  244 
  245 out:
  246         return ret_val;
  247 }
  248 
  249 /**
  250  * e1000_init_function_pointers_82540 - Init func ptrs.
  251  * @hw: pointer to the HW structure
  252  *
  253  * The only function explicitly called by the api module to initialize
  254  * all function pointers and parameters.
  255  **/
  256 void e1000_init_function_pointers_82540(struct e1000_hw *hw)
  257 {
  258         DEBUGFUNC("e1000_init_function_pointers_82540");
  259 
  260         hw->func.init_mac_params = e1000_init_mac_params_82540;
  261         hw->func.init_nvm_params = e1000_init_nvm_params_82540;
  262         hw->func.init_phy_params = e1000_init_phy_params_82540;
  263 }
  264 
  265 /**
  266  *  e1000_reset_hw_82540 - Reset hardware
  267  *  @hw: pointer to the HW structure
  268  *
  269  *  This resets the hardware into a known state.  This is a
  270  *  function pointer entry point called by the api module.
  271  **/
  272 STATIC s32 e1000_reset_hw_82540(struct e1000_hw *hw)
  273 {
  274         u32 ctrl, icr, manc;
  275         s32 ret_val = E1000_SUCCESS;
  276 
  277         DEBUGFUNC("e1000_reset_hw_82540");
  278 
  279         DEBUGOUT("Masking off all interrupts\n");
  280         E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
  281 
  282         E1000_WRITE_REG(hw, E1000_RCTL, 0);
  283         E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
  284         E1000_WRITE_FLUSH(hw);
  285 
  286         /*
  287          * Delay to allow any outstanding PCI transactions to complete
  288          * before resetting the device.
  289          */
  290         msec_delay(10);
  291 
  292         ctrl = E1000_READ_REG(hw, E1000_CTRL);
  293 
  294         DEBUGOUT("Issuing a global reset to 82540/82545/82546 MAC\n");
  295         switch (hw->mac.type) {
  296         case e1000_82545_rev_3:
  297         case e1000_82546_rev_3:
  298                 E1000_WRITE_REG(hw, E1000_CTRL_DUP, ctrl | E1000_CTRL_RST);
  299                 break;
  300         default:
  301                 /*
  302                  * These controllers can't ack the 64-bit write when
  303                  * issuing the reset, so we use IO-mapping as a
  304                  * workaround to issue the reset.
  305                  */
  306                 E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
  307                 break;
  308         }
  309 
  310         /* Wait for EEPROM reload */
  311         msec_delay(5);
  312 
  313         /* Disable HW ARPs on ASF enabled adapters */
  314         manc = E1000_READ_REG(hw, E1000_MANC);
  315         manc &= ~E1000_MANC_ARP_EN;
  316         E1000_WRITE_REG(hw, E1000_MANC, manc);
  317 
  318         E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
  319         icr = E1000_READ_REG(hw, E1000_ICR);
  320 
  321         return ret_val;
  322 }
  323 
  324 /**
  325  *  e1000_init_hw_82540 - Initialize hardware
  326  *  @hw: pointer to the HW structure
  327  *
  328  *  This inits the hardware readying it for operation.  This is a
  329  *  function pointer entry point called by the api module.
  330  **/
  331 STATIC s32 e1000_init_hw_82540(struct e1000_hw *hw)
  332 {
  333         struct e1000_mac_info *mac = &hw->mac;
  334         u32 txdctl, ctrl_ext;
  335         s32 ret_val = E1000_SUCCESS;
  336         u16 i;
  337 
  338         DEBUGFUNC("e1000_init_hw_82540");
  339 
  340         /* Initialize identification LED */
  341         ret_val = e1000_id_led_init_generic(hw);
  342         if (ret_val) {
  343                 DEBUGOUT("Error initializing identification LED\n");
  344                 /* This is not fatal and we should not stop init due to this */
  345         }
  346 
  347         /* Disabling VLAN filtering */
  348         DEBUGOUT("Initializing the IEEE VLAN\n");
  349         if (mac->type < e1000_82545_rev_3)
  350                 E1000_WRITE_REG(hw, E1000_VET, 0);
  351 
  352         e1000_clear_vfta(hw);
  353 
  354         /* Setup the receive address. */
  355         e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
  356 
  357         /* Zero out the Multicast HASH table */
  358         DEBUGOUT("Zeroing the MTA\n");
  359         for (i = 0; i < mac->mta_reg_count; i++) {
  360                 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
  361                 /*
  362                  * Avoid back to back register writes by adding the register
  363                  * read (flush).  This is to protect against some strange
  364                  * bridge configurations that may issue Memory Write Block
  365                  * (MWB) to our register space.  The *_rev_3 hardware at
  366                  * least doesn't respond correctly to every other dword in an
  367                  * MWB to our register space.
  368                  */
  369                 E1000_WRITE_FLUSH(hw);
  370         }
  371 
  372         if (mac->type < e1000_82545_rev_3)
  373                 e1000_pcix_mmrbc_workaround_generic(hw);
  374 
  375         /* Setup link and flow control */
  376         ret_val = e1000_setup_link(hw);
  377 
  378         txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
  379         txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
  380                  E1000_TXDCTL_FULL_TX_DESC_WB;
  381         E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
  382 
  383         /*
  384          * Clear all of the statistics registers (clear on read).  It is
  385          * important that we do this after we have tried to establish link
  386          * because the symbol error count will increment wildly if there
  387          * is no link.
  388          */
  389         e1000_clear_hw_cntrs_82540(hw);
  390 
  391         if ((hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER) ||
  392             (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3)) {
  393                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
  394                 /*
  395                  * Relaxed ordering must be disabled to avoid a parity
  396                  * error crash in a PCI slot.
  397                  */
  398                 ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
  399                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
  400         }
  401 
  402         return ret_val;
  403 }
  404 
  405 /**
  406  *  e1000_setup_copper_link_82540 - Configure copper link settings
  407  *  @hw: pointer to the HW structure
  408  *
  409  *  Calls the appropriate function to configure the link for auto-neg or forced
  410  *  speed and duplex.  Then we check for link, once link is established calls
  411  *  to configure collision distance and flow control are called.  If link is
  412  *  not established, we return -E1000_ERR_PHY (-2).  This is a function
  413  *  pointer entry point called by the api module.
  414  **/
  415 STATIC s32 e1000_setup_copper_link_82540(struct e1000_hw *hw)
  416 {
  417         u32 ctrl;
  418         s32 ret_val = E1000_SUCCESS;
  419         u16 data;
  420 
  421         DEBUGFUNC("e1000_setup_copper_link_82540");
  422 
  423         ctrl = E1000_READ_REG(hw, E1000_CTRL);
  424         ctrl |= E1000_CTRL_SLU;
  425         ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
  426         E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
  427 
  428         ret_val = e1000_set_phy_mode_82540(hw);
  429         if (ret_val)
  430                 goto out;
  431 
  432         if (hw->mac.type == e1000_82545_rev_3 ||
  433             hw->mac.type == e1000_82546_rev_3) {
  434                 ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &data);
  435                 if (ret_val)
  436                         goto out;
  437                 data |= 0x00000008;
  438                 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, data);
  439                 if (ret_val)
  440                         goto out;
  441         }
  442 
  443         ret_val = e1000_copper_link_setup_m88(hw);
  444         if (ret_val)
  445                 goto out;
  446 
  447         ret_val = e1000_setup_copper_link_generic(hw);
  448 
  449 out:
  450         return ret_val;
  451 }
  452 
  453 /**
  454  *  e1000_setup_fiber_serdes_link_82540 - Setup link for fiber/serdes
  455  *  @hw: pointer to the HW structure
  456  *
  457  *  Set the output amplitude to the value in the EEPROM and adjust the VCO
  458  *  speed to improve Bit Error Rate (BER) performance.  Configures collision
  459  *  distance and flow control for fiber and serdes links.  Upon successful
  460  *  setup, poll for link.  This is a function pointer entry point called by
  461  *  the api module.
  462  **/
  463 STATIC s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw)
  464 {
  465         struct e1000_mac_info *mac = &hw->mac;
  466         s32 ret_val = E1000_SUCCESS;
  467 
  468         DEBUGFUNC("e1000_setup_fiber_serdes_link_82540");
  469 
  470         switch (mac->type) {
  471         case e1000_82545_rev_3:
  472         case e1000_82546_rev_3:
  473                 if (hw->phy.media_type == e1000_media_type_internal_serdes) {
  474                         /*
  475                          * If we're on serdes media, adjust the output
  476                          * amplitude to value set in the EEPROM.
  477                          */
  478                         ret_val = e1000_adjust_serdes_amplitude_82540(hw);
  479                         if (ret_val)
  480                                 goto out;
  481                 }
  482                 /* Adjust VCO speed to improve BER performance */
  483                 ret_val = e1000_set_vco_speed_82540(hw);
  484                 if (ret_val)
  485                         goto out;
  486         default:
  487                 break;
  488         }
  489 
  490         ret_val = e1000_setup_fiber_serdes_link_generic(hw);
  491 
  492 out:
  493         return ret_val;
  494 }
  495 
  496 /**
  497  *  e1000_adjust_serdes_amplitude_82540 - Adjust amplitude based on EEPROM
  498  *  @hw: pointer to the HW structure
  499  *
  500  *  Adjust the SERDES ouput amplitude based on the EEPROM settings.
  501  **/
  502 static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw)
  503 {
  504         s32 ret_val = E1000_SUCCESS;
  505         u16 nvm_data;
  506 
  507         DEBUGFUNC("e1000_adjust_serdes_amplitude_82540");
  508 
  509         ret_val = e1000_read_nvm(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
  510         if (ret_val)
  511                 goto out;
  512 
  513         if (nvm_data != NVM_RESERVED_WORD) {
  514                 /* Adjust serdes output amplitude only. */
  515                 nvm_data &= NVM_SERDES_AMPLITUDE_MASK;
  516                 ret_val = e1000_write_phy_reg(hw,
  517                                              M88E1000_PHY_EXT_CTRL,
  518                                              nvm_data);
  519                 if (ret_val)
  520                         goto out;
  521         }
  522 
  523 out:
  524         return ret_val;
  525 }
  526 
  527 /**
  528  *  e1000_set_vco_speed_82540 - Set VCO speed for better performance
  529  *  @hw: pointer to the HW structure
  530  *
  531  *  Set the VCO speed to improve Bit Error Rate (BER) performance.
  532  **/
  533 static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw)
  534 {
  535         s32  ret_val = E1000_SUCCESS;
  536         u16 default_page = 0;
  537         u16 phy_data;
  538 
  539         DEBUGFUNC("e1000_set_vco_speed_82540");
  540 
  541         /* Set PHY register 30, page 5, bit 8 to 0 */
  542 
  543         ret_val = e1000_read_phy_reg(hw,
  544                                     M88E1000_PHY_PAGE_SELECT,
  545                                     &default_page);
  546         if (ret_val)
  547                 goto out;
  548 
  549         ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
  550         if (ret_val)
  551                 goto out;
  552 
  553         ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
  554         if (ret_val)
  555                 goto out;
  556 
  557         phy_data &= ~M88E1000_PHY_VCO_REG_BIT8;
  558         ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
  559         if (ret_val)
  560                 goto out;
  561 
  562         /* Set PHY register 30, page 4, bit 11 to 1 */
  563 
  564         ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
  565         if (ret_val)
  566                 goto out;
  567 
  568         ret_val = e1000_read_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
  569         if (ret_val)
  570                 goto out;
  571 
  572         phy_data |= M88E1000_PHY_VCO_REG_BIT11;
  573         ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
  574         if (ret_val)
  575                 goto out;
  576 
  577         ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT,
  578                                       default_page);
  579 
  580 out:
  581         return ret_val;
  582 }
  583 
  584 /**
  585  *  e1000_set_phy_mode_82540 - Set PHY to class A mode
  586  *  @hw: pointer to the HW structure
  587  *
  588  *  Sets the PHY to class A mode and assumes the following operations will
  589  *  follow to enable the new class mode:
  590  *    1.  Do a PHY soft reset.
  591  *    2.  Restart auto-negotiation or force link.
  592  **/
  593 static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)
  594 {
  595         struct e1000_phy_info *phy = &hw->phy;
  596         s32 ret_val = E1000_SUCCESS;
  597         u16 nvm_data;
  598 
  599         DEBUGFUNC("e1000_set_phy_mode_82540");
  600 
  601         if (hw->mac.type != e1000_82545_rev_3)
  602                 goto out;
  603 
  604         ret_val = e1000_read_nvm(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
  605         if (ret_val) {
  606                 ret_val = -E1000_ERR_PHY;
  607                 goto out;
  608         }
  609 
  610         if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) {
  611                 ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT,
  612                                               0x000B);
  613                 if (ret_val) {
  614                         ret_val = -E1000_ERR_PHY;
  615                         goto out;
  616                 }
  617                 ret_val = e1000_write_phy_reg(hw,
  618                                              M88E1000_PHY_GEN_CONTROL,
  619                                              0x8104);
  620                 if (ret_val) {
  621                         ret_val = -E1000_ERR_PHY;
  622                         goto out;
  623                 }
  624 
  625                 phy->reset_disable = FALSE;
  626         }
  627 
  628 out:
  629         return ret_val;
  630 }
  631 
  632 /**
  633  *  e1000_clear_hw_cntrs_82540 - Clear device specific hardware counters
  634  *  @hw: pointer to the HW structure
  635  *
  636  *  Clears the hardware counters by reading the counter registers.
  637  **/
  638 STATIC void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw)
  639 {
  640         volatile u32 temp;
  641 
  642         DEBUGFUNC("e1000_clear_hw_cntrs_82540");
  643 
  644         e1000_clear_hw_cntrs_base_generic(hw);
  645 
  646         temp = E1000_READ_REG(hw, E1000_PRC64);
  647         temp = E1000_READ_REG(hw, E1000_PRC127);
  648         temp = E1000_READ_REG(hw, E1000_PRC255);
  649         temp = E1000_READ_REG(hw, E1000_PRC511);
  650         temp = E1000_READ_REG(hw, E1000_PRC1023);
  651         temp = E1000_READ_REG(hw, E1000_PRC1522);
  652         temp = E1000_READ_REG(hw, E1000_PTC64);
  653         temp = E1000_READ_REG(hw, E1000_PTC127);
  654         temp = E1000_READ_REG(hw, E1000_PTC255);
  655         temp = E1000_READ_REG(hw, E1000_PTC511);
  656         temp = E1000_READ_REG(hw, E1000_PTC1023);
  657         temp = E1000_READ_REG(hw, E1000_PTC1522);
  658 
  659         temp = E1000_READ_REG(hw, E1000_ALGNERRC);
  660         temp = E1000_READ_REG(hw, E1000_RXERRC);
  661         temp = E1000_READ_REG(hw, E1000_TNCRS);
  662         temp = E1000_READ_REG(hw, E1000_CEXTERR);
  663         temp = E1000_READ_REG(hw, E1000_TSCTC);
  664         temp = E1000_READ_REG(hw, E1000_TSCTFC);
  665 
  666         temp = E1000_READ_REG(hw, E1000_MGTPRC);
  667         temp = E1000_READ_REG(hw, E1000_MGTPDC);
  668         temp = E1000_READ_REG(hw, E1000_MGTPTC);
  669 }
  670
Cache object: 520533f118ee3315b458c4377dbf69d1
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FreeBSD/Linux Kernel Cross Reference sys/dev/em/e1000_82540.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/em/e1000_82540.c
