1 /*******************************************************************************
2
3 Copyright (c) 2001-2007, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 *******************************************************************************/
33 /* $FreeBSD$ */
34
35
36 /* e1000_82542 (rev 1 & 2)
37 */
38
39 #include "e1000_api.h"
40
41 void e1000_init_function_pointers_82542(struct e1000_hw *hw);
42
43 STATIC s32 e1000_init_phy_params_82542(struct e1000_hw *hw);
44 STATIC s32 e1000_init_nvm_params_82542(struct e1000_hw *hw);
45 STATIC s32 e1000_init_mac_params_82542(struct e1000_hw *hw);
46 STATIC s32 e1000_get_bus_info_82542(struct e1000_hw *hw);
47 STATIC s32 e1000_reset_hw_82542(struct e1000_hw *hw);
48 STATIC s32 e1000_init_hw_82542(struct e1000_hw *hw);
49 STATIC s32 e1000_setup_link_82542(struct e1000_hw *hw);
50 STATIC s32 e1000_led_on_82542(struct e1000_hw *hw);
51 STATIC s32 e1000_led_off_82542(struct e1000_hw *hw);
52 STATIC void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw);
53
54 struct e1000_dev_spec_82542 {
55 bool dma_fairness;
56 };
57
58 /**
59 * e1000_init_phy_params_82542 - Init PHY func ptrs.
60 * @hw: pointer to the HW structure
61 *
62 * This is a function pointer entry point called by the api module.
63 **/
64 STATIC s32 e1000_init_phy_params_82542(struct e1000_hw *hw)
65 {
66 struct e1000_phy_info *phy = &hw->phy;
67 s32 ret_val = E1000_SUCCESS;
68
69 DEBUGFUNC("e1000_init_phy_params_82542");
70
71 phy->type = e1000_phy_none;
72
73 return ret_val;
74 }
75
76 /**
77 * e1000_init_nvm_params_82542 - Init NVM func ptrs.
78 * @hw: pointer to the HW structure
79 *
80 * This is a function pointer entry point called by the api module.
81 **/
82 STATIC s32 e1000_init_nvm_params_82542(struct e1000_hw *hw)
83 {
84 struct e1000_nvm_info *nvm = &hw->nvm;
85 struct e1000_functions *func = &hw->func;
86
87 DEBUGFUNC("e1000_init_nvm_params_82542");
88
89 nvm->address_bits = 6;
90 nvm->delay_usec = 50;
91 nvm->opcode_bits = 3;
92 nvm->type = e1000_nvm_eeprom_microwire;
93 nvm->word_size = 64;
94
95 /* Function Pointers */
96 func->read_nvm = e1000_read_nvm_microwire;
97 func->release_nvm = e1000_stop_nvm;
98 func->write_nvm = e1000_write_nvm_microwire;
99 func->update_nvm = e1000_update_nvm_checksum_generic;
100 func->validate_nvm = e1000_validate_nvm_checksum_generic;
101
102 return E1000_SUCCESS;
103 }
104
105 /**
106 * e1000_init_mac_params_82542 - Init MAC func ptrs.
107 * @hw: pointer to the HW structure
108 *
109 * This is a function pointer entry point called by the api module.
110 **/
111 STATIC s32 e1000_init_mac_params_82542(struct e1000_hw *hw)
112 {
113 struct e1000_mac_info *mac = &hw->mac;
114 struct e1000_functions *func = &hw->func;
115 s32 ret_val = E1000_SUCCESS;
116
117 DEBUGFUNC("e1000_init_mac_params_82542");
118
119 /* Set media type */
120 hw->phy.media_type = e1000_media_type_fiber;
121
122 /* Set mta register count */
123 mac->mta_reg_count = 128;
124 /* Set rar entry count */
125 mac->rar_entry_count = E1000_RAR_ENTRIES;
126
127 /* Function pointers */
128
129 /* bus type/speed/width */
130 func->get_bus_info = e1000_get_bus_info_82542;
131 /* reset */
132 func->reset_hw = e1000_reset_hw_82542;
133 /* hw initialization */
134 func->init_hw = e1000_init_hw_82542;
135 /* link setup */
136 func->setup_link = e1000_setup_link_82542;
137 /* phy/fiber/serdes setup */
138 func->setup_physical_interface = e1000_setup_fiber_serdes_link_generic;
139 /* check for link */
140 func->check_for_link = e1000_check_for_fiber_link_generic;
141 /* multicast address update */
142 func->update_mc_addr_list = e1000_update_mc_addr_list_generic;
143 /* writing VFTA */
144 func->write_vfta = e1000_write_vfta_generic;
145 /* clearing VFTA */
146 func->clear_vfta = e1000_clear_vfta_generic;
147 /* setting MTA */
148 func->mta_set = e1000_mta_set_generic;
149 /* turn on/off LED */
150 func->led_on = e1000_led_on_82542;
151 func->led_off = e1000_led_off_82542;
152 /* remove device */
153 func->remove_device = e1000_remove_device_generic;
154 /* clear hardware counters */
155 func->clear_hw_cntrs = e1000_clear_hw_cntrs_82542;
156 /* link info */
157 func->get_link_up_info = e1000_get_speed_and_duplex_fiber_serdes_generic;
158
159 hw->dev_spec_size = sizeof(struct e1000_dev_spec_82542);
160
161 /* Device-specific structure allocation */
162 ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
163
164 return ret_val;
165 }
166
167 /**
168 * e1000_init_function_pointers_82542 - Init func ptrs.
169 * @hw: pointer to the HW structure
170 *
171 * The only function explicitly called by the api module to initialize
172 * all function pointers and parameters.
173 **/
174 void e1000_init_function_pointers_82542(struct e1000_hw *hw)
175 {
176 DEBUGFUNC("e1000_init_function_pointers_82542");
177
178 hw->func.init_mac_params = e1000_init_mac_params_82542;
179 hw->func.init_nvm_params = e1000_init_nvm_params_82542;
180 hw->func.init_phy_params = e1000_init_phy_params_82542;
181 }
182
183 /**
184 * e1000_get_bus_info_82542 - Obtain bus information for adapter
185 * @hw: pointer to the HW structure
186 *
187 * This will obtain information about the HW bus for which the
188 * adaper is attached and stores it in the hw structure. This is a function
189 * pointer entry point called by the api module.
190 **/
191 STATIC s32 e1000_get_bus_info_82542(struct e1000_hw *hw)
192 {
193 DEBUGFUNC("e1000_get_bus_info_82542");
194
195 hw->bus.type = e1000_bus_type_pci;
196 hw->bus.speed = e1000_bus_speed_unknown;
197 hw->bus.width = e1000_bus_width_unknown;
198
199 return E1000_SUCCESS;
200 }
201
202 /**
203 * e1000_reset_hw_82542 - Reset hardware
204 * @hw: pointer to the HW structure
205 *
206 * This resets the hardware into a known state. This is a
207 * function pointer entry point called by the api module.
208 **/
209 STATIC s32 e1000_reset_hw_82542(struct e1000_hw *hw)
210 {
211 struct e1000_bus_info *bus = &hw->bus;
212 s32 ret_val = E1000_SUCCESS;
213 u32 ctrl, icr;
214
215 DEBUGFUNC("e1000_reset_hw_82542");
216
217 if (hw->revision_id == E1000_REVISION_2) {
218 DEBUGOUT("Disabling MWI on 82542 rev 2\n");
219 e1000_pci_clear_mwi(hw);
220 }
221
222 DEBUGOUT("Masking off all interrupts\n");
223 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
224
225 E1000_WRITE_REG(hw, E1000_RCTL, 0);
226 E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
227 E1000_WRITE_FLUSH(hw);
228
229 /*
230 * Delay to allow any outstanding PCI transactions to complete before
231 * resetting the device
232 */
233 msec_delay(10);
234
235 ctrl = E1000_READ_REG(hw, E1000_CTRL);
236
237 DEBUGOUT("Issuing a global reset to 82542/82543 MAC\n");
238 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
239
240 e1000_reload_nvm(hw);
241 msec_delay(2);
242
243 E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
244 icr = E1000_READ_REG(hw, E1000_ICR);
245
246 if (hw->revision_id == E1000_REVISION_2) {
247 if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
248 e1000_pci_set_mwi(hw);
249 }
250
251 return ret_val;
252 }
253
254 /**
255 * e1000_init_hw_82542 - Initialize hardware
256 * @hw: pointer to the HW structure
257 *
258 * This inits the hardware readying it for operation. This is a
259 * function pointer entry point called by the api module.
260 **/
261 STATIC s32 e1000_init_hw_82542(struct e1000_hw *hw)
262 {
263 struct e1000_mac_info *mac = &hw->mac;
264 struct e1000_dev_spec_82542 *dev_spec;
265 s32 ret_val = E1000_SUCCESS;
266 u32 ctrl;
267 u16 i;
268
269 DEBUGFUNC("e1000_init_hw_82542");
270
271 dev_spec = (struct e1000_dev_spec_82542 *)hw->dev_spec;
272
273 /* Disabling VLAN filtering */
274 E1000_WRITE_REG(hw, E1000_VET, 0);
275 e1000_clear_vfta(hw);
276
277 /* For 82542 (rev 2.0), disable MWI and put the receiver into reset */
278 if (hw->revision_id == E1000_REVISION_2) {
279 DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");
280 e1000_pci_clear_mwi(hw);
281 E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST);
282 E1000_WRITE_FLUSH(hw);
283 msec_delay(5);
284 }
285
286 /* Setup the receive address. */
287 e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
288
289 /* For 82542 (rev 2.0), take the receiver out of reset and enable MWI */
290 if (hw->revision_id == E1000_REVISION_2) {
291 E1000_WRITE_REG(hw, E1000_RCTL, 0);
292 E1000_WRITE_FLUSH(hw);
293 msec_delay(1);
294 if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
295 e1000_pci_set_mwi(hw);
296 }
297
298 /* Zero out the Multicast HASH table */
299 DEBUGOUT("Zeroing the MTA\n");
300 for (i = 0; i < mac->mta_reg_count; i++)
301 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
302
303 /*
304 * Set the PCI priority bit correctly in the CTRL register. This
305 * determines if the adapter gives priority to receives, or if it
306 * gives equal priority to transmits and receives.
307 */
308 if (dev_spec->dma_fairness) {
309 ctrl = E1000_READ_REG(hw, E1000_CTRL);
310 E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);
311 }
312
313 /* Setup link and flow control */
314 ret_val = e1000_setup_link_82542(hw);
315
316 /*
317 * Clear all of the statistics registers (clear on read). It is
318 * important that we do this after we have tried to establish link
319 * because the symbol error count will increment wildly if there
320 * is no link.
321 */
322 e1000_clear_hw_cntrs_82542(hw);
323
324 return ret_val;
325 }
326
327 /**
328 * e1000_setup_link_82542 - Setup flow control and link settings
329 * @hw: pointer to the HW structure
330 *
331 * Determines which flow control settings to use, then configures flow
332 * control. Calls the appropriate media-specific link configuration
333 * function. Assuming the adapter has a valid link partner, a valid link
334 * should be established. Assumes the hardware has previously been reset
335 * and the transmitter and receiver are not enabled. This is a function
336 * pointer entry point called by the api module.
337 **/
338 STATIC s32 e1000_setup_link_82542(struct e1000_hw *hw)
339 {
340 struct e1000_mac_info *mac = &hw->mac;
341 struct e1000_functions *func = &hw->func;
342 s32 ret_val = E1000_SUCCESS;
343
344 DEBUGFUNC("e1000_setup_link_82542");
345
346 ret_val = e1000_set_default_fc_generic(hw);
347 if (ret_val)
348 goto out;
349
350 hw->fc.type &= ~e1000_fc_tx_pause;
351
352 if (mac->report_tx_early == 1)
353 hw->fc.type &= ~e1000_fc_rx_pause;
354
355 /*
356 * We want to save off the original Flow Control configuration just in
357 * case we get disconnected and then reconnected into a different hub
358 * or switch with different Flow Control capabilities.
359 */
360 hw->fc.original_type = hw->fc.type;
361
362 DEBUGOUT1("After fix-ups FlowControl is now = %x\n", hw->fc.type);
363
364 /* Call the necessary subroutine to configure the link. */
365 ret_val = func->setup_physical_interface(hw);
366 if (ret_val)
367 goto out;
368
369 /*
370 * Initialize the flow control address, type, and PAUSE timer
371 * registers to their default values. This is done even if flow
372 * control is disabled, because it does not hurt anything to
373 * initialize these registers.
374 */
375 DEBUGOUT("Initializing Flow Control address, type and timer regs\n");
376
377 E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
378 E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
379 E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);
380
381 E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
382
383 ret_val = e1000_set_fc_watermarks_generic(hw);
384
385 out:
386 return ret_val;
387 }
388
389 /**
390 * e1000_led_on_82542 - Turn on SW controllable LED
391 * @hw: pointer to the HW structure
392 *
393 * Turns the SW defined LED on. This is a function pointer entry point
394 * called by the api module.
395 **/
396 STATIC s32 e1000_led_on_82542(struct e1000_hw *hw)
397 {
398 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
399
400 DEBUGFUNC("e1000_led_on_82542");
401
402 ctrl |= E1000_CTRL_SWDPIN0;
403 ctrl |= E1000_CTRL_SWDPIO0;
404 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
405
406 return E1000_SUCCESS;
407 }
408
409 /**
410 * e1000_led_off_82542 - Turn off SW controllable LED
411 * @hw: pointer to the HW structure
412 *
413 * Turns the SW defined LED off. This is a function pointer entry point
414 * called by the api module.
415 **/
416 STATIC s32 e1000_led_off_82542(struct e1000_hw *hw)
417 {
418 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
419
420 DEBUGFUNC("e1000_led_off_82542");
421
422 ctrl &= ~E1000_CTRL_SWDPIN0;
423 ctrl |= E1000_CTRL_SWDPIO0;
424 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
425
426 return E1000_SUCCESS;
427 }
428
429 /**
430 * e1000_translate_register_82542 - Translate the proper regiser offset
431 * @reg: e1000 register to be read
432 *
433 * Registers in 82542 are located in different offsets than other adapters
434 * even though they function in the same manner. This function takes in
435 * the name of the register to read and returns the correct offset for
436 * 82542 silicon.
437 **/
438 u32 e1000_translate_register_82542(u32 reg)
439 {
440 /*
441 * Some of the 82542 registers are located at different
442 * offsets than they are in newer adapters.
443 * Despite the difference in location, the registers
444 * function in the same manner.
445 */
446 switch (reg) {
447 case E1000_RA:
448 reg = 0x00040;
449 break;
450 case E1000_RDTR:
451 reg = 0x00108;
452 break;
453 case E1000_RDBAL(0):
454 reg = 0x00110;
455 break;
456 case E1000_RDBAH(0):
457 reg = 0x00114;
458 break;
459 case E1000_RDLEN(0):
460 reg = 0x00118;
461 break;
462 case E1000_RDH(0):
463 reg = 0x00120;
464 break;
465 case E1000_RDT(0):
466 reg = 0x00128;
467 break;
468 case E1000_RDBAL(1):
469 reg = 0x00138;
470 break;
471 case E1000_RDBAH(1):
472 reg = 0x0013C;
473 break;
474 case E1000_RDLEN(1):
475 reg = 0x00140;
476 break;
477 case E1000_RDH(1):
478 reg = 0x00148;
479 break;
480 case E1000_RDT(1):
481 reg = 0x00150;
482 break;
483 case E1000_FCRTH:
484 reg = 0x00160;
485 break;
486 case E1000_FCRTL:
487 reg = 0x00168;
488 break;
489 case E1000_MTA:
490 reg = 0x00200;
491 break;
492 case E1000_TDBAL(0):
493 reg = 0x00420;
494 break;
495 case E1000_TDBAH(0):
496 reg = 0x00424;
497 break;
498 case E1000_TDLEN(0):
499 reg = 0x00428;
500 break;
501 case E1000_TDH(0):
502 reg = 0x00430;
503 break;
504 case E1000_TDT(0):
505 reg = 0x00438;
506 break;
507 case E1000_TIDV:
508 reg = 0x00440;
509 break;
510 case E1000_VFTA:
511 reg = 0x00600;
512 break;
513 case E1000_TDFH:
514 reg = 0x08010;
515 break;
516 case E1000_TDFT:
517 reg = 0x08018;
518 break;
519 default:
520 break;
521 }
522
523 return reg;
524 }
525
526 /**
527 * e1000_clear_hw_cntrs_82542 - Clear device specific hardware counters
528 * @hw: pointer to the HW structure
529 *
530 * Clears the hardware counters by reading the counter registers.
531 **/
532 STATIC void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw)
533 {
534 volatile u32 temp;
535
536 DEBUGFUNC("e1000_clear_hw_cntrs_82542");
537
538 e1000_clear_hw_cntrs_base_generic(hw);
539
540 temp = E1000_READ_REG(hw, E1000_PRC64);
541 temp = E1000_READ_REG(hw, E1000_PRC127);
542 temp = E1000_READ_REG(hw, E1000_PRC255);
543 temp = E1000_READ_REG(hw, E1000_PRC511);
544 temp = E1000_READ_REG(hw, E1000_PRC1023);
545 temp = E1000_READ_REG(hw, E1000_PRC1522);
546 temp = E1000_READ_REG(hw, E1000_PTC64);
547 temp = E1000_READ_REG(hw, E1000_PTC127);
548 temp = E1000_READ_REG(hw, E1000_PTC255);
549 temp = E1000_READ_REG(hw, E1000_PTC511);
550 temp = E1000_READ_REG(hw, E1000_PTC1023);
551 temp = E1000_READ_REG(hw, E1000_PTC1522);
552 }
Cache object: d4b80d1f44512a42cf01fbbcdd95fe91
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