1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
32
33 #ifdef DEV_NETMAP
34
35 #include "ena.h"
36 #include "ena_netmap.h"
37
38 #define ENA_NETMAP_MORE_FRAMES 1
39 #define ENA_NETMAP_NO_MORE_FRAMES 0
40 #define ENA_MAX_FRAMES 16384
41
42 struct ena_netmap_ctx {
43 struct netmap_kring *kring;
44 struct ena_adapter *adapter;
45 struct netmap_adapter *na;
46 struct netmap_slot *slots;
47 struct ena_ring *ring;
48 struct ena_com_io_cq *io_cq;
49 struct ena_com_io_sq *io_sq;
50 u_int nm_i;
51 uint16_t nt;
52 uint16_t lim;
53 };
54
55 /* Netmap callbacks */
56 static int ena_netmap_reg(struct netmap_adapter *, int);
57 static int ena_netmap_txsync(struct netmap_kring *, int);
58 static int ena_netmap_rxsync(struct netmap_kring *, int);
59
60 /* Helper functions */
61 static int ena_netmap_tx_frames(struct ena_netmap_ctx *);
62 static int ena_netmap_tx_frame(struct ena_netmap_ctx *);
63 static inline uint16_t ena_netmap_count_slots(struct ena_netmap_ctx *);
64 static inline uint16_t ena_netmap_packet_len(struct netmap_slot *, u_int,
65 uint16_t);
66 static int ena_netmap_copy_data(struct netmap_adapter *,
67 struct netmap_slot *, u_int, uint16_t, uint16_t, void *);
68 static int ena_netmap_map_single_slot(struct netmap_adapter *,
69 struct netmap_slot *, bus_dma_tag_t, bus_dmamap_t, void **, uint64_t *);
70 static int ena_netmap_tx_map_slots(struct ena_netmap_ctx *,
71 struct ena_tx_buffer *, void **, uint16_t *, uint16_t *);
72 static void ena_netmap_unmap_last_socket_chain(struct ena_netmap_ctx *,
73 struct ena_tx_buffer *);
74 static void ena_netmap_tx_cleanup(struct ena_netmap_ctx *);
75 static uint16_t ena_netmap_tx_clean_one(struct ena_netmap_ctx *,
76 uint16_t);
77 static inline int validate_tx_req_id(struct ena_ring *, uint16_t);
78 static int ena_netmap_rx_frames(struct ena_netmap_ctx *);
79 static int ena_netmap_rx_frame(struct ena_netmap_ctx *);
80 static int ena_netmap_rx_load_desc(struct ena_netmap_ctx *, uint16_t,
81 int *);
82 static void ena_netmap_rx_cleanup(struct ena_netmap_ctx *);
83 static void ena_netmap_fill_ctx(struct netmap_kring *,
84 struct ena_netmap_ctx *, uint16_t);
85
86 int
87 ena_netmap_attach(struct ena_adapter *adapter)
88 {
89 struct netmap_adapter na;
90
91 ena_trace(NULL, ENA_NETMAP, "netmap attach\n");
92
93 bzero(&na, sizeof(na));
94 na.na_flags = NAF_MOREFRAG;
95 na.ifp = adapter->ifp;
96 na.num_tx_desc = adapter->requested_tx_ring_size;
97 na.num_rx_desc = adapter->requested_rx_ring_size;
98 na.num_tx_rings = adapter->num_io_queues;
99 na.num_rx_rings = adapter->num_io_queues;
100 na.rx_buf_maxsize = adapter->buf_ring_size;
101 na.nm_txsync = ena_netmap_txsync;
102 na.nm_rxsync = ena_netmap_rxsync;
103 na.nm_register = ena_netmap_reg;
104
105 return (netmap_attach(&na));
106 }
107
108 int
109 ena_netmap_alloc_rx_slot(struct ena_adapter *adapter,
110 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info)
111 {
112 struct netmap_adapter *na = NA(adapter->ifp);
113 struct netmap_kring *kring;
114 struct netmap_ring *ring;
115 struct netmap_slot *slot;
116 void *addr;
117 uint64_t paddr;
118 int nm_i, qid, head, lim, rc;
119
120 /* if previously allocated frag is not used */
121 if (unlikely(rx_info->netmap_buf_idx != 0))
122 return (0);
123
124 qid = rx_ring->qid;
125 kring = na->rx_rings[qid];
126 nm_i = kring->nr_hwcur;
127 head = kring->rhead;
128
129 ena_trace(NULL, ENA_NETMAP | ENA_DBG, "nr_hwcur: %d, nr_hwtail: %d, "
130 "rhead: %d, rcur: %d, rtail: %d\n", kring->nr_hwcur,
131 kring->nr_hwtail, kring->rhead, kring->rcur, kring->rtail);
132
133 if ((nm_i == head) && rx_ring->initialized) {
134 ena_trace(NULL, ENA_NETMAP, "No free slots in netmap ring\n");
135 return (ENOMEM);
136 }
137
138 ring = kring->ring;
139 if (ring == NULL) {
140 device_printf(adapter->pdev, "Rx ring %d is NULL\n", qid);
141 return (EFAULT);
142 }
143 slot = &ring->slot[nm_i];
144
145 addr = PNMB(na, slot, &paddr);
146 if (addr == NETMAP_BUF_BASE(na)) {
147 device_printf(adapter->pdev, "Bad buff in slot\n");
148 return (EFAULT);
149 }
150
151 rc = netmap_load_map(na, adapter->rx_buf_tag, rx_info->map, addr);
152 if (rc != 0) {
153 ena_trace(NULL, ENA_WARNING, "DMA mapping error\n");
154 return (rc);
155 }
156 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map, BUS_DMASYNC_PREREAD);
157
158 rx_info->ena_buf.paddr = paddr;
159 rx_info->ena_buf.len = ring->nr_buf_size;
160 rx_info->mbuf = NULL;
161 rx_info->netmap_buf_idx = slot->buf_idx;
162
163 slot->buf_idx = 0;
164
165 lim = kring->nkr_num_slots - 1;
166 kring->nr_hwcur = nm_next(nm_i, lim);
167
168 return (0);
169 }
170
171 void
172 ena_netmap_free_rx_slot(struct ena_adapter *adapter,
173 struct ena_ring *rx_ring, struct ena_rx_buffer *rx_info)
174 {
175 struct netmap_adapter *na;
176 struct netmap_kring *kring;
177 struct netmap_slot *slot;
178 int nm_i, qid, lim;
179
180 na = NA(adapter->ifp);
181 if (na == NULL) {
182 device_printf(adapter->pdev, "netmap adapter is NULL\n");
183 return;
184 }
185
186 if (na->rx_rings == NULL) {
187 device_printf(adapter->pdev, "netmap rings are NULL\n");
188 return;
189 }
190
191 qid = rx_ring->qid;
192 kring = na->rx_rings[qid];
193 if (kring == NULL) {
194 device_printf(adapter->pdev,
195 "netmap kernel ring %d is NULL\n", qid);
196 return;
197 }
198
199 lim = kring->nkr_num_slots - 1;
200 nm_i = nm_prev(kring->nr_hwcur, lim);
201
202 if (kring->nr_mode != NKR_NETMAP_ON)
203 return;
204
205 bus_dmamap_sync(adapter->rx_buf_tag, rx_info->map,
206 BUS_DMASYNC_POSTREAD);
207 netmap_unload_map(na, adapter->rx_buf_tag, rx_info->map);
208
209 KASSERT(kring->ring == NULL, ("Netmap Rx ring is NULL\n"));
210
211 slot = &kring->ring->slot[nm_i];
212
213 ENA_WARN(slot->buf_idx != 0, NULL, "Overwrite slot buf\n");
214 slot->buf_idx = rx_info->netmap_buf_idx;
215 slot->flags = NS_BUF_CHANGED;
216
217 rx_info->netmap_buf_idx = 0;
218 kring->nr_hwcur = nm_i;
219 }
220
221 static bool
222 ena_ring_in_netmap(struct ena_adapter *adapter, int qid, enum txrx x)
223 {
224 struct netmap_adapter *na;
225 struct netmap_kring *kring;
226
227 if (adapter->ifp->if_capenable & IFCAP_NETMAP) {
228 na = NA(adapter->ifp);
229 kring = (x == NR_RX) ? na->rx_rings[qid] : na->tx_rings[qid];
230 if (kring->nr_mode == NKR_NETMAP_ON)
231 return true;
232 }
233 return false;
234 }
235
236 bool
237 ena_tx_ring_in_netmap(struct ena_adapter *adapter, int qid)
238 {
239 return ena_ring_in_netmap(adapter, qid, NR_TX);
240 }
241
242 bool
243 ena_rx_ring_in_netmap(struct ena_adapter *adapter, int qid)
244 {
245 return ena_ring_in_netmap(adapter, qid, NR_RX);
246 }
247
248 static void
249 ena_netmap_reset_ring(struct ena_adapter *adapter, int qid, enum txrx x)
250 {
251 if (!ena_ring_in_netmap(adapter, qid, x))
252 return;
253
254 netmap_reset(NA(adapter->ifp), x, qid, 0);
255 ena_trace(NULL, ENA_NETMAP, "%s ring %d is in netmap mode\n",
256 (x == NR_TX) ? "Tx" : "Rx", qid);
257 }
258
259 void
260 ena_netmap_reset_rx_ring(struct ena_adapter *adapter, int qid)
261 {
262 ena_netmap_reset_ring(adapter, qid, NR_RX);
263 }
264
265 void
266 ena_netmap_reset_tx_ring(struct ena_adapter *adapter, int qid)
267 {
268 ena_netmap_reset_ring(adapter, qid, NR_TX);
269 }
270
271 static int
272 ena_netmap_reg(struct netmap_adapter *na, int onoff)
273 {
274 struct ifnet *ifp = na->ifp;
275 struct ena_adapter* adapter = ifp->if_softc;
276 struct netmap_kring *kring;
277 enum txrx t;
278 int rc, i;
279
280 ENA_LOCK_LOCK(adapter);
281 ENA_FLAG_CLEAR_ATOMIC(ENA_FLAG_TRIGGER_RESET, adapter);
282 ena_down(adapter);
283
284 if (onoff) {
285 ena_trace(NULL, ENA_NETMAP, "netmap on\n");
286 for_rx_tx(t) {
287 for (i = 0; i <= nma_get_nrings(na, t); i++) {
288 kring = NMR(na, t)[i];
289 if (nm_kring_pending_on(kring)) {
290 kring->nr_mode = NKR_NETMAP_ON;
291 }
292 }
293 }
294 nm_set_native_flags(na);
295 } else {
296 ena_trace(NULL, ENA_NETMAP, "netmap off\n");
297 nm_clear_native_flags(na);
298 for_rx_tx(t) {
299 for (i = 0; i <= nma_get_nrings(na, t); i++) {
300 kring = NMR(na, t)[i];
301 if (nm_kring_pending_off(kring)) {
302 kring->nr_mode = NKR_NETMAP_OFF;
303 }
304 }
305 }
306 }
307
308 rc = ena_up(adapter);
309 if (rc != 0) {
310 ena_trace(NULL, ENA_WARNING, "ena_up failed with rc=%d\n", rc);
311 adapter->reset_reason = ENA_REGS_RESET_DRIVER_INVALID_STATE;
312 nm_clear_native_flags(na);
313 ena_destroy_device(adapter, false);
314 ENA_FLAG_SET_ATOMIC(ENA_FLAG_DEV_UP_BEFORE_RESET, adapter);
315 rc = ena_restore_device(adapter);
316 }
317 ENA_LOCK_UNLOCK(adapter);
318
319 return (rc);
320 }
321
322 static int
323 ena_netmap_txsync(struct netmap_kring *kring, int flags)
324 {
325 struct ena_netmap_ctx ctx;
326 int rc = 0;
327
328 ena_netmap_fill_ctx(kring, &ctx, ENA_IO_TXQ_IDX(kring->ring_id));
329 ctx.ring = &ctx.adapter->tx_ring[kring->ring_id];
330
331 ENA_RING_MTX_LOCK(ctx.ring);
332 if (unlikely(!ENA_FLAG_ISSET(ENA_FLAG_DEV_UP, ctx.adapter)))
333 goto txsync_end;
334
335 if (unlikely(!ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, ctx.adapter)))
336 goto txsync_end;
337
338 rc = ena_netmap_tx_frames(&ctx);
339 ena_netmap_tx_cleanup(&ctx);
340
341 txsync_end:
342 ENA_RING_MTX_UNLOCK(ctx.ring);
343 return (rc);
344 }
345
346 static int
347 ena_netmap_tx_frames(struct ena_netmap_ctx *ctx)
348 {
349 struct ena_ring *tx_ring = ctx->ring;
350 int rc = 0;
351
352 ctx->nm_i = ctx->kring->nr_hwcur;
353 ctx->nt = ctx->ring->next_to_use;
354
355 __builtin_prefetch(&ctx->slots[ctx->nm_i]);
356
357 while (ctx->nm_i != ctx->kring->rhead) {
358 if ((rc = ena_netmap_tx_frame(ctx)) != 0) {
359 /*
360 * When there is no empty space in Tx ring, error is
361 * still being returned. It should not be passed to the
362 * netmap, as application knows current ring state from
363 * netmap ring pointers. Returning error there could
364 * cause application to exit, but the Tx ring is commonly
365 * being full.
366 */
367 if (rc == ENA_COM_NO_MEM)
368 rc = 0;
369 break;
370 }
371 tx_ring->acum_pkts++;
372 }
373
374 /* If any packet was sent... */
375 if (likely(ctx->nm_i != ctx->kring->nr_hwcur)) {
376 /* ...send the doorbell to the device. */
377 ena_com_write_sq_doorbell(ctx->io_sq);
378 counter_u64_add(ctx->ring->tx_stats.doorbells, 1);
379 tx_ring->acum_pkts = 0;
380
381 ctx->ring->next_to_use = ctx->nt;
382 ctx->kring->nr_hwcur = ctx->nm_i;
383 }
384
385 return (rc);
386 }
387
388 static int
389 ena_netmap_tx_frame(struct ena_netmap_ctx *ctx)
390 {
391 struct ena_com_tx_ctx ena_tx_ctx;
392 struct ena_adapter *adapter;
393 struct ena_ring *tx_ring;
394 struct ena_tx_buffer *tx_info;
395 uint16_t req_id;
396 uint16_t header_len;
397 uint16_t packet_len;
398 int nb_hw_desc;
399 int rc;
400 void *push_hdr;
401
402 adapter = ctx->adapter;
403 if (ena_netmap_count_slots(ctx) > adapter->max_tx_sgl_size) {
404 ena_trace(NULL, ENA_WARNING, "Too many slots per packet\n");
405 return (EINVAL);
406 }
407
408 tx_ring = ctx->ring;
409
410 req_id = tx_ring->free_tx_ids[ctx->nt];
411 tx_info = &tx_ring->tx_buffer_info[req_id];
412 tx_info->num_of_bufs = 0;
413 tx_info->nm_info.sockets_used = 0;
414
415 rc = ena_netmap_tx_map_slots(ctx, tx_info, &push_hdr, &header_len,
416 &packet_len);
417 if (unlikely(rc != 0)) {
418 device_printf(adapter->pdev, "Failed to map Tx slot\n");
419 return (rc);
420 }
421
422 bzero(&ena_tx_ctx, sizeof(struct ena_com_tx_ctx));
423 ena_tx_ctx.ena_bufs = tx_info->bufs;
424 ena_tx_ctx.push_header = push_hdr;
425 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
426 ena_tx_ctx.req_id = req_id;
427 ena_tx_ctx.header_len = header_len;
428
429 /* There are no any offloads, as the netmap doesn't support them */
430
431 if (tx_ring->acum_pkts == DB_THRESHOLD ||
432 ena_com_is_doorbell_needed(ctx->io_sq, &ena_tx_ctx)) {
433 ena_com_write_sq_doorbell(ctx->io_sq);
434 counter_u64_add(tx_ring->tx_stats.doorbells, 1);
435 tx_ring->acum_pkts = 0;
436 }
437
438 rc = ena_com_prepare_tx(ctx->io_sq, &ena_tx_ctx, &nb_hw_desc);
439 if (unlikely(rc != 0)) {
440 if (likely(rc == ENA_COM_NO_MEM)) {
441 ena_trace(NULL, ENA_NETMAP | ENA_DBG | ENA_TXPTH,
442 "Tx ring[%d] is out of space\n", tx_ring->que->id);
443 } else {
444 device_printf(adapter->pdev,
445 "Failed to prepare Tx bufs\n");
446 }
447 counter_u64_add(tx_ring->tx_stats.prepare_ctx_err, 1);
448
449 ena_netmap_unmap_last_socket_chain(ctx, tx_info);
450 return (rc);
451 }
452
453 counter_enter();
454 counter_u64_add_protected(tx_ring->tx_stats.cnt, 1);
455 counter_u64_add_protected(tx_ring->tx_stats.bytes, packet_len);
456 counter_u64_add_protected(adapter->hw_stats.tx_packets, 1);
457 counter_u64_add_protected(adapter->hw_stats.tx_bytes, packet_len);
458 counter_exit();
459
460 tx_info->tx_descs = nb_hw_desc;
461
462 ctx->nt = ENA_TX_RING_IDX_NEXT(ctx->nt, ctx->ring->ring_size);
463
464 for (unsigned int i = 0; i < tx_info->num_of_bufs; i++)
465 bus_dmamap_sync(adapter->tx_buf_tag,
466 tx_info->nm_info.map_seg[i], BUS_DMASYNC_PREWRITE);
467
468 return (0);
469 }
470
471 static inline uint16_t
472 ena_netmap_count_slots(struct ena_netmap_ctx *ctx)
473 {
474 uint16_t slots = 1;
475 uint16_t nm = ctx->nm_i;
476
477 while ((ctx->slots[nm].flags & NS_MOREFRAG) != 0) {
478 slots++;
479 nm = nm_next(nm, ctx->lim);
480 }
481
482 return slots;
483 }
484
485 static inline uint16_t
486 ena_netmap_packet_len(struct netmap_slot *slots, u_int slot_index,
487 uint16_t limit)
488 {
489 struct netmap_slot *nm_slot;
490 uint16_t packet_size = 0;
491
492 do {
493 nm_slot = &slots[slot_index];
494 packet_size += nm_slot->len;
495 slot_index = nm_next(slot_index, limit);
496 } while ((nm_slot->flags & NS_MOREFRAG) != 0);
497
498 return packet_size;
499 }
500
501 static int
502 ena_netmap_copy_data(struct netmap_adapter *na, struct netmap_slot *slots,
503 u_int slot_index, uint16_t limit, uint16_t bytes_to_copy, void *destination)
504 {
505 struct netmap_slot *nm_slot;
506 void *slot_vaddr;
507 uint16_t packet_size;
508 uint16_t data_amount;
509
510 packet_size = 0;
511 do {
512 nm_slot = &slots[slot_index];
513 slot_vaddr = NMB(na, nm_slot);
514 if (unlikely(slot_vaddr == NULL))
515 return (EINVAL);
516
517 data_amount = min_t(uint16_t, bytes_to_copy, nm_slot->len);
518 memcpy(destination, slot_vaddr, data_amount);
519 bytes_to_copy -= data_amount;
520
521 slot_index = nm_next(slot_index, limit);
522 } while ((nm_slot->flags & NS_MOREFRAG) != 0 && bytes_to_copy > 0);
523
524 return (0);
525 }
526
527 static int
528 ena_netmap_map_single_slot(struct netmap_adapter *na, struct netmap_slot *slot,
529 bus_dma_tag_t dmatag, bus_dmamap_t dmamap, void **vaddr, uint64_t *paddr)
530 {
531 int rc;
532
533 *vaddr = PNMB(na, slot, paddr);
534 if (unlikely(vaddr == NULL)) {
535 ena_trace(NULL, ENA_ALERT, "Slot address is NULL\n");
536 return (EINVAL);
537 }
538
539 rc = netmap_load_map(na, dmatag, dmamap, *vaddr);
540 if (unlikely(rc != 0)) {
541 ena_trace(NULL, ENA_ALERT, "Failed to map slot %d for DMA\n",
542 slot->buf_idx);
543 return (EINVAL);
544 }
545
546 return (0);
547 }
548
549 static int
550 ena_netmap_tx_map_slots(struct ena_netmap_ctx *ctx,
551 struct ena_tx_buffer *tx_info, void **push_hdr, uint16_t *header_len,
552 uint16_t *packet_len)
553 {
554 struct netmap_slot *slot;
555 struct ena_com_buf *ena_buf;
556 struct ena_adapter *adapter;
557 struct ena_ring *tx_ring;
558 struct ena_netmap_tx_info *nm_info;
559 bus_dmamap_t *nm_maps;
560 void *vaddr;
561 uint64_t paddr;
562 uint32_t *nm_buf_idx;
563 uint32_t slot_head_len;
564 uint32_t frag_len;
565 uint32_t remaining_len;
566 uint16_t push_len;
567 uint16_t delta;
568 int rc;
569
570 adapter = ctx->adapter;
571 tx_ring = ctx->ring;
572 ena_buf = tx_info->bufs;
573 nm_info = &tx_info->nm_info;
574 nm_maps = nm_info->map_seg;
575 nm_buf_idx = nm_info->socket_buf_idx;
576 slot = &ctx->slots[ctx->nm_i];
577
578 slot_head_len = slot->len;
579 *packet_len = ena_netmap_packet_len(ctx->slots, ctx->nm_i, ctx->lim);
580 remaining_len = *packet_len;
581 delta = 0;
582
583 __builtin_prefetch(&ctx->slots[ctx->nm_i + 1]);
584 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
585 /*
586 * When the device is in LLQ mode, the driver will copy
587 * the header into the device memory space.
588 * The ena_com layer assumes that the header is in a linear
589 * memory space.
590 * This assumption might be wrong since part of the header
591 * can be in the fragmented buffers.
592 * First, check if header fits in the first slot. If not, copy
593 * it to separate buffer that will be holding linearized data.
594 */
595 push_len = min_t(uint32_t, *packet_len,
596 tx_ring->tx_max_header_size);
597 *header_len = push_len;
598 /* If header is in linear space, just point to socket's data. */
599 if (likely(push_len <= slot_head_len)) {
600 *push_hdr = NMB(ctx->na, slot);
601 if (unlikely(push_hdr == NULL)) {
602 device_printf(adapter->pdev,
603 "Slot vaddress is NULL\n");
604 return (EINVAL);
605 }
606 /*
607 * Otherwise, copy whole portion of header from multiple slots
608 * to intermediate buffer.
609 */
610 } else {
611 rc = ena_netmap_copy_data(ctx->na,
612 ctx->slots,
613 ctx->nm_i,
614 ctx->lim,
615 push_len,
616 tx_ring->push_buf_intermediate_buf);
617 if (unlikely(rc)) {
618 device_printf(adapter->pdev,
619 "Failed to copy data from slots to push_buf\n");
620 return (EINVAL);
621 }
622
623 *push_hdr = tx_ring->push_buf_intermediate_buf;
624 counter_u64_add(tx_ring->tx_stats.llq_buffer_copy, 1);
625
626 delta = push_len - slot_head_len;
627 }
628
629 ena_trace(NULL, ENA_NETMAP | ENA_DBG | ENA_TXPTH,
630 "slot: %d header_buf->vaddr: %p push_len: %d\n",
631 slot->buf_idx, *push_hdr, push_len);
632
633 /*
634 * If header was in linear memory space, map for the dma rest of the data
635 * in the first mbuf of the mbuf chain.
636 */
637 if (slot_head_len > push_len) {
638 rc = ena_netmap_map_single_slot(ctx->na,
639 slot,
640 adapter->tx_buf_tag,
641 *nm_maps,
642 &vaddr,
643 &paddr);
644 if (unlikely(rc != 0)) {
645 device_printf(adapter->pdev,
646 "DMA mapping error\n");
647 return (rc);
648 }
649 nm_maps++;
650
651 ena_buf->paddr = paddr + push_len;
652 ena_buf->len = slot->len - push_len;
653 ena_buf++;
654
655 tx_info->num_of_bufs++;
656 }
657
658 remaining_len -= slot->len;
659
660 /* Save buf idx before advancing */
661 *nm_buf_idx = slot->buf_idx;
662 nm_buf_idx++;
663 slot->buf_idx = 0;
664
665 /* Advance to the next socket */
666 ctx->nm_i = nm_next(ctx->nm_i, ctx->lim);
667 slot = &ctx->slots[ctx->nm_i];
668 nm_info->sockets_used++;
669
670 /*
671 * If header is in non linear space (delta > 0), then skip mbufs
672 * containing header and map the last one containing both header
673 * and the packet data.
674 * The first segment is already counted in.
675 */
676 while (delta > 0) {
677 __builtin_prefetch(&ctx->slots[ctx->nm_i + 1]);
678 frag_len = slot->len;
679
680 /*
681 * If whole segment contains header just move to the
682 * next one and reduce delta.
683 */
684 if (unlikely(delta >= frag_len)) {
685 delta -= frag_len;
686 } else {
687 /*
688 * Map the data and then assign it with the
689 * offsets
690 */
691 rc = ena_netmap_map_single_slot(ctx->na,
692 slot,
693 adapter->tx_buf_tag,
694 *nm_maps,
695 &vaddr,
696 &paddr);
697 if (unlikely(rc != 0)) {
698 device_printf(adapter->pdev,
699 "DMA mapping error\n");
700 goto error_map;
701 }
702 nm_maps++;
703
704 ena_buf->paddr = paddr + delta;
705 ena_buf->len = slot->len - delta;
706 ena_buf++;
707
708 tx_info->num_of_bufs++;
709 delta = 0;
710 }
711
712 remaining_len -= slot->len;
713
714 /* Save buf idx before advancing */
715 *nm_buf_idx = slot->buf_idx;
716 nm_buf_idx++;
717 slot->buf_idx = 0;
718
719 /* Advance to the next socket */
720 ctx->nm_i = nm_next(ctx->nm_i, ctx->lim);
721 slot = &ctx->slots[ctx->nm_i];
722 nm_info->sockets_used++;
723 }
724 } else {
725 *push_hdr = NULL;
726 /*
727 * header_len is just a hint for the device. Because netmap is
728 * not giving us any information about packet header length and
729 * it is not guaranteed that all packet headers will be in the
730 * 1st slot, setting header_len to 0 is making the device ignore
731 * this value and resolve header on it's own.
732 */
733 *header_len = 0;
734 }
735
736 /* Map all remaining data (regular routine for non-LLQ mode) */
737 while (remaining_len > 0) {
738 __builtin_prefetch(&ctx->slots[ctx->nm_i + 1]);
739
740 rc = ena_netmap_map_single_slot(ctx->na,
741 slot,
742 adapter->tx_buf_tag,
743 *nm_maps,
744 &vaddr,
745 &paddr);
746 if (unlikely(rc != 0)) {
747 device_printf(adapter->pdev,
748 "DMA mapping error\n");
749 goto error_map;
750 }
751 nm_maps++;
752
753 ena_buf->paddr = paddr;
754 ena_buf->len = slot->len;
755 ena_buf++;
756
757 tx_info->num_of_bufs++;
758
759 remaining_len -= slot->len;
760
761 /* Save buf idx before advancing */
762 *nm_buf_idx = slot->buf_idx;
763 nm_buf_idx++;
764 slot->buf_idx = 0;
765
766 /* Advance to the next socket */
767 ctx->nm_i = nm_next(ctx->nm_i, ctx->lim);
768 slot = &ctx->slots[ctx->nm_i];
769 nm_info->sockets_used++;
770 }
771
772 return (0);
773
774 error_map:
775 ena_netmap_unmap_last_socket_chain(ctx, tx_info);
776
777 return (rc);
778 }
779
780 static void
781 ena_netmap_unmap_last_socket_chain(struct ena_netmap_ctx *ctx,
782 struct ena_tx_buffer *tx_info)
783 {
784 struct ena_netmap_tx_info *nm_info;
785 int n;
786
787 nm_info = &tx_info->nm_info;
788
789 /**
790 * As the used sockets must not be equal to the buffers used in the LLQ
791 * mode, they must be treated separately.
792 * First, unmap the DMA maps.
793 */
794 n = tx_info->num_of_bufs;
795 while (n--) {
796 netmap_unload_map(ctx->na, ctx->adapter->tx_buf_tag,
797 nm_info->map_seg[n]);
798 }
799 tx_info->num_of_bufs = 0;
800
801 /* Next, retain the sockets back to the userspace */
802 n = nm_info->sockets_used;
803 while (n--) {
804 ctx->slots[ctx->nm_i].buf_idx = nm_info->socket_buf_idx[n];
805 ctx->slots[ctx->nm_i].flags = NS_BUF_CHANGED;
806 nm_info->socket_buf_idx[n] = 0;
807 ctx->nm_i = nm_prev(ctx->nm_i, ctx->lim);
808 }
809 nm_info->sockets_used = 0;
810 }
811
812 static void
813 ena_netmap_tx_cleanup(struct ena_netmap_ctx *ctx)
814 {
815 uint16_t req_id;
816 uint16_t total_tx_descs = 0;
817
818 ctx->nm_i = ctx->kring->nr_hwtail;
819 ctx->nt = ctx->ring->next_to_clean;
820
821 /* Reclaim buffers for completed transmissions */
822 while (ena_com_tx_comp_req_id_get(ctx->io_cq, &req_id) >= 0) {
823 if (validate_tx_req_id(ctx->ring, req_id) != 0)
824 break;
825 total_tx_descs += ena_netmap_tx_clean_one(ctx, req_id);
826 }
827
828 ctx->kring->nr_hwtail = ctx->nm_i;
829
830 if (total_tx_descs > 0) {
831 /* acknowledge completion of sent packets */
832 ctx->ring->next_to_clean = ctx->nt;
833 ena_com_comp_ack(ctx->ring->ena_com_io_sq, total_tx_descs);
834 ena_com_update_dev_comp_head(ctx->ring->ena_com_io_cq);
835 }
836 }
837
838 static uint16_t
839 ena_netmap_tx_clean_one(struct ena_netmap_ctx *ctx, uint16_t req_id)
840 {
841 struct ena_tx_buffer *tx_info;
842 struct ena_netmap_tx_info *nm_info;
843 int n;
844
845 tx_info = &ctx->ring->tx_buffer_info[req_id];
846 nm_info = &tx_info->nm_info;
847
848 /**
849 * As the used sockets must not be equal to the buffers used in the LLQ
850 * mode, they must be treated separately.
851 * First, unmap the DMA maps.
852 */
853 n = tx_info->num_of_bufs;
854 for (n = 0; n < tx_info->num_of_bufs; n++) {
855 netmap_unload_map(ctx->na, ctx->adapter->tx_buf_tag,
856 nm_info->map_seg[n]);
857 }
858 tx_info->num_of_bufs = 0;
859
860 /* Next, retain the sockets back to the userspace */
861 for (n = 0; n < nm_info->sockets_used; n++) {
862 ctx->nm_i = nm_next(ctx->nm_i, ctx->lim);
863 ENA_WARN(ctx->slots[ctx->nm_i].buf_idx != 0, NULL,
864 "Tx idx is not 0.\n");
865 ctx->slots[ctx->nm_i].buf_idx = nm_info->socket_buf_idx[n];
866 ctx->slots[ctx->nm_i].flags = NS_BUF_CHANGED;
867 nm_info->socket_buf_idx[n] = 0;
868 }
869 nm_info->sockets_used = 0;
870
871 ctx->ring->free_tx_ids[ctx->nt] = req_id;
872 ctx->nt = ENA_TX_RING_IDX_NEXT(ctx->nt, ctx->lim);
873
874 return tx_info->tx_descs;
875 }
876
877 static inline int
878 validate_tx_req_id(struct ena_ring *tx_ring, uint16_t req_id)
879 {
880 struct ena_adapter *adapter = tx_ring->adapter;
881
882 if (likely(req_id < tx_ring->ring_size))
883 return (0);
884
885 ena_trace(NULL, ENA_WARNING, "Invalid req_id: %hu\n", req_id);
886 counter_u64_add(tx_ring->tx_stats.bad_req_id, 1);
887
888 ena_trigger_reset(adapter, ENA_REGS_RESET_INV_TX_REQ_ID);
889
890 return (EFAULT);
891 }
892
893 static int
894 ena_netmap_rxsync(struct netmap_kring *kring, int flags)
895 {
896 struct ena_netmap_ctx ctx;
897 int rc;
898
899 ena_netmap_fill_ctx(kring, &ctx, ENA_IO_RXQ_IDX(kring->ring_id));
900 ctx.ring = &ctx.adapter->rx_ring[kring->ring_id];
901
902 if (ctx.kring->rhead > ctx.lim) {
903 /* Probably not needed to release slots from RX ring. */
904 return (netmap_ring_reinit(ctx.kring));
905 }
906
907 if (unlikely((if_getdrvflags(ctx.na->ifp) & IFF_DRV_RUNNING) == 0))
908 return (0);
909
910 if (unlikely(!ENA_FLAG_ISSET(ENA_FLAG_LINK_UP, ctx.adapter)))
911 return (0);
912
913 if ((rc = ena_netmap_rx_frames(&ctx)) != 0)
914 return (rc);
915
916 ena_netmap_rx_cleanup(&ctx);
917
918 return (0);
919 }
920
921 static inline int
922 ena_netmap_rx_frames(struct ena_netmap_ctx *ctx)
923 {
924 int rc = 0;
925 int frames_counter = 0;
926
927 ctx->nt = ctx->ring->next_to_clean;
928 ctx->nm_i = ctx->kring->nr_hwtail;
929
930 while((rc = ena_netmap_rx_frame(ctx)) == ENA_NETMAP_MORE_FRAMES) {
931 frames_counter++;
932 /* In case of multiple frames, it is not an error. */
933 rc = 0;
934 if (frames_counter > ENA_MAX_FRAMES) {
935 device_printf(ctx->adapter->pdev,
936 "Driver is stuck in the Rx loop\n");
937 break;
938 }
939 };
940
941 ctx->kring->nr_hwtail = ctx->nm_i;
942 ctx->kring->nr_kflags &= ~NKR_PENDINTR;
943 ctx->ring->next_to_clean = ctx->nt;
944
945 return (rc);
946 }
947
948 static inline int
949 ena_netmap_rx_frame(struct ena_netmap_ctx *ctx)
950 {
951 struct ena_com_rx_ctx ena_rx_ctx;
952 enum ena_regs_reset_reason_types reset_reason;
953 int rc, len = 0;
954 uint16_t buf, nm;
955
956 ena_rx_ctx.ena_bufs = ctx->ring->ena_bufs;
957 ena_rx_ctx.max_bufs = ctx->adapter->max_rx_sgl_size;
958 bus_dmamap_sync(ctx->io_cq->cdesc_addr.mem_handle.tag,
959 ctx->io_cq->cdesc_addr.mem_handle.map, BUS_DMASYNC_POSTREAD);
960
961 rc = ena_com_rx_pkt(ctx->io_cq, ctx->io_sq, &ena_rx_ctx);
962 if (unlikely(rc != 0)) {
963 ena_trace(NULL, ENA_ALERT,
964 "Failed to read pkt from the device with error: %d\n", rc);
965 if (rc == ENA_COM_NO_SPACE) {
966 counter_u64_add(ctx->ring->rx_stats.bad_desc_num, 1);
967 reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
968 } else {
969 counter_u64_add(ctx->ring->rx_stats.bad_req_id, 1);
970 reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
971 }
972 ena_trigger_reset(ctx->adapter, reset_reason);
973 return (rc);
974 }
975 if (unlikely(ena_rx_ctx.descs == 0))
976 return (ENA_NETMAP_NO_MORE_FRAMES);
977
978 ena_trace(NULL, ENA_NETMAP | ENA_DBG, "Rx: q %d got packet from ena. descs #:"
979 " %d l3 proto %d l4 proto %d hash: %x\n", ctx->ring->qid,
980 ena_rx_ctx.descs, ena_rx_ctx.l3_proto, ena_rx_ctx.l4_proto,
981 ena_rx_ctx.hash);
982
983 for (buf = 0; buf < ena_rx_ctx.descs; buf++)
984 if ((rc = ena_netmap_rx_load_desc(ctx, buf, &len)) != 0)
985 break;
986 /*
987 * ena_netmap_rx_load_desc doesn't know the number of descriptors.
988 * It just set flag NS_MOREFRAG to all slots, then here flag of
989 * last slot is cleared.
990 */
991 ctx->slots[nm_prev(ctx->nm_i, ctx->lim)].flags = NS_BUF_CHANGED;
992
993 if (rc != 0) {
994 goto rx_clear_desc;
995 }
996
997 bus_dmamap_sync(ctx->io_cq->cdesc_addr.mem_handle.tag,
998 ctx->io_cq->cdesc_addr.mem_handle.map, BUS_DMASYNC_PREREAD);
999
1000 counter_enter();
1001 counter_u64_add_protected(ctx->ring->rx_stats.bytes, len);
1002 counter_u64_add_protected(ctx->adapter->hw_stats.rx_bytes, len);
1003 counter_u64_add_protected(ctx->ring->rx_stats.cnt, 1);
1004 counter_u64_add_protected(ctx->adapter->hw_stats.rx_packets, 1);
1005 counter_exit();
1006
1007 return (ENA_NETMAP_MORE_FRAMES);
1008
1009 rx_clear_desc:
1010 nm = ctx->nm_i;
1011
1012 /* Remove failed packet from ring */
1013 while(buf--) {
1014 ctx->slots[nm].flags = 0;
1015 ctx->slots[nm].len = 0;
1016 nm = nm_prev(nm, ctx->lim);
1017 }
1018
1019 return (rc);
1020 }
1021
1022 static inline int
1023 ena_netmap_rx_load_desc(struct ena_netmap_ctx *ctx, uint16_t buf, int *len)
1024 {
1025 struct ena_rx_buffer *rx_info;
1026 uint16_t req_id;
1027
1028 req_id = ctx->ring->ena_bufs[buf].req_id;
1029 rx_info = &ctx->ring->rx_buffer_info[req_id];
1030 bus_dmamap_sync(ctx->adapter->rx_buf_tag, rx_info->map,
1031 BUS_DMASYNC_POSTREAD);
1032 netmap_unload_map(ctx->na, ctx->adapter->rx_buf_tag, rx_info->map);
1033
1034 ENA_WARN(ctx->slots[ctx->nm_i].buf_idx != 0, NULL,
1035 "Rx idx is not 0.\n");
1036
1037 ctx->slots[ctx->nm_i].buf_idx = rx_info->netmap_buf_idx;
1038 rx_info->netmap_buf_idx = 0;
1039 /*
1040 * Set NS_MOREFRAG to all slots.
1041 * Then ena_netmap_rx_frame clears it from last one.
1042 */
1043 ctx->slots[ctx->nm_i].flags |= NS_MOREFRAG | NS_BUF_CHANGED;
1044 ctx->slots[ctx->nm_i].len = ctx->ring->ena_bufs[buf].len;
1045 *len += ctx->slots[ctx->nm_i].len;
1046 ctx->ring->free_rx_ids[ctx->nt] = req_id;
1047 ena_trace(NULL, ENA_DBG, "rx_info %p, buf_idx %d, paddr %jx, nm: %d\n",
1048 rx_info, ctx->slots[ctx->nm_i].buf_idx,
1049 (uintmax_t)rx_info->ena_buf.paddr, ctx->nm_i);
1050
1051 ctx->nm_i = nm_next(ctx->nm_i, ctx->lim);
1052 ctx->nt = ENA_RX_RING_IDX_NEXT(ctx->nt, ctx->ring->ring_size);
1053
1054 return (0);
1055 }
1056
1057 static inline void
1058 ena_netmap_rx_cleanup(struct ena_netmap_ctx *ctx)
1059 {
1060 int refill_required;
1061
1062 refill_required = ctx->kring->rhead - ctx->kring->nr_hwcur;
1063 if (ctx->kring->nr_hwcur != ctx->kring->nr_hwtail)
1064 refill_required -= 1;
1065
1066 if (refill_required == 0)
1067 return;
1068 else if (refill_required < 0)
1069 refill_required += ctx->kring->nkr_num_slots;
1070
1071 ena_refill_rx_bufs(ctx->ring, refill_required);
1072 }
1073
1074 static inline void
1075 ena_netmap_fill_ctx(struct netmap_kring *kring, struct ena_netmap_ctx *ctx,
1076 uint16_t ena_qid)
1077 {
1078 ctx->kring = kring;
1079 ctx->na = kring->na;
1080 ctx->adapter = ctx->na->ifp->if_softc;
1081 ctx->lim = kring->nkr_num_slots - 1;
1082 ctx->io_cq = &ctx->adapter->ena_dev->io_cq_queues[ena_qid];
1083 ctx->io_sq = &ctx->adapter->ena_dev->io_sq_queues[ena_qid];
1084 ctx->slots = kring->ring->slot;
1085 }
1086
1087 void
1088 ena_netmap_unload(struct ena_adapter *adapter, bus_dmamap_t map)
1089 {
1090 struct netmap_adapter *na = NA(adapter->ifp);
1091
1092 netmap_unload_map(na, adapter->tx_buf_tag, map);
1093 }
1094
1095 #endif /* DEV_NETMAP */
Cache object: c95200976263f977dbd31d0c59c472a3
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