enetc_mdio.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2021 Alstom Group.
    5  * Copyright (c) 2021 Semihalf.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   26  */
   27 
   28 #include <sys/cdefs.h>
   29 __FBSDID("$FreeBSD$");
   30 
   31 #include <sys/param.h>
   32 #include <sys/bus.h>
   33 #include <sys/endian.h>
   34 #include <sys/kernel.h>
   35 #include <sys/module.h>
   36 #include <sys/rman.h>
   37 
   38 #include <machine/bus.h>
   39 #include <machine/resource.h>
   40 
   41 #include <dev/enetc/enetc_hw.h>
   42 #include <dev/enetc/enetc_mdio.h>
   43 
   44 #define ENETC_MDIO_RD4(regs, base, off) \
   45         bus_read_4((regs), (base) + (off))
   46 #define ENETC_MDIO_WR4(regs, base, off, value) \
   47         bus_write_4((regs), (base) + (off), (value))
   48 
   49 static int
   50 enetc_mdio_wait(struct resource *regs, int mdio_base)
   51 {
   52         int i;
   53         uint32_t val;
   54 
   55         i = 0;
   56         do {
   57                 DELAY(100);
   58                 val = ENETC_MDIO_RD4(regs, mdio_base, ENETC_MDIO_CFG);
   59                 if ((val & MDIO_CFG_BSY) == 0)
   60                         return (0);
   61         } while (i++ < ENETC_TIMEOUT);
   62 
   63         return (ETIMEDOUT);
   64 }
   65 
   66 int
   67 enetc_mdio_read(struct resource *regs, int mdio_base, int phy, int reg)
   68 {
   69         uint32_t mdio_cfg, mdio_ctl;
   70         uint16_t dev_addr;
   71 
   72         mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
   73         if (reg & MII_ADDR_C45) {
   74                 /* clause 45 */
   75                 dev_addr = (reg >> 16) & 0x1f;
   76                 mdio_cfg |= MDIO_CFG_ENC45;
   77         } else {
   78                 /* clause 22 */
   79                 dev_addr = reg & 0x1f;
   80                 mdio_cfg &= ~MDIO_CFG_ENC45;
   81         }
   82 
   83         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_CFG, mdio_cfg);
   84 
   85         if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
   86                 return (EIO);
   87 
   88         /* Set port and device addr. */
   89         mdio_ctl = MDIO_CTL_PORT_ADDR(phy) | MDIO_CTL_DEV_ADDR(dev_addr);
   90         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_CTL, mdio_ctl);
   91 
   92         /* Set the register address. */
   93         if (reg & MII_ADDR_C45) {
   94                 ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_ADDR, reg & 0xffff);
   95 
   96                 if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
   97                         return (EIO);
   98         }
   99 
  100         /* Initiate the read. */
  101         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_CTL, mdio_ctl | MDIO_CTL_READ);
  102 
  103         if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
  104                 return (EIO);
  105 
  106         /* Check if any error occurred while reading PHY register. */
  107         if (ENETC_MDIO_RD4(regs, mdio_base, ENETC_MDIO_CFG) & MDIO_CFG_RD_ER)
  108                 return (ENXIO);
  109 
  110         return (MDIO_DATA(ENETC_MDIO_RD4(regs, mdio_base, ENETC_MDIO_DATA)));
  111 }
  112 
  113 int
  114 enetc_mdio_write(struct resource *regs, int mdio_base, int phy, int reg,
  115     int data)
  116 {
  117         uint32_t mdio_cfg, mdio_ctl;
  118         uint16_t dev_addr;
  119 
  120         mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
  121         if (reg & MII_ADDR_C45) {
  122                 /* clause 45 */
  123                 dev_addr = (reg >> 16) & 0x1f;
  124                 mdio_cfg |= MDIO_CFG_ENC45;
  125         } else {
  126                 /* clause 22 */
  127                 dev_addr = reg & 0x1f;
  128                 mdio_cfg &= ~MDIO_CFG_ENC45;
  129         }
  130 
  131         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_CFG, mdio_cfg);
  132 
  133         if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
  134                 return (EIO);
  135 
  136         /* Set port and device addr. */
  137         mdio_ctl = MDIO_CTL_PORT_ADDR(phy) | MDIO_CTL_DEV_ADDR(dev_addr);
  138         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_CTL, mdio_ctl);
  139 
  140         /* Set the register address. */
  141         if (reg & MII_ADDR_C45) {
  142                 ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_ADDR, reg & 0xffff);
  143 
  144                 if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
  145                         return (EIO);
  146         }
  147 
  148         /* Write the value. */
  149         ENETC_MDIO_WR4(regs, mdio_base, ENETC_MDIO_DATA, MDIO_DATA(data));
  150 
  151         if (enetc_mdio_wait(regs, mdio_base) == ETIMEDOUT)
  152                 return (EIO);
  153 
  154         return (0);
  155 }

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FreeBSD/Linux Kernel Cross Reference sys/dev/enetc/enetc_mdio.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/enetc/enetc_mdio.c