The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/esp/ncr53c9x.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2004 Scott Long
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  *
   26  */
   27 
   28 /*      $NetBSD: ncr53c9x.c,v 1.114 2005/02/27 00:27:02 perry Exp $     */
   29 
   30 /*-
   31  * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc.
   32  * All rights reserved.
   33  *
   34  * This code is derived from software contributed to The NetBSD Foundation
   35  * by Charles M. Hannum.
   36  *
   37  * Redistribution and use in source and binary forms, with or without
   38  * modification, are permitted provided that the following conditions
   39  * are met:
   40  * 1. Redistributions of source code must retain the above copyright
   41  *    notice, this list of conditions and the following disclaimer.
   42  * 2. Redistributions in binary form must reproduce the above copyright
   43  *    notice, this list of conditions and the following disclaimer in the
   44  *    documentation and/or other materials provided with the distribution.
   45  * 3. All advertising materials mentioning features or use of this software
   46  *    must display the following acknowledgement:
   47  *        This product includes software developed by the NetBSD
   48  *        Foundation, Inc. and its contributors.
   49  * 4. Neither the name of The NetBSD Foundation nor the names of its
   50  *    contributors may be used to endorse or promote products derived
   51  *    from this software without specific prior written permission.
   52  *
   53  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   55  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   56  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   57  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   58  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   59  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   60  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   61  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   62  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   63  * POSSIBILITY OF SUCH DAMAGE.
   64  */
   65 
   66 /*-
   67  * Copyright (c) 1994 Peter Galbavy
   68  * Copyright (c) 1995 Paul Kranenburg
   69  * All rights reserved.
   70  *
   71  * Redistribution and use in source and binary forms, with or without
   72  * modification, are permitted provided that the following conditions
   73  * are met:
   74  * 1. Redistributions of source code must retain the above copyright
   75  *    notice, this list of conditions and the following disclaimer.
   76  * 2. Redistributions in binary form must reproduce the above copyright
   77  *    notice, this list of conditions and the following disclaimer in the
   78  *    documentation and/or other materials provided with the distribution.
   79  * 3. All advertising materials mentioning features or use of this software
   80  *    must display the following acknowledgement:
   81  *      This product includes software developed by Peter Galbavy
   82  * 4. The name of the author may not be used to endorse or promote products
   83  *    derived from this software without specific prior written permission.
   84  *
   85  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   86  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
   87  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
   88  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
   89  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
   90  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
   91  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
   93  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
   94  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   95  * POSSIBILITY OF SUCH DAMAGE.
   96  */
   97 
   98 /*
   99  * Based on aic6360 by Jarle Greipsland
  100  *
  101  * Acknowledgements: Many of the algorithms used in this driver are
  102  * inspired by the work of Julian Elischer (julian@FreeBSD.org) and
  103  * Charles Hannum (mycroft@duality.gnu.ai.mit.edu).  Thanks a million!
  104  */
  105 
  106 #include <sys/cdefs.h>
  107 __FBSDID("$FreeBSD$");
  108 
  109 #include <sys/param.h>
  110 #include <sys/systm.h>
  111 #include <sys/bus.h>
  112 #include <sys/kernel.h>
  113 #include <sys/malloc.h>
  114 #include <sys/resource.h>
  115 #include <sys/lock.h>
  116 #include <sys/mutex.h>
  117 #include <sys/queue.h>
  118 #include <sys/time.h>
  119 #include <sys/callout.h>
  120 
  121 #include <cam/cam.h>
  122 #include <cam/cam_ccb.h>
  123 #include <cam/cam_debug.h>
  124 #include <cam/cam_sim.h>
  125 #include <cam/cam_xpt_sim.h>
  126 #include <cam/scsi/scsi_all.h>
  127 #include <cam/scsi/scsi_message.h>
  128 
  129 #include <dev/esp/ncr53c9xreg.h>
  130 #include <dev/esp/ncr53c9xvar.h>
  131 
  132 int ncr53c9x_debug =
  133     NCR_SHOWMISC /* | NCR_SHOWPHASE | NCR_SHOWTRAC | NCR_SHOWCMDS */;
  134 #ifdef DEBUG
  135 int ncr53c9x_notag = 0;
  136 #endif
  137 
  138 static void     ncr53c9x_abort(struct ncr53c9x_softc *sc,
  139                     struct ncr53c9x_ecb *ecb);
  140 static void     ncr53c9x_dequeue(struct ncr53c9x_softc *sc,
  141                     struct ncr53c9x_ecb *ecb);
  142 static void     ncr53c9x_done(struct ncr53c9x_softc *sc,
  143                     struct ncr53c9x_ecb *ecb);
  144 static void     ncr53c9x_free_ecb(struct ncr53c9x_softc *sc,
  145                     struct ncr53c9x_ecb *ecb);
  146 static void     ncr53c9x_msgin(struct ncr53c9x_softc *sc);
  147 static void     ncr53c9x_msgout(struct ncr53c9x_softc *sc);
  148 static void     ncr53c9x_poll(struct cam_sim *sim);
  149 static int      ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how);
  150 static int      ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message,
  151                     int tagtype, int tagid);
  152 static void     ncr53c9x_sense(struct ncr53c9x_softc *sc,
  153                     struct ncr53c9x_ecb *ecb);
  154 static void     ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc);
  155 static void     ncr53c9x_sched(struct ncr53c9x_softc *sc);
  156 static void     ncr53c9x_select(struct ncr53c9x_softc *sc,
  157                     struct ncr53c9x_ecb *ecb);
  158 static void     ncr53c9x_timeout(void *arg);
  159 static void     ncr53c9x_watch(void *arg);
  160 static void     ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p,
  161                     int len);
  162 
  163 static struct ncr53c9x_ecb      *ncr53c9x_get_ecb(struct ncr53c9x_softc *sc);
  164 static struct ncr53c9x_linfo    *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *sc,
  165                                     int64_t lun);
  166 
  167 static inline void      ncr53c9x_readregs(struct ncr53c9x_softc *sc);
  168 static inline void      ncr53c9x_setsync(struct ncr53c9x_softc *sc,
  169                             struct ncr53c9x_tinfo *ti);
  170 static inline int       ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc,
  171                             int period);
  172 
  173 #define NCR_RDFIFO_START   0
  174 #define NCR_RDFIFO_CONTINUE 1
  175 
  176 #define NCR_SET_COUNT(sc, size) do {                                    \
  177                 NCR_WRITE_REG((sc), NCR_TCL, (size));                   \
  178                 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8);              \
  179                 if ((sc->sc_cfg2 & NCRCFG2_FE) ||                       \
  180                     (sc->sc_rev == NCR_VARIANT_FAS366)) {               \
  181                         NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16);     \
  182                 }                                                       \
  183                 if (sc->sc_rev == NCR_VARIANT_FAS366) {                 \
  184                         NCR_WRITE_REG(sc, NCR_RCH, 0);                  \
  185                 }                                                       \
  186 } while (0)
  187 
  188 #ifndef mstohz
  189 #define mstohz(ms) \
  190         (((ms) < 0x20000) ? \
  191             ((ms +0u) / 1000u) * hz : \
  192             ((ms +0u) * hz) /1000u)
  193 #endif
  194 
  195 /*
  196  * Names for the NCR53c9x variants, corresponding to the variant tags
  197  * in ncr53c9xvar.h.
  198  */
  199 static const char *ncr53c9x_variant_names[] = {
  200         "ESP100",
  201         "ESP100A",
  202         "ESP200",
  203         "NCR53C94",
  204         "NCR53C96",
  205         "ESP406",
  206         "FAS408",
  207         "FAS216",
  208         "AM53C974",
  209         "FAS366/HME",
  210         "NCR53C90 (86C01)",
  211         "FAS100A",
  212         "FAS236",
  213 };
  214 
  215 /*
  216  * Search linked list for LUN info by LUN id.
  217  */
  218 static struct ncr53c9x_linfo *
  219 ncr53c9x_lunsearch(struct ncr53c9x_tinfo *ti, int64_t lun)
  220 {
  221         struct ncr53c9x_linfo *li;
  222 
  223         LIST_FOREACH(li, &ti->luns, link)
  224                 if (li->lun == lun)
  225                         return (li);
  226         return (NULL);
  227 }
  228 
  229 /*
  230  * Attach this instance, and then all the sub-devices.
  231  */
  232 int
  233 ncr53c9x_attach(struct ncr53c9x_softc *sc)
  234 {
  235         struct cam_devq *devq;
  236         struct cam_sim *sim;
  237         struct cam_path *path;
  238         struct ncr53c9x_ecb *ecb;
  239         int error, i;
  240 
  241         mtx_init(&sc->sc_lock, "ncr", "ncr53c9x lock", MTX_DEF);
  242 
  243         /*
  244          * Note, the front-end has set us up to print the chip variation.
  245          */
  246         if (sc->sc_rev >= NCR_VARIANT_MAX) {
  247                 device_printf(sc->sc_dev, "unknown variant %d, devices not "
  248                     "attached\n", sc->sc_rev);
  249                 return (EINVAL);
  250         }
  251 
  252         device_printf(sc->sc_dev, "%s, %dMHz, SCSI ID %d\n",
  253             ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id);
  254 
  255         sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8;
  256 
  257         /*
  258          * Allocate SCSI message buffers.
  259          * Front-ends can override allocation to avoid alignment
  260          * handling in the DMA engines.  Note that ncr53c9x_msgout()
  261          * can request a 1 byte DMA transfer.
  262          */
  263         if (sc->sc_omess == NULL) {
  264                 sc->sc_omess_self = 1;
  265                 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT);
  266                 if (sc->sc_omess == NULL) {
  267                         device_printf(sc->sc_dev,
  268                             "cannot allocate MSGOUT buffer\n");
  269                         return (ENOMEM);
  270                 }
  271         } else
  272                 sc->sc_omess_self = 0;
  273 
  274         if (sc->sc_imess == NULL) {
  275                 sc->sc_imess_self = 1;
  276                 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT);
  277                 if (sc->sc_imess == NULL) {
  278                         device_printf(sc->sc_dev,
  279                             "cannot allocate MSGIN buffer\n");
  280                         error = ENOMEM;
  281                         goto fail_omess;
  282                 }
  283         } else
  284                 sc->sc_imess_self = 0;
  285 
  286         sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]),
  287             M_DEVBUF, M_NOWAIT | M_ZERO);
  288         if (sc->sc_tinfo == NULL) {
  289                 device_printf(sc->sc_dev,
  290                     "cannot allocate target info buffer\n");
  291                 error = ENOMEM;
  292                 goto fail_imess;
  293         }
  294 
  295         callout_init(&sc->sc_watchdog, 0);
  296 
  297         /*
  298          * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100
  299          * from now on.
  300          */
  301         if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01)
  302                 sc->sc_rev = NCR_VARIANT_ESP100;
  303 
  304         sc->sc_ccf = FREQTOCCF(sc->sc_freq);
  305 
  306         /* The value *must not* be == 1.  Make it 2. */
  307         if (sc->sc_ccf == 1)
  308                 sc->sc_ccf = 2;
  309 
  310         /*
  311          * The recommended timeout is 250ms.  This register is loaded
  312          * with a value calculated as follows, from the docs:
  313          *
  314          *              (timout period) x (CLK frequency)
  315          *      reg = -------------------------------------
  316          *               8192 x (Clock Conversion Factor)
  317          *
  318          * Since CCF has a linear relation to CLK, this generally computes
  319          * to the constant of 153.
  320          */
  321         sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf);
  322 
  323         /* The CCF register only has 3 bits; 0 is actually 8. */
  324         sc->sc_ccf &= 7;
  325 
  326         /*
  327          * Register with CAM.
  328          */
  329         devq = cam_simq_alloc(sc->sc_ntarg);
  330         if (devq == NULL) {
  331                 device_printf(sc->sc_dev, "cannot allocate device queue\n");
  332                 error = ENOMEM;
  333                 goto fail_tinfo;
  334         }
  335 
  336         sim = cam_sim_alloc(ncr53c9x_action, ncr53c9x_poll, "esp", sc,
  337             device_get_unit(sc->sc_dev), 1, NCR_TAG_DEPTH, devq);
  338         if (sim == NULL) {
  339                 device_printf(sc->sc_dev, "cannot allocate SIM entry\n");
  340                 error = ENOMEM;
  341                 goto fail_devq;
  342         }
  343         if (xpt_bus_register(sim, 0) != CAM_SUCCESS) {
  344                 device_printf(sc->sc_dev, "cannot register bus\n");
  345                 error = EIO;
  346                 goto fail_sim;
  347         }
  348 
  349         if (xpt_create_path(&path, NULL, cam_sim_path(sim),
  350             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
  351                 device_printf(sc->sc_dev, "cannot create path\n");
  352                 error = EIO;
  353                 goto fail_bus;
  354         }
  355 
  356         sc->sc_sim = sim;
  357         sc->sc_path = path;
  358 
  359         /* Reset state and bus. */
  360 #if 0
  361         sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags;
  362 #else
  363         sc->sc_cfflags = 0;
  364 #endif
  365         sc->sc_state = 0;
  366         ncr53c9x_init(sc, 1);
  367 
  368         TAILQ_INIT(&sc->free_list);
  369         if ((sc->ecb_array =
  370             malloc(sizeof(struct ncr53c9x_ecb) * NCR_TAG_DEPTH, M_DEVBUF,
  371             M_NOWAIT | M_ZERO)) == NULL) {
  372                 device_printf(sc->sc_dev, "cannot allocate ECB array\n");
  373                 error = ENOMEM;
  374                 goto fail_path;
  375         }
  376         for (i = 0; i < NCR_TAG_DEPTH; i++) {
  377                 ecb = &sc->ecb_array[i];
  378                 ecb->sc = sc;
  379                 ecb->tag_id = i;
  380                 TAILQ_INSERT_HEAD(&sc->free_list, ecb, free_links);
  381         }
  382 
  383         callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc);
  384 
  385         return (0);
  386 
  387 fail_path:
  388         xpt_free_path(path);
  389 fail_bus:
  390         xpt_bus_deregister(cam_sim_path(sim));
  391 fail_sim:
  392         cam_sim_free(sim, TRUE);
  393 fail_devq:
  394         cam_simq_free(devq);
  395 fail_tinfo:
  396         free(sc->sc_tinfo, M_DEVBUF);
  397 fail_imess:
  398         if (sc->sc_imess_self)
  399                 free(sc->sc_imess, M_DEVBUF);
  400 fail_omess:
  401         if (sc->sc_omess_self)
  402                 free(sc->sc_omess, M_DEVBUF);
  403         return (error);
  404 }
  405 
  406 int
  407 ncr53c9x_detach(struct ncr53c9x_softc *sc)
  408 {
  409 
  410         callout_drain(&sc->sc_watchdog);
  411         mtx_lock(&sc->sc_lock);
  412         ncr53c9x_init(sc, 1);
  413         mtx_unlock(&sc->sc_lock);
  414         xpt_free_path(sc->sc_path);
  415         xpt_bus_deregister(cam_sim_path(sc->sc_sim));
  416         cam_sim_free(sc->sc_sim, TRUE);
  417         free(sc->ecb_array, M_DEVBUF);
  418         free(sc->sc_tinfo, M_DEVBUF);
  419         if (sc->sc_imess_self)
  420                 free(sc->sc_imess, M_DEVBUF);
  421         if (sc->sc_omess_self)
  422                 free(sc->sc_omess, M_DEVBUF);
  423         mtx_destroy(&sc->sc_lock);
  424 
  425         return (0);
  426 }
  427 
  428 /*
  429  * This is the generic ncr53c9x reset function.  It does not reset the SCSI
  430  * bus, only this controller, but kills any on-going commands, and also stops
  431  * and resets the DMA.
  432  *
  433  * After reset, registers are loaded with the defaults from the attach
  434  * routine above.
  435  */
  436 void
  437 ncr53c9x_reset(struct ncr53c9x_softc *sc)
  438 {
  439 
  440         /* Reset DMA first. */
  441         NCRDMA_RESET(sc);
  442 
  443         /* Reset SCSI chip. */
  444         NCRCMD(sc, NCRCMD_RSTCHIP);
  445         NCRCMD(sc, NCRCMD_NOP);
  446         DELAY(500);
  447 
  448         /* Do these backwards, and fall through. */
  449         switch (sc->sc_rev) {
  450         case NCR_VARIANT_ESP406:
  451         case NCR_VARIANT_FAS408:
  452                 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT);
  453                 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4);
  454                 /* FALLTHROUGH */
  455         case NCR_VARIANT_AM53C974:
  456         case NCR_VARIANT_FAS100A:
  457         case NCR_VARIANT_FAS216:
  458         case NCR_VARIANT_FAS236:
  459         case NCR_VARIANT_NCR53C94:
  460         case NCR_VARIANT_NCR53C96:
  461         case NCR_VARIANT_ESP200:
  462                 sc->sc_features |= NCR_F_HASCFG3;
  463                 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
  464                 /* FALLTHROUGH */
  465         case NCR_VARIANT_ESP100A:
  466                 sc->sc_features |= NCR_F_SELATN3;
  467                 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
  468                 /* FALLTHROUGH */
  469         case NCR_VARIANT_ESP100:
  470                 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
  471                 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
  472                 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
  473                 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
  474                 break;
  475 
  476         case NCR_VARIANT_FAS366:
  477                 sc->sc_features |=
  478                     NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3;
  479                 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO;
  480                 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI;
  481                 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3);
  482                 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE | NCRCFG2_HME32 */
  483                 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2);
  484                 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
  485                 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
  486                 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
  487                 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
  488                 break;
  489 
  490         default:
  491                 device_printf(sc->sc_dev,
  492                     "unknown revision code, assuming ESP100\n");
  493                 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1);
  494                 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf);
  495                 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0);
  496                 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout);
  497         }
  498 
  499         if (sc->sc_rev == NCR_VARIANT_AM53C974)
  500                 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4);
  501 
  502 #if 0
  503         device_printf(sc->sc_dev, "ncr53c9x_reset: revision %d\n",
  504             sc->sc_rev);
  505         device_printf(sc->sc_dev, "ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, "
  506             "cfg3 0x%x, ccf 0x%x, timeout 0x%x\n",
  507             sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, sc->sc_ccf, sc->sc_timeout);
  508 #endif
  509 }
  510 
  511 /*
  512  * Reset the SCSI bus, but not the chip.
  513  */
  514 static void
  515 ncr53c9x_scsi_reset(struct ncr53c9x_softc *sc)
  516 {
  517 
  518         (*sc->sc_glue->gl_dma_stop)(sc);
  519 
  520         NCR_MISC(("%s: resetting SCSI bus\n", device_get_nameunit(sc->sc_dev)));
  521         NCRCMD(sc, NCRCMD_RSTSCSI);
  522         DELAY(250000);          /* Give the bus a fighting chance to settle */
  523 }
  524 
  525 /*
  526  * Initialize ncr53c9x state machine.
  527  */
  528 void
  529 ncr53c9x_init(struct ncr53c9x_softc *sc, int doreset)
  530 {
  531         struct ncr53c9x_ecb *ecb;
  532         struct ncr53c9x_linfo *li;
  533         struct ncr53c9x_tinfo *ti;
  534         int i, r;
  535 
  536         NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state));
  537 
  538         if (sc->sc_state == 0) {
  539                 /* First time through; initialize. */
  540 
  541                 TAILQ_INIT(&sc->ready_list);
  542                 sc->sc_nexus = NULL;
  543                 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
  544                 for (r = 0; r < sc->sc_ntarg; r++) {
  545                         LIST_INIT(&sc->sc_tinfo[r].luns);
  546                 }
  547         } else {
  548                 /* Cancel any active commands. */
  549                 sc->sc_state = NCR_CLEANING;
  550                 sc->sc_msgify = 0;
  551                 if ((ecb = sc->sc_nexus) != NULL) {
  552                         ecb->ccb->ccb_h.status = CAM_CMD_TIMEOUT;
  553                         ncr53c9x_done(sc, ecb);
  554                 }
  555                 /* Cancel outstanding disconnected commands on each LUN. */
  556                 for (r = 0; r < sc->sc_ntarg; r++) {
  557                         LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) {
  558                                 if ((ecb = li->untagged) != NULL) {
  559                                         li->untagged = NULL;
  560                                         /*
  561                                          * XXX
  562                                          *
  563                                          * Should we terminate a command
  564                                          * that never reached the disk?
  565                                          */
  566                                         li->busy = 0;
  567                                         ecb->ccb->ccb_h.status =
  568                                             CAM_CMD_TIMEOUT;
  569                                         ncr53c9x_done(sc, ecb);
  570                                 }
  571                                 for (i = 0; i < 256; i++)
  572                                         if ((ecb = li->queued[i])) {
  573                                                 li->queued[i] = NULL;
  574                                                 ecb->ccb->ccb_h.status =
  575                                                     CAM_CMD_TIMEOUT;
  576                                                 ncr53c9x_done(sc, ecb);
  577                                         }
  578                                 li->used = 0;
  579                         }
  580                 }
  581         }
  582 
  583         /*
  584          * Reset the chip to a known state.
  585          */
  586         ncr53c9x_reset(sc);
  587 
  588         sc->sc_flags = 0;
  589         sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
  590         sc->sc_phase = sc->sc_prevphase = INVALID_PHASE;
  591 
  592         for (r = 0; r < sc->sc_ntarg; r++) {
  593                 ti = &sc->sc_tinfo[r];
  594 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */
  595                 ti->flags = ((sc->sc_minsync != 0 &&
  596                     (sc->sc_cfflags & (1 << ((r & 7) + 8))) == 0) ?
  597                     0 : T_SYNCHOFF) |
  598                     ((sc->sc_cfflags & (1 << (r & 7))) == 0 ?
  599                     0 : T_RSELECTOFF);
  600 
  601 #ifdef DEBUG
  602                 if (ncr53c9x_notag)
  603                         ti->flags &= ~T_TAG;
  604 #endif
  605                 ti->period = sc->sc_minsync;
  606                 ti->offset = 0;
  607                 ti->cfg3   = 0;
  608         }
  609 
  610         if (doreset) {
  611                 sc->sc_state = NCR_SBR;
  612                 NCRCMD(sc, NCRCMD_RSTSCSI);
  613         } else {
  614                 sc->sc_state = NCR_IDLE;
  615                 ncr53c9x_sched(sc);
  616         }
  617 }
  618 
  619 /*
  620  * Read the NCR registers, and save their contents for later use.
  621  * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading
  622  * NCR_INTR - so make sure it is the last read.
  623  *
  624  * I think that (from reading the docs) most bits in these registers
  625  * only make sense when the DMA CSR has an interrupt showing.  Call only
  626  * if an interrupt is pending.
  627  */
  628 static inline void
  629 ncr53c9x_readregs(struct ncr53c9x_softc *sc)
  630 {
  631 
  632         sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT);
  633         /* Only the step bits are of interest. */
  634         sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK;
  635 
  636         if (sc->sc_rev == NCR_VARIANT_FAS366)
  637                 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2);
  638 
  639         sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR);
  640 
  641         if (sc->sc_glue->gl_clear_latched_intr != NULL)
  642                 (*sc->sc_glue->gl_clear_latched_intr)(sc);
  643 
  644         /*
  645          * Determine the SCSI bus phase, return either a real SCSI bus phase
  646          * or some pseudo phase we use to detect certain exceptions.
  647          */
  648         sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ?
  649             BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE;
  650 
  651         NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ",
  652             sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2));
  653 }
  654 
  655 /*
  656  * Convert Synchronous Transfer Period to chip register Clock Per Byte value.
  657  */
  658 static inline int
  659 ncr53c9x_stp2cpb(struct ncr53c9x_softc *sc, int period)
  660 {
  661         int v;
  662         v = (sc->sc_freq * period) / 250;
  663         if (ncr53c9x_cpb2stp(sc, v) < period)
  664                 /* Correct round-down error. */
  665                 v++;
  666         return (v);
  667 }
  668 
  669 static inline void
  670 ncr53c9x_setsync(struct ncr53c9x_softc *sc, struct ncr53c9x_tinfo *ti)
  671 {
  672         u_char syncoff, synctp;
  673         u_char cfg3 = sc->sc_cfg3 | ti->cfg3;
  674 
  675         if (ti->flags & T_SYNCMODE) {
  676                 syncoff = ti->offset;
  677                 synctp = ncr53c9x_stp2cpb(sc, ti->period);
  678                 if (sc->sc_features & NCR_F_FASTSCSI) {
  679                         /*
  680                          * If the period is 200ns or less (ti->period <= 50),
  681                          * put the chip in Fast SCSI mode.
  682                          */
  683                         if (ti->period <= 50)
  684                                 /*
  685                                  * There are (at least) 4 variations of the
  686                                  * configuration 3 register.  The drive attach
  687                                  * routine sets the appropriate bit to put the
  688                                  * chip into Fast SCSI mode so that it doesn't
  689                                  * have to be figured out here each time.
  690                                  */
  691                                 cfg3 |= sc->sc_cfg3_fscsi;
  692                 }
  693 
  694                 /*
  695                  * Am53c974 requires different SYNCTP values when the
  696                  * FSCSI bit is off.
  697                  */
  698                 if (sc->sc_rev == NCR_VARIANT_AM53C974 &&
  699                     (cfg3 & NCRAMDCFG3_FSCSI) == 0)
  700                         synctp--;
  701         } else {
  702                 syncoff = 0;
  703                 synctp = 0;
  704         }
  705 
  706         if (sc->sc_features & NCR_F_HASCFG3)
  707                 NCR_WRITE_REG(sc, NCR_CFG3, cfg3);
  708 
  709         NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff);
  710         NCR_WRITE_REG(sc, NCR_SYNCTP, synctp);
  711 }
  712 
  713 /*
  714  * Send a command to a target, set the driver state to NCR_SELECTING
  715  * and let the caller take care of the rest.
  716  *
  717  * Keeping this as a function allows me to say that this may be done
  718  * by DMA instead of programmed I/O soon.
  719  */
  720 static void
  721 ncr53c9x_select(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
  722 {
  723         struct ncr53c9x_tinfo *ti;
  724         u_char *cmd;
  725         size_t dmasize;
  726         int clen, selatn3, selatns;
  727         int lun = ecb->ccb->ccb_h.target_lun;
  728         int target = ecb->ccb->ccb_h.target_id;
  729 
  730         NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ",
  731             target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1]));
  732 
  733         ti = &sc->sc_tinfo[target];
  734         sc->sc_state = NCR_SELECTING;
  735         /*
  736          * Schedule the timeout now, the first time we will go away
  737          * expecting to come back due to an interrupt, because it is
  738          * always possible that the interrupt may never happen.
  739          */
  740         ecb->ccb->ccb_h.timeout_ch =
  741             timeout(ncr53c9x_timeout, ecb, mstohz(ecb->timeout));
  742 
  743         /*
  744          * The docs say the target register is never reset, and I
  745          * can't think of a better place to set it.
  746          */
  747         if (sc->sc_rev == NCR_VARIANT_FAS366) {
  748                 NCRCMD(sc, NCRCMD_FLUSH);
  749                 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME);
  750         } else {
  751                 NCR_WRITE_REG(sc, NCR_SELID, target);
  752         }
  753         ncr53c9x_setsync(sc, ti);
  754 
  755         if ((ecb->flags & ECB_SENSE) != 0) {
  756                 /*
  757                  * For REQUEST SENSE, we should not send an IDENTIFY or
  758                  * otherwise mangle the target.  There should be no MESSAGE IN
  759                  * phase.
  760                  */
  761                 if (sc->sc_features & NCR_F_DMASELECT) {
  762                         /* setup DMA transfer for command */
  763                         dmasize = clen = ecb->clen;
  764                         sc->sc_cmdlen = clen;
  765                         sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
  766 
  767                         /* Program the SCSI counter */
  768                         NCR_SET_COUNT(sc, dmasize);
  769 
  770                         if (sc->sc_rev != NCR_VARIANT_FAS366)
  771                                 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
  772 
  773                         /* And get the target's attention */
  774                         NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA);
  775                         NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0,
  776                             &dmasize);
  777                         NCRDMA_GO(sc);
  778                 } else {
  779                         ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
  780                         NCRCMD(sc, NCRCMD_SELNATN);
  781                 }
  782                 return;
  783         }
  784 
  785         selatn3 = selatns = 0;
  786         if (ecb->tag[0] != 0) {
  787                 if (sc->sc_features & NCR_F_SELATN3)
  788                         /* Use SELATN3 to send tag messages. */
  789                         selatn3 = 1;
  790                 else
  791                         /* We don't have SELATN3; use SELATNS to send tags. */
  792                         selatns = 1;
  793         }
  794 
  795         if (ti->flags & T_NEGOTIATE) {
  796                 /* We have to use SELATNS to send sync/wide messages. */
  797                 selatn3 = 0;
  798                 selatns = 1;
  799         }
  800 
  801         cmd = (u_char *)&ecb->cmd.cmd;
  802 
  803         if (selatn3) {
  804                 /* We'll use tags with SELATN3. */
  805                 clen = ecb->clen + 3;
  806                 cmd -= 3;
  807                 cmd[0] = MSG_IDENTIFY(lun, 1);  /* msg[0] */
  808                 cmd[1] = ecb->tag[0];           /* msg[1] */
  809                 cmd[2] = ecb->tag[1];           /* msg[2] */
  810         } else {
  811                 /* We don't have tags, or will send messages with SELATNS. */
  812                 clen = ecb->clen + 1;
  813                 cmd -= 1;
  814                 cmd[0] = MSG_IDENTIFY(lun, (ti->flags & T_RSELECTOFF) == 0);
  815         }
  816 
  817         if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) {
  818                 /* Setup DMA transfer for command. */
  819                 dmasize = clen;
  820                 sc->sc_cmdlen = clen;
  821                 sc->sc_cmdp = cmd;
  822 
  823                 /* Program the SCSI counter. */
  824                 NCR_SET_COUNT(sc, dmasize);
  825 
  826                 /* Load the count in. */
  827                 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */
  828                         NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
  829 
  830                 /* And get the target's attention. */
  831                 if (selatn3) {
  832                         sc->sc_msgout = SEND_TAG;
  833                         sc->sc_flags |= NCR_ATN;
  834                         NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA);
  835                 } else
  836                         NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA);
  837                 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize);
  838                 NCRDMA_GO(sc);
  839                 return;
  840         }
  841 
  842         /*
  843          * Who am I?  This is where we tell the target that we are
  844          * happy for it to disconnect etc.
  845          */
  846 
  847         /* Now get the command into the FIFO. */
  848         ncr53c9x_wrfifo(sc, cmd, clen);
  849 
  850         /* And get the target's attention. */
  851         if (selatns) {
  852                 NCR_MSGS(("SELATNS \n"));
  853                 /* Arbitrate, select and stop after IDENTIFY message. */
  854                 NCRCMD(sc, NCRCMD_SELATNS);
  855         } else if (selatn3) {
  856                 sc->sc_msgout = SEND_TAG;
  857                 sc->sc_flags |= NCR_ATN;
  858                 NCRCMD(sc, NCRCMD_SELATN3);
  859         } else
  860                 NCRCMD(sc, NCRCMD_SELATN);
  861 }
  862 
  863 static void
  864 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
  865 {
  866 
  867         ecb->flags = 0;
  868         TAILQ_INSERT_TAIL(&sc->free_list, ecb, free_links);
  869 }
  870 
  871 static struct ncr53c9x_ecb *
  872 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc)
  873 {
  874         struct ncr53c9x_ecb *ecb;
  875 
  876         ecb = TAILQ_FIRST(&sc->free_list);
  877         if (ecb) {
  878                 if (ecb->flags != 0)
  879                         panic("ecb flags not cleared\n");
  880                 TAILQ_REMOVE(&sc->free_list, ecb, free_links);
  881                 ecb->flags = ECB_ALLOC;
  882                 bzero(&ecb->ccb, sizeof(struct ncr53c9x_ecb) -
  883                     offsetof(struct ncr53c9x_ecb, ccb));
  884         }
  885         return (ecb);
  886 }
  887 
  888 /*
  889  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS:
  890  */
  891 
  892 /*
  893  * Start a SCSI-command.
  894  * This function is called by the higher level SCSI-driver to queue/run
  895  * SCSI-commands.
  896  */
  897 
  898 void
  899 ncr53c9x_action(struct cam_sim *sim, union ccb *ccb)
  900 {
  901         struct ccb_pathinq *cpi;
  902         struct ccb_scsiio *csio;
  903         struct ccb_trans_settings *cts;
  904         struct ncr53c9x_ecb *ecb;
  905         struct ncr53c9x_softc *sc;
  906         struct ncr53c9x_tinfo *ti;
  907         int target;
  908 
  909         NCR_TRACE(("[ncr53c9x_action %d]", ccb->ccb_h.func_code));
  910 
  911         sc = cam_sim_softc(sim);
  912         mtx_lock(&sc->sc_lock);
  913 
  914         switch (ccb->ccb_h.func_code) {
  915         case XPT_RESET_BUS:
  916                 ncr53c9x_scsi_reset(sc);
  917                 ccb->ccb_h.status = CAM_REQ_CMP;
  918                 mtx_unlock(&sc->sc_lock);
  919                 xpt_done(ccb);
  920                 return;
  921 
  922         case XPT_CALC_GEOMETRY:
  923                 mtx_unlock(&sc->sc_lock);
  924                 cam_calc_geometry(&ccb->ccg, sc->sc_extended_geom);
  925                 xpt_done(ccb);
  926                 return;
  927 
  928         case XPT_PATH_INQ:
  929                 cpi = &ccb->cpi;
  930                 cpi->version_num = 1;
  931                 cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE;
  932                 cpi->hba_inquiry |=
  933                     (sc->sc_rev == NCR_VARIANT_FAS366) ? PI_WIDE_16 : 0;
  934                 cpi->target_sprt = 0;
  935                 cpi->hba_misc = 0;
  936                 cpi->hba_eng_cnt = 0;
  937                 cpi->max_target = sc->sc_ntarg - 1;
  938                 cpi->max_lun = 8;
  939                 cpi->initiator_id = sc->sc_id;
  940                 cpi->bus_id = 0;
  941                 cpi->base_transfer_speed = 3300;
  942                 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
  943                 strncpy(cpi->hba_vid, "Sun", HBA_IDLEN);
  944                 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
  945                 cpi->unit_number = cam_sim_unit(sim);
  946                 ccb->ccb_h.status = CAM_REQ_CMP;
  947                 mtx_unlock(&sc->sc_lock);
  948                 xpt_done(ccb);
  949                 return;
  950 
  951         case XPT_GET_TRAN_SETTINGS:
  952                 cts = &ccb->cts;
  953                 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
  954 
  955                 ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
  956 
  957                 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
  958                         cts->sync_period = ti->period;
  959                         cts->sync_offset = ti->offset;
  960                         cts->bus_width = ti->width;
  961                         if ((ti->flags & T_TAG) != 0)
  962                                 cts->flags |=
  963                                     (CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
  964                         else
  965                                 cts->flags &=
  966                                     ~(CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
  967                 } else {
  968                         cts->sync_period = sc->sc_maxsync;
  969                         cts->sync_offset = sc->sc_maxoffset;
  970                         cts->bus_width = sc->sc_maxwidth;
  971                         cts->flags |= (CCB_TRANS_DISC_ENB | CCB_TRANS_TAG_ENB);
  972                 }
  973                 cts->valid = CCB_TRANS_BUS_WIDTH_VALID |
  974                              CCB_TRANS_SYNC_RATE_VALID |
  975                              CCB_TRANS_SYNC_OFFSET_VALID |
  976                              CCB_TRANS_DISC_VALID |
  977                              CCB_TRANS_TQ_VALID;
  978                 ccb->ccb_h.status = CAM_REQ_CMP;
  979                 mtx_unlock(&sc->sc_lock);
  980                 xpt_done(ccb);
  981                 return;
  982 
  983         case XPT_ABORT:
  984                 printf("XPT_ABORT called\n");
  985                 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
  986                 mtx_unlock(&sc->sc_lock);
  987                 xpt_done(ccb);
  988                 return;
  989 
  990         case XPT_TERM_IO:
  991                 printf("XPT_TERM_IO called\n");
  992                 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
  993                 mtx_unlock(&sc->sc_lock);
  994                 xpt_done(ccb);
  995                 return;
  996 
  997         case XPT_RESET_DEV:
  998                 printf("XPT_RESET_DEV called\n");
  999         case XPT_SCSI_IO:
 1000                 if (ccb->ccb_h.target_id < 0 ||
 1001                     ccb->ccb_h.target_id >= sc->sc_ntarg) {
 1002                         ccb->ccb_h.status = CAM_PATH_INVALID;
 1003                         mtx_unlock(&sc->sc_lock);
 1004                         xpt_done(ccb);
 1005                         return;
 1006                 }
 1007                 /* Get an ECB to use. */
 1008                 ecb = ncr53c9x_get_ecb(sc);
 1009                 /*
 1010                  * This should never happen as we track resources
 1011                  * in the mid-layer.
 1012                  */
 1013                 if (ecb == NULL) {
 1014                         xpt_freeze_simq(sim, 1);
 1015                         ccb->ccb_h.status = CAM_REQUEUE_REQ;
 1016                         printf("unable to allocate ecb\n");
 1017                         mtx_unlock(&sc->sc_lock);
 1018                         xpt_done(ccb);
 1019                         return;
 1020                 }
 1021 
 1022                 /* Initialize ecb. */
 1023                 ecb->ccb = ccb;
 1024                 ecb->timeout = ccb->ccb_h.timeout;
 1025 
 1026                 if (ccb->ccb_h.func_code == XPT_RESET_DEV) {
 1027                         ecb->flags |= ECB_RESET;
 1028                         ecb->clen = 0;
 1029                         ecb->dleft = 0;
 1030                 } else {
 1031                         csio = &ccb->csio;
 1032                         if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
 1033                                 bcopy(csio->cdb_io.cdb_ptr, &ecb->cmd.cmd,
 1034                                     csio->cdb_len);
 1035                         else
 1036                                 bcopy(csio->cdb_io.cdb_bytes, &ecb->cmd.cmd,
 1037                                     csio->cdb_len);
 1038                         ecb->clen = csio->cdb_len;
 1039                         ecb->daddr = csio->data_ptr;
 1040                         ecb->dleft = csio->dxfer_len;
 1041                 }
 1042                 ecb->stat = 0;
 1043 
 1044                 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain);
 1045                 ecb->flags |= ECB_READY;
 1046                 if (sc->sc_state == NCR_IDLE)
 1047                         ncr53c9x_sched(sc);
 1048                 break;
 1049 
 1050         case XPT_SET_TRAN_SETTINGS:
 1051                 cts = &ccb->cts;
 1052                 target = ccb->ccb_h.target_id;
 1053                 ti = &sc->sc_tinfo[target];
 1054 
 1055                 ti = &sc->sc_tinfo[target];
 1056 
 1057                 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
 1058                         if ((sc->sc_cfflags & (1<<((target & 7) + 16))) == 0 &&
 1059                             (cts->flags & CCB_TRANS_TAG_ENB)) {
 1060                                 NCR_MISC(("%s: target %d: tagged queuing\n",
 1061                                     device_get_nameunit(sc->sc_dev), target));
 1062                                 ti->flags |= T_TAG;
 1063                         } else
 1064                                 ti->flags &= ~T_TAG;
 1065                 }
 1066 
 1067                 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
 1068                         if (cts->bus_width != 0) {
 1069                                 NCR_MISC(("%s: target %d: wide negotiation\n",
 1070                                     device_get_nameunit(sc->sc_dev), target));
 1071                                 if (sc->sc_rev == NCR_VARIANT_FAS366) {
 1072                                         ti->flags |= T_WIDE;
 1073                                         ti->width = 1;
 1074                                 }
 1075                         } else {
 1076                                 ti->flags &= ~T_WIDE;
 1077                                 ti->width = 0;
 1078                         }
 1079                         ti->flags |= T_NEGOTIATE;
 1080                 }
 1081 
 1082                 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
 1083                         NCR_MISC(("%s: target %d: sync period negotiation\n",
 1084                             device_get_nameunit(sc->sc_dev), target));
 1085                         ti->flags |= T_NEGOTIATE;
 1086                         ti->period = cts->sync_period;
 1087                 }
 1088 
 1089                 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0) {
 1090                         NCR_MISC(("%s: target %d: sync offset negotiation\n",
 1091                             device_get_nameunit(sc->sc_dev), target));
 1092                         ti->flags |= T_NEGOTIATE;
 1093                         ti->offset = cts->sync_offset;
 1094                 }
 1095 
 1096                 mtx_unlock(&sc->sc_lock);
 1097                 ccb->ccb_h.status = CAM_REQ_CMP;
 1098                 xpt_done(ccb);
 1099                 return;
 1100 
 1101         default:
 1102                 device_printf(sc->sc_dev, "Unhandled function code %d\n",
 1103                     ccb->ccb_h.func_code);
 1104                 ccb->ccb_h.status = CAM_PROVIDE_FAIL;
 1105                 mtx_unlock(&sc->sc_lock);
 1106                 xpt_done(ccb);
 1107                 return;
 1108         }
 1109 
 1110         mtx_unlock(&sc->sc_lock);
 1111 }
 1112 
 1113 /*
 1114  * Used when interrupt driven I/O is not allowed, e.g. during boot.
 1115  */
 1116 static void
 1117 ncr53c9x_poll(struct cam_sim *sim)
 1118 {
 1119         struct ncr53c9x_softc *sc;
 1120 
 1121         NCR_TRACE(("[ncr53c9x_poll] "));
 1122         sc = cam_sim_softc(sim);
 1123         if (NCRDMA_ISINTR(sc)) {
 1124                 ncr53c9x_intr(sc);
 1125         }
 1126 }
 1127 
 1128 /*
 1129  * LOW LEVEL SCSI UTILITIES
 1130  */
 1131 
 1132 /*
 1133  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
 1134  * handler so that we may call it from ncr53c9x_scsipi_request and
 1135  * ncr53c9x_done.  This may save us an unnecessary interrupt just to get
 1136  * things going.  Should only be called when state == NCR_IDLE and at bio pl.
 1137  */
 1138 static void
 1139 ncr53c9x_sched(struct ncr53c9x_softc *sc)
 1140 {
 1141         struct ncr53c9x_ecb *ecb;
 1142         struct ncr53c9x_linfo *li;
 1143         struct ncr53c9x_tinfo *ti;
 1144         int lun, tag;
 1145 
 1146         NCR_TRACE(("[ncr53c9x_sched] "));
 1147 
 1148         if (sc->sc_state != NCR_IDLE)
 1149                 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state);
 1150 
 1151         /*
 1152          * Find first ecb in ready queue that is for a target/lunit
 1153          * combinations that is not busy.
 1154          */
 1155         for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL;
 1156             ecb = TAILQ_NEXT(ecb, chain)) {
 1157                 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 1158                 lun = ecb->ccb->ccb_h.target_lun;
 1159 
 1160                 /* Select type of tag for this command */
 1161                 if ((ti->flags & (T_RSELECTOFF)) != 0)
 1162                         tag = 0;
 1163                 else if ((ti->flags & (T_TAG)) == 0)
 1164                         tag = 0;
 1165                 else if ((ecb->flags & ECB_SENSE) != 0)
 1166                         tag = 0;
 1167                 else if ((ecb->ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) == 0)
 1168                         tag = 0;
 1169                 else if (ecb->ccb->csio.tag_action == CAM_TAG_ACTION_NONE)
 1170                         tag = 0;
 1171                 else
 1172                         tag = ecb->ccb->csio.tag_action;
 1173 
 1174                 li = TINFO_LUN(ti, lun);
 1175                 if (li == NULL) {
 1176                         /* Initialize LUN info and add to list. */
 1177                         if ((li = malloc(sizeof(*li),
 1178                             M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
 1179                                 continue;
 1180                         }
 1181                         li->lun = lun;
 1182 
 1183                         LIST_INSERT_HEAD(&ti->luns, li, link);
 1184                         if (lun < NCR_NLUN)
 1185                                 ti->lun[lun] = li;
 1186                 }
 1187                 li->last_used = time_second;
 1188                 if (tag == 0) {
 1189                         /* Try to issue this as an untagged command. */
 1190                         if (li->untagged == NULL)
 1191                                 li->untagged = ecb;
 1192                 }
 1193                 if (li->untagged != NULL) {
 1194                         tag = 0;
 1195                         if ((li->busy != 1) && li->used == 0) {
 1196                                 /*
 1197                                  * We need to issue this untagged command
 1198                                  * now.
 1199                                  */
 1200                                 ecb = li->untagged;
 1201                         } else {
 1202                                 /* not ready, yet */
 1203                                 continue;
 1204                         }
 1205                 }
 1206                 ecb->tag[0] = tag;
 1207                 if (tag != 0) {
 1208                         li->queued[ecb->tag_id] = ecb;
 1209                         ecb->tag[1] = ecb->tag_id;
 1210                         li->used++;
 1211                 }
 1212                 if (li->untagged != NULL && (li->busy != 1)) {
 1213                         li->busy = 1;
 1214                         TAILQ_REMOVE(&sc->ready_list, ecb, chain);
 1215                         ecb->flags &= ~ECB_READY;
 1216                         sc->sc_nexus = ecb;
 1217                         ncr53c9x_select(sc, ecb);
 1218                         break;
 1219                 }
 1220                 if (li->untagged == NULL && tag != 0) {
 1221                         TAILQ_REMOVE(&sc->ready_list, ecb, chain);
 1222                         ecb->flags &= ~ECB_READY;
 1223                         sc->sc_nexus = ecb;
 1224                         ncr53c9x_select(sc, ecb);
 1225                         break;
 1226                 } else {
 1227                         NCR_TRACE(("%d:%d busy\n",
 1228                             ecb->ccb->ccb_h.target_id,
 1229                             ecb->ccb->ccb_h.target_lun));
 1230                 }
 1231         }
 1232 }
 1233 
 1234 static void
 1235 ncr53c9x_sense(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
 1236 {
 1237         union ccb *ccb = ecb->ccb;
 1238         struct ncr53c9x_linfo *li;
 1239         struct ncr53c9x_tinfo *ti;
 1240         struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd;
 1241         int lun;
 1242 
 1243         NCR_TRACE(("requesting sense "));
 1244 
 1245         lun = ccb->ccb_h.target_lun;
 1246         ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
 1247 
 1248         /* Next, setup a REQUEST SENSE command block. */
 1249         memset(ss, 0, sizeof(*ss));
 1250         ss->opcode = REQUEST_SENSE;
 1251         ss->byte2 = ccb->ccb_h.target_lun << SCSI_CMD_LUN_SHIFT;
 1252         ss->length = sizeof(struct scsi_sense_data);
 1253         ecb->clen = sizeof(*ss);
 1254         ecb->daddr = (char *)&ecb->ccb->csio.sense_data;
 1255         ecb->dleft = sizeof(struct scsi_sense_data);
 1256         ecb->flags |= ECB_SENSE;
 1257         ecb->timeout = NCR_SENSE_TIMEOUT;
 1258         ti->senses++;
 1259         li = TINFO_LUN(ti, lun);
 1260         if (li->busy)
 1261                 li->busy = 0;
 1262         ncr53c9x_dequeue(sc, ecb);
 1263         li->untagged = ecb;     /* Must be executed first to fix C/A. */
 1264         li->busy = 2;
 1265         if (ecb == sc->sc_nexus) {
 1266                 ncr53c9x_select(sc, ecb);
 1267         } else {
 1268                 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
 1269                 ecb->flags |= ECB_READY;
 1270                 if (sc->sc_state == NCR_IDLE)
 1271                         ncr53c9x_sched(sc);
 1272         }
 1273 }
 1274 
 1275 /*
 1276  * POST PROCESSING OF SCSI_CMD (usually current)
 1277  */
 1278 static void
 1279 ncr53c9x_done(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
 1280 {
 1281         union ccb *ccb = ecb->ccb;
 1282         struct ncr53c9x_linfo *li;
 1283         struct ncr53c9x_tinfo *ti;
 1284         int lun;
 1285 
 1286         NCR_TRACE(("[ncr53c9x_done(status:%x)] ", ccb->ccb_h.status));
 1287 
 1288         ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
 1289         lun = ccb->ccb_h.target_lun;
 1290         li = TINFO_LUN(ti, lun);
 1291 
 1292         untimeout(ncr53c9x_timeout, ecb, ccb->ccb_h.timeout_ch);
 1293 
 1294         /*
 1295          * Now, if we've come here with no error code, i.e. we've kept the
 1296          * initial XS_NOERROR, and the status code signals that we should
 1297          * check sense, we'll need to set up a request sense cmd block and
 1298          * push the command back into the ready queue *before* any other
 1299          * commands for this target/lunit, else we lose the sense info.
 1300          * We don't support chk sense conditions for the request sense cmd.
 1301          */
 1302         if (ccb->ccb_h.status == CAM_REQ_CMP) {
 1303                 if ((ecb->flags & ECB_ABORT) != 0) {
 1304                         ccb->ccb_h.status = CAM_CMD_TIMEOUT;
 1305                 } else if ((ecb->flags & ECB_SENSE) != 0 &&
 1306                            (ecb->stat != SCSI_STATUS_CHECK_COND)) {
 1307                         ccb->ccb_h.status = CAM_AUTOSNS_VALID;
 1308                 } else if (ecb->stat == SCSI_STATUS_CHECK_COND) {
 1309                         if ((ecb->flags & ECB_SENSE) != 0)
 1310                                 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
 1311                         else {
 1312                                 /* First, save the return values. */
 1313                                 ccb->csio.resid = ecb->dleft;
 1314                                 ncr53c9x_sense(sc, ecb);
 1315                                 return;
 1316                         }
 1317                 } else {
 1318                         ccb->csio.resid = ecb->dleft;
 1319                 }
 1320 #if 0
 1321                 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY)
 1322                         xs->error = XS_BUSY;
 1323 #endif
 1324         }
 1325 
 1326 #ifdef NCR53C9X_DEBUG
 1327         if (ncr53c9x_debug & NCR_SHOWTRAC) {
 1328                 if (ccb->csio.resid != 0)
 1329                         printf("resid=%d ", ccb->csio.resid);
 1330 #if 0
 1331                 if (xs->error == XS_SENSE)
 1332                         printf("sense=0x%02x\n",
 1333                             xs->sense.scsi_sense.error_code);
 1334                 else
 1335                         printf("error=%d\n", xs->error);
 1336 #endif
 1337         }
 1338 #endif
 1339 
 1340         /*
 1341          * Remove the ECB from whatever queue it's on.
 1342          */
 1343         ncr53c9x_dequeue(sc, ecb);
 1344         if (ecb == sc->sc_nexus) {
 1345                 sc->sc_nexus = NULL;
 1346                 if (sc->sc_state != NCR_CLEANING) {
 1347                         sc->sc_state = NCR_IDLE;
 1348                         ncr53c9x_sched(sc);
 1349                 }
 1350         }
 1351 
 1352         if (ccb->ccb_h.status == CAM_SEL_TIMEOUT) {
 1353                 /* Selection timeout -- discard this LUN if empty. */
 1354                 if (li->untagged == NULL && li->used == 0) {
 1355                         if (lun < NCR_NLUN)
 1356                                 ti->lun[lun] = NULL;
 1357                         LIST_REMOVE(li, link);
 1358                         free(li, M_DEVBUF);
 1359                 }
 1360         }
 1361 
 1362         ncr53c9x_free_ecb(sc, ecb);
 1363         ti->cmds++;
 1364         xpt_done(ccb);
 1365 }
 1366 
 1367 static void
 1368 ncr53c9x_dequeue(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
 1369 {
 1370         struct ncr53c9x_linfo *li;
 1371         struct ncr53c9x_tinfo *ti;
 1372         int64_t lun;
 1373 
 1374         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 1375         lun = ecb->ccb->ccb_h.target_lun;
 1376         li = TINFO_LUN(ti, lun);
 1377 #ifdef DIAGNOSTIC
 1378         if (li == NULL || li->lun != lun)
 1379                 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist",
 1380                     (long long)lun, ecb);
 1381 #endif
 1382         if (li->untagged == ecb) {
 1383                 li->busy = 0;
 1384                 li->untagged = NULL;
 1385         }
 1386         if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) {
 1387 #ifdef DIAGNOSTIC
 1388                 if (li->queued[ecb->tag[1]] != NULL &&
 1389                     (li->queued[ecb->tag[1]] != ecb))
 1390                         panic("ncr53c9x_dequeue: slot %d for lun %qx has %p "
 1391                             "instead of ecb %p\n", ecb->tag[1],
 1392                             (long long)lun, li->queued[ecb->tag[1]], ecb);
 1393 #endif
 1394                 li->queued[ecb->tag[1]] = NULL;
 1395                 li->used--;
 1396         }
 1397 
 1398         if ((ecb->flags & ECB_READY) != 0) {
 1399                 ecb->flags &= ~ECB_READY;
 1400                 TAILQ_REMOVE(&sc->ready_list, ecb, chain);
 1401         }
 1402 }
 1403 
 1404 /*
 1405  * INTERRUPT/PROTOCOL ENGINE
 1406  */
 1407 
 1408 /*
 1409  * Schedule an outgoing message by prioritizing it, and asserting
 1410  * attention on the bus.  We can only do this when we are the initiator
 1411  * else there will be an illegal command interrupt.
 1412  */
 1413 #define ncr53c9x_sched_msgout(m) do {                                   \
 1414         NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__));         \
 1415         NCRCMD(sc, NCRCMD_SETATN);                                      \
 1416         sc->sc_flags |= NCR_ATN;                                        \
 1417         sc->sc_msgpriq |= (m);                                          \
 1418 } while (0)
 1419 
 1420 static void
 1421 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc)
 1422 {
 1423         NCR_TRACE(("[flushfifo] "));
 1424 
 1425         NCRCMD(sc, NCRCMD_FLUSH);
 1426 
 1427         if (sc->sc_phase == COMMAND_PHASE ||
 1428             sc->sc_phase == MESSAGE_OUT_PHASE)
 1429                 DELAY(2);
 1430 }
 1431 
 1432 static int
 1433 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how)
 1434 {
 1435         u_char *ibuf;
 1436         int i, n;
 1437 
 1438         switch (how) {
 1439         case NCR_RDFIFO_START:
 1440                 ibuf = sc->sc_imess;
 1441                 sc->sc_imlen = 0;
 1442                 break;
 1443 
 1444         case NCR_RDFIFO_CONTINUE:
 1445                 ibuf = sc->sc_imess + sc->sc_imlen;
 1446                 break;
 1447 
 1448         default:
 1449                 panic("ncr53c9x_rdfifo: bad flag");
 1450                 /* NOTREACHED */
 1451         }
 1452 
 1453         /*
 1454          * XXX buffer (sc_imess) size for message
 1455          */
 1456 
 1457         n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
 1458 
 1459         if (sc->sc_rev == NCR_VARIANT_FAS366) {
 1460                 n *= 2;
 1461 
 1462                 for (i = 0; i < n; i++)
 1463                         ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
 1464 
 1465                 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) {
 1466 
 1467                         NCR_WRITE_REG(sc, NCR_FIFO, 0);
 1468                         ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO);
 1469 
 1470                         NCR_READ_REG(sc, NCR_FIFO);
 1471 
 1472                         ncr53c9x_flushfifo(sc);
 1473                 }
 1474         } else {
 1475                 for (i = 0; i < n; i++)
 1476                         ibuf[i] = NCR_READ_REG(sc, NCR_FIFO);
 1477         }
 1478 
 1479         sc->sc_imlen += i;
 1480 
 1481 #if 0
 1482 #ifdef NCR53C9X_DEBUG
 1483         NCR_TRACE(("\n[rdfifo %s (%d):",
 1484             (how == NCR_RDFIFO_START) ? "start" : "cont", (int)sc->sc_imlen));
 1485         if (ncr53c9x_debug & NCR_SHOWTRAC) {
 1486                 for (i = 0; i < sc->sc_imlen; i++)
 1487                         printf(" %02x", sc->sc_imess[i]);
 1488                 printf("]\n");
 1489         }
 1490 #endif
 1491 #endif
 1492         return (sc->sc_imlen);
 1493 }
 1494 
 1495 static void
 1496 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len)
 1497 {
 1498         int i;
 1499 
 1500 #ifdef NCR53C9X_DEBUG
 1501         NCR_MSGS(("[wrfifo(%d):", len));
 1502         if (ncr53c9x_debug & NCR_SHOWMSGS) {
 1503                 for (i = 0; i < len; i++)
 1504                         printf(" %02x", p[i]);
 1505                 printf("]\n");
 1506         }
 1507 #endif
 1508 
 1509         for (i = 0; i < len; i++) {
 1510                 NCR_WRITE_REG(sc, NCR_FIFO, p[i]);
 1511 
 1512                 if (sc->sc_rev == NCR_VARIANT_FAS366)
 1513                         NCR_WRITE_REG(sc, NCR_FIFO, 0);
 1514         }
 1515 }
 1516 
 1517 static int
 1518 ncr53c9x_reselect(struct ncr53c9x_softc *sc, int message, int tagtype,
 1519     int tagid)
 1520 {
 1521         struct ncr53c9x_ecb *ecb = NULL;
 1522         struct ncr53c9x_linfo *li;
 1523         struct ncr53c9x_tinfo *ti;
 1524         u_char lun, selid, target;
 1525 
 1526 
 1527         if (sc->sc_rev == NCR_VARIANT_FAS366) {
 1528                 target = sc->sc_selid;
 1529         } else {
 1530                 /*
 1531                  * The SCSI chip made a snapshot of the data bus
 1532                  * while the reselection was being negotiated.
 1533                  * This enables us to determine which target did
 1534                  * the reselect.
 1535                  */
 1536                 selid = sc->sc_selid & ~(1 << sc->sc_id);
 1537                 if (selid & (selid - 1)) {
 1538                         device_printf(sc->sc_dev, "reselect with invalid "
 1539                             "selid %02x; sending DEVICE RESET\n", selid);
 1540                         goto reset;
 1541                 }
 1542 
 1543                 target = ffs(selid) - 1;
 1544         }
 1545         lun = message & 0x07;
 1546 
 1547         /*
 1548          * Search wait queue for disconnected command.
 1549          * The list should be short, so I haven't bothered with
 1550          * any more sophisticated structures than a simple
 1551          * singly linked list.
 1552          */
 1553         ti = &sc->sc_tinfo[target];
 1554         li = TINFO_LUN(ti, lun);
 1555 
 1556         /*
 1557          * We can get as far as the LUN with the IDENTIFY
 1558          * message.  Check to see if we're running an
 1559          * untagged command.  Otherwise ack the IDENTIFY
 1560          * and wait for a tag message.
 1561          */
 1562         if (li != NULL) {
 1563                 if (li->untagged != NULL && li->busy)
 1564                         ecb = li->untagged;
 1565                 else if (tagtype != MSG_SIMPLE_Q_TAG) {
 1566                         /* Wait for tag to come by. */
 1567                         sc->sc_state = NCR_IDENTIFIED;
 1568                         return (0);
 1569                 } else if (tagtype)
 1570                         ecb = li->queued[tagid];
 1571         }
 1572         if (ecb == NULL) {
 1573                 device_printf(sc->sc_dev, "reselect from target %d lun %d "
 1574                     "tag %x:%x with no nexus; sending ABORT\n",
 1575                     target, lun, tagtype, tagid);
 1576                 goto abort;
 1577         }
 1578 
 1579         /* Make this nexus active again. */
 1580         sc->sc_state = NCR_CONNECTED;
 1581         sc->sc_nexus = ecb;
 1582         ncr53c9x_setsync(sc, ti);
 1583 
 1584         if (ecb->flags & ECB_RESET)
 1585                 ncr53c9x_sched_msgout(SEND_DEV_RESET);
 1586         else if (ecb->flags & ECB_ABORT)
 1587                 ncr53c9x_sched_msgout(SEND_ABORT);
 1588 
 1589         /* Do an implicit RESTORE POINTERS. */
 1590         sc->sc_dp = ecb->daddr;
 1591         sc->sc_dleft = ecb->dleft;
 1592 
 1593         return (0);
 1594 
 1595 reset:
 1596         ncr53c9x_sched_msgout(SEND_DEV_RESET);
 1597         return (1);
 1598 
 1599 abort:
 1600         ncr53c9x_sched_msgout(SEND_ABORT);
 1601         return (1);
 1602 }
 1603 
 1604 /* From NetBSD; these should go into CAM at some point. */
 1605 #define MSG_ISEXTENDED(m)       ((m) == MSG_EXTENDED)
 1606 #define MSG_IS1BYTE(m) \
 1607         ((!MSG_ISEXTENDED(m) && (m) < 0x20) || MSG_ISIDENTIFY(m))
 1608 #define MSG_IS2BYTE(m)          (((m) & 0xf0) == 0x20)
 1609 
 1610 static inline int
 1611 __verify_msg_format(u_char *p, int len)
 1612 {
 1613 
 1614         if (len == 1 && MSG_IS1BYTE(p[0]))
 1615                 return (1);
 1616         if (len == 2 && MSG_IS2BYTE(p[0]))
 1617                 return (1);
 1618         if (len >= 3 && MSG_ISEXTENDED(p[0]) &&
 1619             len == p[1] + 2)
 1620                 return (1);
 1621 
 1622         return (0);
 1623 }
 1624 
 1625 /*
 1626  * Get an incoming message as initiator.
 1627  *
 1628  * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a
 1629  * byte in the FIFO.
 1630  */
 1631 static void
 1632 ncr53c9x_msgin(struct ncr53c9x_softc *sc)
 1633 {
 1634         struct ncr53c9x_ecb *ecb;
 1635         struct ncr53c9x_linfo *li;
 1636         struct ncr53c9x_tinfo *ti;
 1637         u_char *pb;
 1638         int lun, plen;
 1639 
 1640         NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen));
 1641 
 1642         if (sc->sc_imlen == 0) {
 1643                 device_printf(sc->sc_dev, "msgin: no msg byte available\n");
 1644                 return;
 1645         }
 1646 
 1647         /*
 1648          * Prepare for a new message.  A message should (according
 1649          * to the SCSI standard) be transmitted in one single
 1650          * MESSAGE_IN_PHASE.  If we have been in some other phase,
 1651          * then this is a new message.
 1652          */
 1653         if (sc->sc_prevphase != MESSAGE_IN_PHASE &&
 1654             sc->sc_state != NCR_RESELECTED) {
 1655                 device_printf(sc->sc_dev, "phase change, dropping message, "
 1656                     "prev %d, state %d\n", sc->sc_prevphase, sc->sc_state);
 1657                 sc->sc_flags &= ~NCR_DROP_MSGI;
 1658                 sc->sc_imlen = 0;
 1659         }
 1660 
 1661         /*
 1662          * If we're going to reject the message, don't bother storing
 1663          * the incoming bytes.  But still, we need to ACK them.
 1664          */
 1665         if ((sc->sc_flags & NCR_DROP_MSGI) != 0) {
 1666                 NCRCMD(sc, NCRCMD_MSGOK);
 1667                 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]);
 1668                 return;
 1669         }
 1670 
 1671         if (sc->sc_imlen >= NCR_MAX_MSG_LEN) {
 1672                 ncr53c9x_sched_msgout(SEND_REJECT);
 1673                 sc->sc_flags |= NCR_DROP_MSGI;
 1674         } else {
 1675                 switch (sc->sc_state) {
 1676                 /*
 1677                  * if received message is the first of reselection
 1678                  * then first byte is selid, and then message
 1679                  */
 1680                 case NCR_RESELECTED:
 1681                         pb = sc->sc_imess + 1;
 1682                         plen = sc->sc_imlen - 1;
 1683                         break;
 1684 
 1685                 default:
 1686                         pb = sc->sc_imess;
 1687                         plen = sc->sc_imlen;
 1688                 }
 1689 
 1690                 if (__verify_msg_format(pb, plen))
 1691                         goto gotit;
 1692         }
 1693 
 1694         /* Acknowledge what we have so far. */
 1695         NCRCMD(sc, NCRCMD_MSGOK);
 1696         return;
 1697 
 1698 gotit:
 1699         NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state));
 1700         /*
 1701          * We got a complete message, flush the imess.
 1702          * XXX nobody uses imlen below.
 1703          */
 1704         sc->sc_imlen = 0;
 1705         /*
 1706          * Now we should have a complete message (1 byte, 2 byte
 1707          * and moderately long extended messages).  We only handle
 1708          * extended messages which total length is shorter than
 1709          * NCR_MAX_MSG_LEN.  Longer messages will be amputated.
 1710          */
 1711         switch (sc->sc_state) {
 1712         case NCR_CONNECTED:
 1713                 ecb = sc->sc_nexus;
 1714                 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 1715 
 1716                 switch (sc->sc_imess[0]) {
 1717                 case MSG_CMDCOMPLETE:
 1718                         NCR_MSGS(("cmdcomplete "));
 1719                         if (sc->sc_dleft < 0) {
 1720                                 xpt_print_path(ecb->ccb->ccb_h.path);
 1721                                 printf("got %ld extra bytes\n",
 1722                                     -(long)sc->sc_dleft);
 1723                                 sc->sc_dleft = 0;
 1724                         }
 1725                         ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ?
 1726                             0 : sc->sc_dleft;
 1727                         if ((ecb->flags & ECB_SENSE) == 0)
 1728                                 ecb->ccb->csio.resid = ecb->dleft;
 1729                         sc->sc_state = NCR_CMDCOMPLETE;
 1730                         break;
 1731 
 1732                 case MSG_MESSAGE_REJECT:
 1733                         NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout));
 1734                         switch (sc->sc_msgout) {
 1735                         case SEND_TAG:
 1736                                 /*
 1737                                  * Target does not like tagged queuing.
 1738                                  *  - Flush the command queue
 1739                                  *  - Disable tagged queuing for the target
 1740                                  *  - Dequeue ecb from the queued array.
 1741                                  */
 1742                                 device_printf(sc->sc_dev, "tagged queuing "
 1743                                     "rejected: target %d\n",
 1744                                     ecb->ccb->ccb_h.target_id);
 1745 
 1746                                 NCR_MSGS(("(rejected sent tag)"));
 1747                                 NCRCMD(sc, NCRCMD_FLUSH);
 1748                                 DELAY(1);
 1749                                 ti->flags &= ~T_TAG;
 1750                                 lun = ecb->ccb->ccb_h.target_lun;
 1751                                 li = TINFO_LUN(ti, lun);
 1752                                 if (ecb->tag[0] &&
 1753                                     li->queued[ecb->tag[1]] != NULL) {
 1754                                         li->queued[ecb->tag[1]] = NULL;
 1755                                         li->used--;
 1756                                 }
 1757                                 ecb->tag[0] = ecb->tag[1] = 0;
 1758                                 li->untagged = ecb;
 1759                                 li->busy = 1;
 1760                                 break;
 1761 
 1762                         case SEND_SDTR:
 1763                                 device_printf(sc->sc_dev, "sync transfer "
 1764                                     "rejected: target %d\n",
 1765                                     ecb->ccb->ccb_h.target_id);
 1766 
 1767                                 sc->sc_flags &= ~NCR_SYNCHNEGO;
 1768                                 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
 1769                                 ncr53c9x_setsync(sc, ti);
 1770                                 break;
 1771 
 1772                         case SEND_WDTR:
 1773                                 device_printf(sc->sc_dev, "wide transfer "
 1774                                     "rejected: target %d\n",
 1775                                     ecb->ccb->ccb_h.target_id);
 1776                                 ti->flags &= ~(T_WIDE | T_WDTRSENT);
 1777                                 ti->width = 0;
 1778                                 break;
 1779 
 1780                         case SEND_INIT_DET_ERR:
 1781                                 goto abort;
 1782                         }
 1783                         break;
 1784 
 1785                 case MSG_NOOP:
 1786                         NCR_MSGS(("noop "));
 1787                         break;
 1788 
 1789                 case MSG_HEAD_OF_Q_TAG:
 1790                 case MSG_SIMPLE_Q_TAG:
 1791                 case MSG_ORDERED_Q_TAG:
 1792                         NCR_MSGS(("TAG %x:%x",
 1793                             sc->sc_imess[0], sc->sc_imess[1]));
 1794                         break;
 1795 
 1796                 case MSG_DISCONNECT:
 1797                         NCR_MSGS(("disconnect "));
 1798                         ti->dconns++;
 1799                         sc->sc_state = NCR_DISCONNECT;
 1800 
 1801                         /*
 1802                          * Mark the fact that all bytes have moved.  The
 1803                          * target may not bother to do a SAVE POINTERS
 1804                          * at this stage.  This flag will set the residual
 1805                          * count to zero on MSG COMPLETE.
 1806                          */
 1807                         if (sc->sc_dleft == 0)
 1808                                 ecb->flags |= ECB_TENTATIVE_DONE;
 1809                         break;
 1810 
 1811                 case MSG_SAVEDATAPOINTER:
 1812                         NCR_MSGS(("save datapointer "));
 1813                         ecb->daddr = sc->sc_dp;
 1814                         ecb->dleft = sc->sc_dleft;
 1815                         break;
 1816 
 1817                 case MSG_RESTOREPOINTERS:
 1818                         NCR_MSGS(("restore datapointer "));
 1819                         sc->sc_dp = ecb->daddr;
 1820                         sc->sc_dleft = ecb->dleft;
 1821                         break;
 1822 
 1823                 case MSG_EXTENDED:
 1824                         NCR_MSGS(("extended(%x) ", sc->sc_imess[2]));
 1825                         switch (sc->sc_imess[2]) {
 1826                         case MSG_EXT_SDTR:
 1827                                 NCR_MSGS(("SDTR period %d, offset %d ",
 1828                                     sc->sc_imess[3], sc->sc_imess[4]));
 1829                                 if (sc->sc_imess[1] != 3)
 1830                                         goto reject;
 1831                                 ti->period = sc->sc_imess[3];
 1832                                 ti->offset = sc->sc_imess[4];
 1833                                 ti->flags &= ~T_NEGOTIATE;
 1834                                 if (sc->sc_minsync == 0 ||
 1835                                     ti->offset == 0 ||
 1836                                     ti->period > 124) {
 1837 #if 0
 1838 #ifdef NCR53C9X_DEBUG
 1839                                         xpt_print_path(ecb->ccb->ccb_h.path);
 1840                                         printf("async mode\n");
 1841 #endif
 1842 #endif
 1843                                         ti->flags &= ~T_SYNCMODE;
 1844                                         if ((sc->sc_flags & NCR_SYNCHNEGO) ==
 1845                                             0) {
 1846                                                 /*
 1847                                                  * target initiated negotiation
 1848                                                  */
 1849                                                 ti->offset = 0;
 1850                                                 ncr53c9x_sched_msgout(
 1851                                                     SEND_SDTR);
 1852                                         }
 1853                                 } else {
 1854                                         ti->period =
 1855                                             ncr53c9x_cpb2stp(sc,
 1856                                             ncr53c9x_stp2cpb(sc,
 1857                                             ti->period));
 1858                                         if ((sc->sc_flags & NCR_SYNCHNEGO) ==
 1859                                             0) {
 1860                                                 /*
 1861                                                  * target initiated negotiation
 1862                                                  */
 1863                                                 if (ti->period < sc->sc_minsync)
 1864                                                         ti->period =
 1865                                                             sc->sc_minsync;
 1866                                                 if (ti->offset > 15)
 1867                                                         ti->offset = 15;
 1868                                                 ti->flags &= ~T_SYNCMODE;
 1869                                                 ncr53c9x_sched_msgout(
 1870                                                     SEND_SDTR);
 1871                                         } else {
 1872                                                 /* We are sync. */
 1873                                                 ti->flags |= T_SYNCMODE;
 1874                                         }
 1875                                 }
 1876                                 sc->sc_flags &= ~NCR_SYNCHNEGO;
 1877                                 ncr53c9x_setsync(sc, ti);
 1878                                 break;
 1879 
 1880                         case MSG_EXT_WDTR:
 1881 #ifdef NCR53C9X_DEBUG
 1882                                 device_printf(sc->sc_dev, "wide mode %d\n",
 1883                                     sc->sc_imess[3]);
 1884 #endif
 1885                                 if (sc->sc_imess[3] == 1) {
 1886                                         ti->cfg3 |= NCRFASCFG3_EWIDE;
 1887                                         ncr53c9x_setsync(sc, ti);
 1888                                 } else
 1889                                         ti->width = 0;
 1890                                 /*
 1891                                  * Device started width negotiation.
 1892                                  */
 1893                                 if (!(ti->flags & T_WDTRSENT))
 1894                                         ncr53c9x_sched_msgout(SEND_WDTR);
 1895                                 ti->flags &= ~(T_WIDE | T_WDTRSENT);
 1896                                 break;
 1897 
 1898                         default:
 1899                                 xpt_print_path(ecb->ccb->ccb_h.path);
 1900                                 printf("unrecognized MESSAGE EXTENDED;"
 1901                                     " sending REJECT\n");
 1902                                 goto reject;
 1903                         }
 1904                         break;
 1905 
 1906                 default:
 1907                         NCR_MSGS(("ident "));
 1908                         xpt_print_path(ecb->ccb->ccb_h.path);
 1909                         printf("unrecognized MESSAGE; sending REJECT\n");
 1910                         /* FALLTHROUGH */
 1911                 reject:
 1912                         ncr53c9x_sched_msgout(SEND_REJECT);
 1913                         break;
 1914                 }
 1915                 break;
 1916 
 1917         case NCR_IDENTIFIED:
 1918                 /*
 1919                  * IDENTIFY message was received and queue tag is expected
 1920                  * now.
 1921                  */
 1922                 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) ||
 1923                     (sc->sc_msgify == 0)) {
 1924                         device_printf(sc->sc_dev, "TAG reselect without "
 1925                             "IDENTIFY; MSG %x; sending DEVICE RESET\n",
 1926                             sc->sc_imess[0]);
 1927                         goto reset;
 1928                 }
 1929                 (void) ncr53c9x_reselect(sc, sc->sc_msgify,
 1930                     sc->sc_imess[0], sc->sc_imess[1]);
 1931                 break;
 1932 
 1933         case NCR_RESELECTED:
 1934                 if (MSG_ISIDENTIFY(sc->sc_imess[1])) {
 1935                         sc->sc_msgify = sc->sc_imess[1];
 1936                 } else {
 1937                         device_printf(sc->sc_dev, "reselect without IDENTIFY;"
 1938                             " MSG %x; sending DEVICE RESET\n", sc->sc_imess[1]);
 1939                         goto reset;
 1940                 }
 1941                 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0);
 1942                 break;
 1943 
 1944         default:
 1945                 device_printf(sc->sc_dev, "unexpected MESSAGE IN; "
 1946                     "sending DEVICE RESET\n");
 1947                 /* FALLTHROUGH */
 1948         reset:
 1949                 ncr53c9x_sched_msgout(SEND_DEV_RESET);
 1950                 break;
 1951 
 1952         abort:
 1953                 ncr53c9x_sched_msgout(SEND_ABORT);
 1954         }
 1955 
 1956         /* If we have more messages to send set ATN. */
 1957         if (sc->sc_msgpriq)
 1958                 NCRCMD(sc, NCRCMD_SETATN);
 1959 
 1960         /* Acknowledge last message byte. */
 1961         NCRCMD(sc, NCRCMD_MSGOK);
 1962 
 1963         /* Done, reset message pointer. */
 1964         sc->sc_flags &= ~NCR_DROP_MSGI;
 1965         sc->sc_imlen = 0;
 1966 }
 1967 
 1968 /*
 1969  * Send the highest priority, scheduled message.
 1970  */
 1971 static void
 1972 ncr53c9x_msgout(struct ncr53c9x_softc *sc)
 1973 {
 1974         struct ncr53c9x_tinfo *ti;
 1975         struct ncr53c9x_ecb *ecb;
 1976         size_t size;
 1977 #ifdef NCR53C9X_DEBUG
 1978         int i;
 1979 #endif
 1980 
 1981         NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]",
 1982             sc->sc_msgpriq, sc->sc_prevphase));
 1983 
 1984         /*
 1985          * XXX - the NCR_ATN flag is not in sync with the actual ATN
 1986          *       condition on the SCSI bus.  The 53c9x chip
 1987          *       automatically turns off ATN before sending the
 1988          *       message byte.  (See also the comment below in the
 1989          *       default case when picking out a message to send.)
 1990          */
 1991         if (sc->sc_flags & NCR_ATN) {
 1992                 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) {
 1993                 new:
 1994                         NCRCMD(sc, NCRCMD_FLUSH);
 1995 /*                      DELAY(1); */
 1996                         sc->sc_msgoutq = 0;
 1997                         sc->sc_omlen = 0;
 1998                 }
 1999         } else {
 2000                 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
 2001                         ncr53c9x_sched_msgout(sc->sc_msgoutq);
 2002                         goto new;
 2003                 } else {
 2004                         device_printf(sc->sc_dev, "at line %d: unexpected "
 2005                             "MESSAGE OUT phase\n", __LINE__);
 2006                 }
 2007         }
 2008 
 2009         if (sc->sc_omlen == 0) {
 2010                 /* Pick up highest priority message. */
 2011                 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq;
 2012                 sc->sc_msgoutq |= sc->sc_msgout;
 2013                 sc->sc_msgpriq &= ~sc->sc_msgout;
 2014                 sc->sc_omlen = 1;               /* "Default" message len */
 2015                 switch (sc->sc_msgout) {
 2016                 case SEND_SDTR:
 2017                         ecb = sc->sc_nexus;
 2018                         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2019                         sc->sc_omess[0] = MSG_EXTENDED;
 2020                         sc->sc_omess[1] = MSG_EXT_SDTR_LEN;
 2021                         sc->sc_omess[2] = MSG_EXT_SDTR;
 2022                         sc->sc_omess[3] = ti->period;
 2023                         sc->sc_omess[4] = ti->offset;
 2024                         sc->sc_omlen = 5;
 2025                         if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) {
 2026                                 ti->flags |= T_SYNCMODE;
 2027                                 ncr53c9x_setsync(sc, ti);
 2028                         }
 2029                         break;
 2030 
 2031                 case SEND_WDTR:
 2032                         ecb = sc->sc_nexus;
 2033                         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2034                         sc->sc_omess[0] = MSG_EXTENDED;
 2035                         sc->sc_omess[1] = MSG_EXT_WDTR_LEN;
 2036                         sc->sc_omess[2] = MSG_EXT_WDTR;
 2037                         sc->sc_omess[3] = ti->width;
 2038                         sc->sc_omlen = 4;
 2039                         break;
 2040 
 2041                 case SEND_IDENTIFY:
 2042                         if (sc->sc_state != NCR_CONNECTED) {
 2043                                 device_printf(sc->sc_dev, "at line %d: no "
 2044                                     "nexus\n", __LINE__);
 2045                         }
 2046                         ecb = sc->sc_nexus;
 2047                         sc->sc_omess[0] =
 2048                             MSG_IDENTIFY(ecb->ccb->ccb_h.target_lun, 0);
 2049                         break;
 2050 
 2051                 case SEND_TAG:
 2052                         if (sc->sc_state != NCR_CONNECTED) {
 2053                                 device_printf(sc->sc_dev, "at line %d: no "
 2054                                     "nexus\n", __LINE__);
 2055                         }
 2056                         ecb = sc->sc_nexus;
 2057                         sc->sc_omess[0] = ecb->tag[0];
 2058                         sc->sc_omess[1] = ecb->tag[1];
 2059                         sc->sc_omlen = 2;
 2060                         break;
 2061 
 2062                 case SEND_DEV_RESET:
 2063                         sc->sc_flags |= NCR_ABORTING;
 2064                         sc->sc_omess[0] = MSG_BUS_DEV_RESET;
 2065                         ecb = sc->sc_nexus;
 2066                         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2067                         ti->flags &= ~T_SYNCMODE;
 2068                         if ((ti->flags & T_SYNCHOFF) == 0)
 2069                                 /* We can re-start sync negotiation. */
 2070                                 ti->flags |= T_NEGOTIATE;
 2071                         break;
 2072 
 2073                 case SEND_PARITY_ERROR:
 2074                         sc->sc_omess[0] = MSG_PARITY_ERROR;
 2075                         break;
 2076 
 2077                 case SEND_ABORT:
 2078                         sc->sc_flags |= NCR_ABORTING;
 2079                         sc->sc_omess[0] = MSG_ABORT;
 2080                         break;
 2081 
 2082                 case SEND_INIT_DET_ERR:
 2083                         sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
 2084                         break;
 2085 
 2086                 case SEND_REJECT:
 2087                         sc->sc_omess[0] = MSG_MESSAGE_REJECT;
 2088                         break;
 2089 
 2090                 default:
 2091                         /*
 2092                          * We normally do not get here, since the chip
 2093                          * automatically turns off ATN before the last
 2094                          * byte of a message is sent to the target.
 2095                          * However, if the target rejects our (multi-byte)
 2096                          * message early by switching to MSG IN phase
 2097                          * ATN remains on, so the target may return to
 2098                          * MSG OUT phase.  If there are no scheduled messages
 2099                          * left we send a NO-OP.
 2100                          *
 2101                          * XXX - Note that this leaves no useful purpose for
 2102                          * the NCR_ATN flag.
 2103                          */
 2104                         sc->sc_flags &= ~NCR_ATN;
 2105                         sc->sc_omess[0] = MSG_NOOP;
 2106                 }
 2107                 sc->sc_omp = sc->sc_omess;
 2108         }
 2109 
 2110 #ifdef NCR53C9X_DEBUG
 2111         if (ncr53c9x_debug & NCR_SHOWMSGS) {
 2112                 NCR_MSGS(("<msgout:"));
 2113                 for (i = 0; i < sc->sc_omlen; i++)
 2114                         NCR_MSGS((" %02x", sc->sc_omess[i]));
 2115                 NCR_MSGS(("> "));
 2116         }
 2117 #endif
 2118         if (sc->sc_rev == NCR_VARIANT_FAS366) {
 2119                 /*
 2120                  * XXX FIFO size
 2121                  */
 2122                 ncr53c9x_flushfifo(sc);
 2123                 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen);
 2124                 NCRCMD(sc, NCRCMD_TRANS);
 2125         } else {
 2126                 /* (Re)send the message. */
 2127                 size = min(sc->sc_omlen, sc->sc_maxxfer);
 2128                 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size);
 2129                 /* Program the SCSI counter. */
 2130                 NCR_SET_COUNT(sc, size);
 2131 
 2132                 /* Load the count in and start the message-out transfer. */
 2133                 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
 2134                 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
 2135                 NCRDMA_GO(sc);
 2136         }
 2137 }
 2138 
 2139 /*
 2140  * This is the most critical part of the driver, and has to know
 2141  * how to deal with *all* error conditions and phases from the SCSI
 2142  * bus.  If there are no errors and the DMA was active, then call the
 2143  * DMA pseudo-interrupt handler.  If this returns 1, then that was it
 2144  * and we can return from here without further processing.
 2145  *
 2146  * Most of this needs verifying.
 2147  */
 2148 void
 2149 ncr53c9x_intr(void *arg)
 2150 {
 2151         struct ncr53c9x_softc *sc = arg;
 2152         struct ncr53c9x_ecb *ecb;
 2153         struct ncr53c9x_linfo *li;
 2154         struct ncr53c9x_tinfo *ti;
 2155         struct timeval cur, wait;
 2156         size_t size;
 2157         int i, nfifo;
 2158         u_char msg;
 2159 
 2160         NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state));
 2161 
 2162         if (!NCRDMA_ISINTR(sc))
 2163                 return;
 2164 
 2165         mtx_lock(&sc->sc_lock);
 2166 again:
 2167         /* and what do the registers say... */
 2168         ncr53c9x_readregs(sc);
 2169 
 2170         /*
 2171          * At the moment, only a SCSI Bus Reset or Illegal
 2172          * Command are classed as errors.  A disconnect is a
 2173          * valid condition, and we let the code check is the
 2174          * "NCR_BUSFREE_OK" flag was set before declaring it
 2175          * and error.
 2176          *
 2177          * Also, the status register tells us about "Gross
 2178          * Errors" and "Parity errors".  Only the Gross Error
 2179          * is really bad, and the parity errors are dealt
 2180          * with later.
 2181          *
 2182          * TODO
 2183          *      If there are too many parity error, go to slow
 2184          *      cable mode?
 2185          */
 2186 
 2187         if ((sc->sc_espintr & NCRINTR_SBR) != 0) {
 2188                 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) {
 2189                         NCRCMD(sc, NCRCMD_FLUSH);
 2190                         DELAY(1);
 2191                 }
 2192                 if (sc->sc_state != NCR_SBR) {
 2193                         device_printf(sc->sc_dev, "SCSI bus reset\n");
 2194                         ncr53c9x_init(sc, 0);   /* Restart everything. */
 2195                         goto out;
 2196                 }
 2197 #if 0
 2198 /*XXX*/         printf("<expected bus reset: "
 2199                     "[intr %x, stat %x, step %d]>\n",
 2200                     sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
 2201 #endif
 2202                 if (sc->sc_nexus != NULL)
 2203                         panic("%s: nexus in reset state",
 2204                             device_get_nameunit(sc->sc_dev));
 2205                 goto sched;
 2206         }
 2207 
 2208         ecb = sc->sc_nexus;
 2209 
 2210 #define NCRINTR_ERR (NCRINTR_SBR | NCRINTR_ILL)
 2211         if (sc->sc_espintr & NCRINTR_ERR ||
 2212             sc->sc_espstat & NCRSTAT_GE) {
 2213                 if ((sc->sc_espstat & NCRSTAT_GE) != 0) {
 2214                         /* Gross Error; no target? */
 2215                         if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
 2216                                 NCRCMD(sc, NCRCMD_FLUSH);
 2217                                 DELAY(1);
 2218                         }
 2219                         if (sc->sc_state == NCR_CONNECTED ||
 2220                             sc->sc_state == NCR_SELECTING) {
 2221                                 ecb->ccb->ccb_h.status = CAM_SEL_TIMEOUT;
 2222                                 ncr53c9x_done(sc, ecb);
 2223                         }
 2224                         goto out;
 2225                 }
 2226 
 2227                 if ((sc->sc_espintr & NCRINTR_ILL) != 0) {
 2228                         if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) {
 2229                                 /*
 2230                                  * Eat away "Illegal command" interrupt
 2231                                  * on a ESP100 caused by a re-selection
 2232                                  * while we were trying to select
 2233                                  * another target.
 2234                                  */
 2235 #ifdef DEBUG
 2236                                 device_printf(sc->sc_dev, "ESP100 work-around "
 2237                                     "activated\n");
 2238 #endif
 2239                                 sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
 2240                                 goto out;
 2241                         }
 2242                         /* Illegal command, out of sync? */
 2243                         device_printf(sc->sc_dev, "illegal command: 0x%x "
 2244                             "(state %d, phase %x, prevphase %x)\n",
 2245                             sc->sc_lastcmd,
 2246                             sc->sc_state, sc->sc_phase, sc->sc_prevphase);
 2247                         if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
 2248                                 NCRCMD(sc, NCRCMD_FLUSH);
 2249                                 DELAY(1);
 2250                         }
 2251                         ncr53c9x_init(sc, 1); /* Restart everything. */
 2252                         goto out;
 2253                 }
 2254         }
 2255         sc->sc_flags &= ~NCR_EXPECT_ILLCMD;
 2256 
 2257         /*
 2258          * Call if DMA is active.
 2259          *
 2260          * If DMA_INTR returns true, then maybe go 'round the loop
 2261          * again in case there is no more DMA queued, but a phase
 2262          * change is expected.
 2263          */
 2264         if (NCRDMA_ISACTIVE(sc)) {
 2265                 if (NCRDMA_INTR(sc) == -1) {
 2266                         device_printf(sc->sc_dev, "DMA error; resetting\n");
 2267                         ncr53c9x_init(sc, 1);
 2268                         goto out;
 2269                 }
 2270                 /* If DMA active here, then go back to work... */
 2271                 if (NCRDMA_ISACTIVE(sc))
 2272                         goto out;
 2273 
 2274                 if ((sc->sc_espstat & NCRSTAT_TC) == 0) {
 2275                         /*
 2276                          * DMA not completed.  If we can not find a
 2277                          * acceptable explanation, print a diagnostic.
 2278                          */
 2279                         if (sc->sc_state == NCR_SELECTING)
 2280                                 /*
 2281                                  * This can happen if we are reselected
 2282                                  * while using DMA to select a target.
 2283                                  */
 2284                                 /*void*/;
 2285                         else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) {
 2286                                 /*
 2287                                  * Our (multi-byte) message (eg SDTR) was
 2288                                  * interrupted by the target to send
 2289                                  * a MSG REJECT.
 2290                                  * Print diagnostic if current phase
 2291                                  * is not MESSAGE IN.
 2292                                  */
 2293                                 if (sc->sc_phase != MESSAGE_IN_PHASE)
 2294                                         device_printf(sc->sc_dev,"!TC on MSGOUT"
 2295                                             " [intr %x, stat %x, step %d]"
 2296                                             " prevphase %x, resid %lx\n",
 2297                                             sc->sc_espintr,
 2298                                             sc->sc_espstat,
 2299                                             sc->sc_espstep,
 2300                                             sc->sc_prevphase,
 2301                                             (u_long)sc->sc_omlen);
 2302                         } else if (sc->sc_dleft == 0) {
 2303                                 /*
 2304                                  * The DMA operation was started for
 2305                                  * a DATA transfer.  Print a diagnostic
 2306                                  * if the DMA counter and TC bit
 2307                                  * appear to be out of sync.
 2308                                  *
 2309                                  * XXX This is fatal and usually means that
 2310                                  *     the DMA engine is hopelessly out of
 2311                                  *     sync with reality.  A disk is likely
 2312                                  *     getting spammed at this point.
 2313                                  */
 2314                                 device_printf(sc->sc_dev, "!TC on DATA XFER"
 2315                                     " [intr %x, stat %x, step %d]"
 2316                                     " prevphase %x, resid %x\n",
 2317                                     sc->sc_espintr,
 2318                                     sc->sc_espstat,
 2319                                     sc->sc_espstep,
 2320                                     sc->sc_prevphase,
 2321                                     ecb ? ecb->dleft : -1);
 2322                                 panic("esp: unrecoverable DMA error");
 2323                         }
 2324                 }
 2325         }
 2326 
 2327         /*
 2328          * Check for less serious errors.
 2329          */
 2330         if ((sc->sc_espstat & NCRSTAT_PE) != 0) {
 2331                 device_printf(sc->sc_dev, "SCSI bus parity error\n");
 2332                 if (sc->sc_prevphase == MESSAGE_IN_PHASE)
 2333                         ncr53c9x_sched_msgout(SEND_PARITY_ERROR);
 2334                 else
 2335                         ncr53c9x_sched_msgout(SEND_INIT_DET_ERR);
 2336         }
 2337 
 2338         if ((sc->sc_espintr & NCRINTR_DIS) != 0) {
 2339                 sc->sc_msgify = 0;
 2340                 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>",
 2341                     sc->sc_espintr,sc->sc_espstat,sc->sc_espstep));
 2342                 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
 2343                         NCRCMD(sc, NCRCMD_FLUSH);
 2344 /*                      DELAY(1); */
 2345                 }
 2346                 /*
 2347                  * This command must (apparently) be issued within
 2348                  * 250mS of a disconnect.  So here you are...
 2349                  */
 2350                 NCRCMD(sc, NCRCMD_ENSEL);
 2351 
 2352                 switch (sc->sc_state) {
 2353                 case NCR_RESELECTED:
 2354                         goto sched;
 2355 
 2356                 case NCR_SELECTING:
 2357                         ecb->ccb->ccb_h.status = CAM_SEL_TIMEOUT;
 2358 
 2359                         /* Selection timeout -- discard all LUNs if empty. */
 2360                         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2361                         li = LIST_FIRST(&ti->luns);
 2362                         while (li != NULL) {
 2363                                 if (li->untagged == NULL && li->used == 0) {
 2364                                         if (li->lun < NCR_NLUN)
 2365                                                 ti->lun[li->lun] = NULL;
 2366                                         LIST_REMOVE(li, link);
 2367                                         free(li, M_DEVBUF);
 2368                                         /*
 2369                                          * Restart the search at the beginning.
 2370                                          */
 2371                                         li = LIST_FIRST(&ti->luns);
 2372                                         continue;
 2373                                 }
 2374                                 li = LIST_NEXT(li, link);
 2375                         }
 2376                         goto finish;
 2377 
 2378                 case NCR_CONNECTED:
 2379                         if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) {
 2380 #ifdef NCR53C9X_DEBUG
 2381                                 if (ecb != NULL)
 2382                                         xpt_print_path(ecb->ccb->ccb_h.path);
 2383                                 printf("sync nego not completed!\n");
 2384 #endif
 2385                                 ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2386                                 sc->sc_flags &= ~NCR_SYNCHNEGO;
 2387                                 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE);
 2388                         }
 2389 
 2390                         /* It may be OK to disconnect. */
 2391                         if ((sc->sc_flags & NCR_ABORTING) == 0) {
 2392                                 /*
 2393                                  * Section 5.1.1 of the SCSI 2 spec
 2394                                  * suggests issuing a REQUEST SENSE
 2395                                  * following an unexpected disconnect.
 2396                                  * Some devices go into a contingent
 2397                                  * allegiance condition when
 2398                                  * disconnecting, and this is necessary
 2399                                  * to clean up their state.
 2400                                  */
 2401                                 device_printf(sc->sc_dev, "unexpected "
 2402                                     "disconnect [state %d, intr %x, stat %x, "
 2403                                     "phase(c %x, p %x)]; ", sc->sc_state,
 2404                                     sc->sc_espintr, sc->sc_espstat,
 2405                                     sc->sc_phase, sc->sc_prevphase);
 2406 
 2407                                 /*
 2408                                  * XXX This will cause a chip reset and will
 2409                                  *     prevent us from finding out the real
 2410                                  *     problem with the device.  However, it's
 2411                                  *     neccessary until a way can be found to
 2412                                  *     safely cancel the DMA that is in
 2413                                  *     progress.
 2414                                  */
 2415                                 if (1 || (ecb->flags & ECB_SENSE) != 0) {
 2416                                         printf("resetting\n");
 2417                                         goto reset;
 2418                                 }
 2419                                 printf("sending REQUEST SENSE\n");
 2420                                 untimeout(ncr53c9x_timeout, ecb,
 2421                                           ecb->ccb->ccb_h.timeout_ch);
 2422                                 ncr53c9x_sense(sc, ecb);
 2423                                 goto out;
 2424                         }
 2425 
 2426                         ecb->ccb->ccb_h.status = CAM_CMD_TIMEOUT;
 2427                         goto finish;
 2428 
 2429                 case NCR_DISCONNECT:
 2430                         sc->sc_nexus = NULL;
 2431                         goto sched;
 2432 
 2433                 case NCR_CMDCOMPLETE:
 2434                         ecb->ccb->ccb_h.status = CAM_REQ_CMP;
 2435                         goto finish;
 2436                 }
 2437         }
 2438 
 2439         switch (sc->sc_state) {
 2440         case NCR_SBR:
 2441                 device_printf(sc->sc_dev, "waiting for Bus Reset to happen\n");
 2442                 goto out;
 2443 
 2444         case NCR_RESELECTED:
 2445                 /*
 2446                  * We must be continuing a message?
 2447                  */
 2448                 device_printf(sc->sc_dev, "unhandled reselect continuation, "
 2449                     "state %d, intr %02x\n", sc->sc_state, sc->sc_espintr);
 2450                 ncr53c9x_init(sc, 1);
 2451                 goto out;
 2452                 break;
 2453 
 2454         case NCR_IDENTIFIED:
 2455                 ecb = sc->sc_nexus;
 2456                 if (sc->sc_phase != MESSAGE_IN_PHASE) {
 2457                         i = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
 2458                         /*
 2459                          * Things are seriously screwed up.
 2460                          * Pull the brakes, i.e. reset.
 2461                          */
 2462                         device_printf(sc->sc_dev, "target didn't send tag: %d "
 2463                             "bytes in FIFO\n", i);
 2464                         /* Drain and display FIFO. */
 2465                         while (i-- > 0)
 2466                                 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO));
 2467 
 2468                         ncr53c9x_init(sc, 1);
 2469                         goto out;
 2470                 } else
 2471                         goto msgin;
 2472 
 2473         case NCR_IDLE:
 2474         case NCR_SELECTING:
 2475                 ecb = sc->sc_nexus;
 2476                 if (sc->sc_espintr & NCRINTR_RESEL) {
 2477                         sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0;
 2478                         sc->sc_flags = 0;
 2479                         /*
 2480                          * If we're trying to select a
 2481                          * target ourselves, push our command
 2482                          * back into the ready list.
 2483                          */
 2484                         if (sc->sc_state == NCR_SELECTING) {
 2485                                 NCR_INTS(("backoff selector "));
 2486                                 untimeout(ncr53c9x_timeout, ecb,
 2487                                           ecb->ccb->ccb_h.timeout_ch);
 2488                                 ncr53c9x_dequeue(sc, ecb);
 2489                                 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain);
 2490                                 ecb->flags |= ECB_READY;
 2491                                 ecb = sc->sc_nexus = NULL;
 2492                         }
 2493                         sc->sc_state = NCR_RESELECTED;
 2494                         if (sc->sc_phase != MESSAGE_IN_PHASE) {
 2495                                 /*
 2496                                  * Things are seriously screwed up.
 2497                                  * Pull the brakes, i.e. reset
 2498                                  */
 2499                                 device_printf(sc->sc_dev, "target didn't "
 2500                                     "identify\n");
 2501                                 ncr53c9x_init(sc, 1);
 2502                                 goto out;
 2503                         }
 2504                         /*
 2505                          * The C90 only inhibits FIFO writes until reselection
 2506                          * is complete instead of waiting until the interrupt
 2507                          * status register has been read.  So, if the reselect
 2508                          * happens while we were entering command bytes (for
 2509                          * another target) some of those bytes can appear in
 2510                          * the FIFO here, after the interrupt is taken.
 2511                          *
 2512                          * To remedy this situation, pull the Selection ID
 2513                          * and Identify message from the FIFO directly, and
 2514                          * ignore any extraneous FIFO contents.  Also, set
 2515                          * a flag that allows one Illegal Command Interrupt
 2516                          * to occur which the chip also generates as a result
 2517                          * of writing to the FIFO during a reselect.
 2518                          */
 2519                         if (sc->sc_rev == NCR_VARIANT_ESP100) {
 2520                                 nfifo =
 2521                                     NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF;
 2522                                 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO);
 2523                                 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO);
 2524                                 sc->sc_imlen = 2;
 2525                                 if (nfifo != 2) {
 2526                                         /* Flush the rest. */
 2527                                         NCRCMD(sc, NCRCMD_FLUSH);
 2528                                 }
 2529                                 sc->sc_flags |= NCR_EXPECT_ILLCMD;
 2530                                 if (nfifo > 2)
 2531                                         nfifo = 2;      /* We fixed it... */
 2532                         } else
 2533                                 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
 2534 
 2535                         if (nfifo != 2) {
 2536                                 device_printf(sc->sc_dev, "RESELECT: %d bytes "
 2537                                     "in FIFO! [intr %x, stat %x, step %d, "
 2538                                     "prevphase %x]\n",
 2539                                     nfifo,
 2540                                     sc->sc_espintr,
 2541                                     sc->sc_espstat,
 2542                                     sc->sc_espstep,
 2543                                     sc->sc_prevphase);
 2544                                 ncr53c9x_init(sc, 1);
 2545                                 goto out;
 2546                         }
 2547                         sc->sc_selid = sc->sc_imess[0];
 2548                         NCR_INTS(("selid=%02x ", sc->sc_selid));
 2549 
 2550                         /* Handle IDENTIFY message. */
 2551                         ncr53c9x_msgin(sc);
 2552 
 2553                         if (sc->sc_state != NCR_CONNECTED &&
 2554                             sc->sc_state != NCR_IDENTIFIED) {
 2555                                 /* IDENTIFY fail?! */
 2556                                 device_printf(sc->sc_dev, "identify failed, "
 2557                                     "state %d, intr %02x\n", sc->sc_state,
 2558                                     sc->sc_espintr);
 2559                                 ncr53c9x_init(sc, 1);
 2560                                 goto out;
 2561                         }
 2562                         goto shortcut;  /* i.e. next phase expected soon */
 2563                 }
 2564 
 2565 #define NCRINTR_DONE    (NCRINTR_FC | NCRINTR_BS)
 2566                 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) {
 2567                         /*
 2568                          * Arbitration won; examine the `step' register
 2569                          * to determine how far the selection could progress.
 2570                          */
 2571                         if (ecb == NULL) {
 2572                                 /*
 2573                                  * When doing path inquiry during boot
 2574                                  * FAS100A trigger a stray interrupt which
 2575                                  * we just ignore instead of panicing.
 2576                                  */
 2577                                 if (sc->sc_state == NCR_IDLE &&
 2578                                     sc->sc_espstep == 0)
 2579                                         goto out;
 2580                                 panic("ncr53c9x: no nexus");
 2581                         }
 2582 
 2583                         ti = &sc->sc_tinfo[ecb->ccb->ccb_h.target_id];
 2584 
 2585                         switch (sc->sc_espstep) {
 2586                         case 0:
 2587                                 /*
 2588                                  * The target did not respond with a
 2589                                  * message out phase - probably an old
 2590                                  * device that doesn't recognize ATN.
 2591                                  * Clear ATN and just continue, the
 2592                                  * target should be in the command
 2593                                  * phase.
 2594                                  * XXX check for command phase?
 2595                                  */
 2596                                 NCRCMD(sc, NCRCMD_RSTATN);
 2597                                 break;
 2598 
 2599                         case 1:
 2600                                 if ((ti->flags & T_NEGOTIATE) == 0 &&
 2601                                     ecb->tag[0] == 0) {
 2602                                         device_printf(sc->sc_dev, "step 1 & "
 2603                                             "!NEG\n");
 2604                                         goto reset;
 2605                                 }
 2606                                 if (sc->sc_phase != MESSAGE_OUT_PHASE) {
 2607                                         device_printf(sc->sc_dev, "!MSGOUT\n");
 2608                                         goto reset;
 2609                                 }
 2610                                 if (ti->flags & T_WIDE) {
 2611                                         ti->flags |= T_WDTRSENT;
 2612                                         ncr53c9x_sched_msgout(SEND_WDTR);
 2613                                 }
 2614                                 if (ti->flags & T_NEGOTIATE) {
 2615                                         /* Start negotiating */
 2616                                         sc->sc_flags |= NCR_SYNCHNEGO;
 2617                                         if (ecb->tag[0])
 2618                                                 ncr53c9x_sched_msgout(
 2619                                                     SEND_TAG|SEND_SDTR);
 2620                                         else
 2621                                                 ncr53c9x_sched_msgout(
 2622                                                     SEND_SDTR);
 2623                                 } else {
 2624                                         /* Could not do ATN3 so send TAG. */
 2625                                         ncr53c9x_sched_msgout(SEND_TAG);
 2626                                 }
 2627                                 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */
 2628                                 break;
 2629 
 2630                         case 3:
 2631                                 /*
 2632                                  * Grr, this is supposed to mean
 2633                                  * "target left command phase prematurely".
 2634                                  * It seems to happen regularly when
 2635                                  * sync mode is on.
 2636                                  * Look at FIFO to see if command went out.
 2637                                  * (Timing problems?)
 2638                                  */
 2639                                 if (sc->sc_features & NCR_F_DMASELECT) {
 2640                                         if (sc->sc_cmdlen == 0)
 2641                                                 /* Hope for the best... */
 2642                                                 break;
 2643                                 } else if ((NCR_READ_REG(sc, NCR_FFLAG)
 2644                                     & NCRFIFO_FF) == 0) {
 2645                                         /* Hope for the best... */
 2646                                         break;
 2647                                 }
 2648                                 printf("(%s:%d:%d): selection failed;"
 2649                                     " %d left in FIFO "
 2650                                     "[intr %x, stat %x, step %d]\n",
 2651                                     device_get_nameunit(sc->sc_dev),
 2652                                     ecb->ccb->ccb_h.target_id,
 2653                                     ecb->ccb->ccb_h.target_lun,
 2654                                     NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF,
 2655                                     sc->sc_espintr, sc->sc_espstat,
 2656                                     sc->sc_espstep);
 2657                                 NCRCMD(sc, NCRCMD_FLUSH);
 2658                                 ncr53c9x_sched_msgout(SEND_ABORT);
 2659                                 goto out;
 2660 
 2661                         case 2:
 2662                                 /* Select stuck at Command Phase. */
 2663                                 NCRCMD(sc, NCRCMD_FLUSH);
 2664                                 break;
 2665 
 2666                         case 4:
 2667                                 if (sc->sc_features & NCR_F_DMASELECT &&
 2668                                     sc->sc_cmdlen != 0)
 2669                                         printf("(%s:%d:%d): select; "
 2670                                             "%lu left in DMA buffer "
 2671                                             "[intr %x, stat %x, step %d]\n",
 2672                                             device_get_nameunit(sc->sc_dev),
 2673                                             ecb->ccb->ccb_h.target_id,
 2674                                             ecb->ccb->ccb_h.target_lun,
 2675                                             (u_long)sc->sc_cmdlen,
 2676                                             sc->sc_espintr,
 2677                                             sc->sc_espstat,
 2678                                             sc->sc_espstep);
 2679                                 /* So far, everything went fine. */
 2680                                 break;
 2681                         }
 2682 
 2683                         sc->sc_prevphase = INVALID_PHASE;       /* ??? */
 2684                         /* Do an implicit RESTORE POINTERS. */
 2685                         sc->sc_dp = ecb->daddr;
 2686                         sc->sc_dleft = ecb->dleft;
 2687                         sc->sc_state = NCR_CONNECTED;
 2688                         break;
 2689                 } else {
 2690                         device_printf(sc->sc_dev, "unexpected status after "
 2691                             "select: [intr %x, stat %x, step %x]\n",
 2692                             sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
 2693                         NCRCMD(sc, NCRCMD_FLUSH);
 2694                         DELAY(1);
 2695                         goto reset;
 2696                 }
 2697                 if (sc->sc_state == NCR_IDLE) {
 2698                         device_printf(sc->sc_dev, "stray interrupt\n");
 2699                         goto out;
 2700                 }
 2701                 break;
 2702 
 2703         case NCR_CONNECTED:
 2704                 if ((sc->sc_flags & NCR_ICCS) != 0) {
 2705                         /* "Initiate Command Complete Steps" in progress */
 2706                         sc->sc_flags &= ~NCR_ICCS;
 2707 
 2708                         if (!(sc->sc_espintr & NCRINTR_DONE)) {
 2709                                 device_printf(sc->sc_dev, "ICCS: "
 2710                                     ": [intr %x, stat %x, step %x]\n",
 2711                                     sc->sc_espintr, sc->sc_espstat,
 2712                                     sc->sc_espstep);
 2713                         }
 2714                         ncr53c9x_rdfifo(sc, NCR_RDFIFO_START);
 2715                         if (sc->sc_imlen < 2)
 2716                                 device_printf(sc->sc_dev, "can't get status, "
 2717                                     "only %d bytes\n", (int)sc->sc_imlen);
 2718                         ecb->stat = sc->sc_imess[sc->sc_imlen - 2];
 2719                         msg = sc->sc_imess[sc->sc_imlen - 1];
 2720                         NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg));
 2721                         if (msg == MSG_CMDCOMPLETE) {
 2722                                 ecb->dleft =
 2723                                     (ecb->flags & ECB_TENTATIVE_DONE) ?
 2724                                     0 : sc->sc_dleft;
 2725                                 if ((ecb->flags & ECB_SENSE) == 0)
 2726                                         ecb->ccb->csio.resid = ecb->dleft;
 2727                                 sc->sc_state = NCR_CMDCOMPLETE;
 2728                         } else
 2729                                 device_printf(sc->sc_dev, "STATUS_PHASE: "
 2730                                     "msg %d\n", msg);
 2731                         sc->sc_imlen = 0;
 2732                         NCRCMD(sc, NCRCMD_MSGOK);
 2733                         goto shortcut;  /* i.e. wait for disconnect */
 2734                 }
 2735                 break;
 2736 
 2737         default:
 2738                 device_printf(sc->sc_dev, "invalid state: %d [intr %x, "
 2739                     "phase(c %x, p %x)]\n", sc->sc_state,
 2740                     sc->sc_espintr, sc->sc_phase, sc->sc_prevphase);
 2741                 goto reset;
 2742         }
 2743 
 2744         /*
 2745          * Driver is now in state NCR_CONNECTED, i.e. we
 2746          * have a current command working the SCSI bus.
 2747          */
 2748         if (sc->sc_state != NCR_CONNECTED || ecb == NULL) {
 2749                 panic("ncr53c9x: no nexus");
 2750         }
 2751 
 2752         switch (sc->sc_phase) {
 2753         case MESSAGE_OUT_PHASE:
 2754                 NCR_PHASE(("MESSAGE_OUT_PHASE "));
 2755                 ncr53c9x_msgout(sc);
 2756                 sc->sc_prevphase = MESSAGE_OUT_PHASE;
 2757                 break;
 2758 
 2759         case MESSAGE_IN_PHASE:
 2760 msgin:
 2761                 NCR_PHASE(("MESSAGE_IN_PHASE "));
 2762                 if ((sc->sc_espintr & NCRINTR_BS) != 0) {
 2763                         if ((sc->sc_rev != NCR_VARIANT_FAS366) ||
 2764                             !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) {
 2765                                 NCRCMD(sc, NCRCMD_FLUSH);
 2766                         }
 2767                         sc->sc_flags |= NCR_WAITI;
 2768                         NCRCMD(sc, NCRCMD_TRANS);
 2769                 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) {
 2770                         if ((sc->sc_flags & NCR_WAITI) == 0) {
 2771                                 device_printf(sc->sc_dev, "MSGIN: unexpected "
 2772                                     "FC bit: [intr %x, stat %x, step %x]\n",
 2773                                     sc->sc_espintr, sc->sc_espstat,
 2774                                     sc->sc_espstep);
 2775                         }
 2776                         sc->sc_flags &= ~NCR_WAITI;
 2777                         ncr53c9x_rdfifo(sc,
 2778                             (sc->sc_prevphase == sc->sc_phase) ?
 2779                             NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START);
 2780                         ncr53c9x_msgin(sc);
 2781                 } else {
 2782                         device_printf(sc->sc_dev, "MSGIN: weird bits: "
 2783                             "[intr %x, stat %x, step %x]\n",
 2784                             sc->sc_espintr, sc->sc_espstat, sc->sc_espstep);
 2785                 }
 2786                 sc->sc_prevphase = MESSAGE_IN_PHASE;
 2787                 goto shortcut;  /* i.e. expect data to be ready */
 2788 
 2789         case COMMAND_PHASE:
 2790                 /*
 2791                  * Send the command block.  Normally we don't see this
 2792                  * phase because the SEL_ATN command takes care of
 2793                  * all this.  However, we end up here if either the
 2794                  * target or we wanted to exchange some more messages
 2795                  * first (e.g. to start negotiations).
 2796                  */
 2797 
 2798                 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ",
 2799                     ecb->cmd.cmd.opcode, ecb->clen));
 2800                 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) {
 2801                         NCRCMD(sc, NCRCMD_FLUSH);
 2802 /*                      DELAY(1);*/
 2803                 }
 2804                 if (sc->sc_features & NCR_F_DMASELECT) {
 2805                         /* Setup DMA transfer for command. */
 2806                         size = ecb->clen;
 2807                         sc->sc_cmdlen = size;
 2808                         sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd;
 2809                         NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen,
 2810                             0, &size);
 2811                         /* Program the SCSI counter. */
 2812                         NCR_SET_COUNT(sc, size);
 2813 
 2814                         /* Load the count in. */
 2815                         NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
 2816 
 2817                         /* Start the command transfer. */
 2818                         NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA);
 2819                         NCRDMA_GO(sc);
 2820                 } else {
 2821                         ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen);
 2822                         NCRCMD(sc, NCRCMD_TRANS);
 2823                 }
 2824                 sc->sc_prevphase = COMMAND_PHASE;
 2825                 break;
 2826 
 2827         case DATA_OUT_PHASE:
 2828                 NCR_PHASE(("DATA_OUT_PHASE [%ld] ", (long)sc->sc_dleft));
 2829                 NCRCMD(sc, NCRCMD_FLUSH);
 2830                 size = min(sc->sc_dleft, sc->sc_maxxfer);
 2831                 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size);
 2832                 sc->sc_prevphase = DATA_OUT_PHASE;
 2833                 goto setup_xfer;
 2834 
 2835         case DATA_IN_PHASE:
 2836                 NCR_PHASE(("DATA_IN_PHASE "));
 2837                 if (sc->sc_rev == NCR_VARIANT_ESP100)
 2838                         NCRCMD(sc, NCRCMD_FLUSH);
 2839                 size = min(sc->sc_dleft, sc->sc_maxxfer);
 2840                 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size);
 2841                 sc->sc_prevphase = DATA_IN_PHASE;
 2842         setup_xfer:
 2843                 /* Target returned to data phase: wipe "done" memory */
 2844                 ecb->flags &= ~ECB_TENTATIVE_DONE;
 2845 
 2846                 /* Program the SCSI counter. */
 2847                 NCR_SET_COUNT(sc, size);
 2848 
 2849                 /* Load the count in. */
 2850                 NCRCMD(sc, NCRCMD_NOP | NCRCMD_DMA);
 2851 
 2852                 /*
 2853                  * Note that if `size' is 0, we've already transceived
 2854                  * all the bytes we want but we're still in DATA PHASE.
 2855                  * Apparently, the device needs padding.  Also, a
 2856                  * transfer size of 0 means "maximum" to the chip
 2857                  * DMA logic.
 2858                  */
 2859                 NCRCMD(sc,
 2860                     (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA);
 2861                 NCRDMA_GO(sc);
 2862                 goto out;
 2863 
 2864         case STATUS_PHASE:
 2865                 NCR_PHASE(("STATUS_PHASE "));
 2866                 sc->sc_flags |= NCR_ICCS;
 2867                 NCRCMD(sc, NCRCMD_ICCS);
 2868                 sc->sc_prevphase = STATUS_PHASE;
 2869                 goto shortcut;  /* i.e. expect status results soon */
 2870 
 2871         case INVALID_PHASE:
 2872                 break;
 2873 
 2874         default:
 2875                 device_printf(sc->sc_dev,
 2876                     "unexpected bus phase; resetting\n");
 2877                 goto reset;
 2878         }
 2879 
 2880 out:
 2881         mtx_unlock(&sc->sc_lock);
 2882         return;
 2883 
 2884 reset:
 2885         ncr53c9x_init(sc, 1);
 2886         goto out;
 2887 
 2888 finish:
 2889         ncr53c9x_done(sc, ecb);
 2890         goto out;
 2891 
 2892 sched:
 2893         sc->sc_state = NCR_IDLE;
 2894         ncr53c9x_sched(sc);
 2895         goto out;
 2896 
 2897 shortcut:
 2898         /*
 2899          * The idea is that many of the SCSI operations take very little
 2900          * time, and going away and getting interrupted is too high an
 2901          * overhead to pay.  For example, selecting, sending a message
 2902          * and command and then doing some work can be done in one "pass".
 2903          *
 2904          * The delay is a heuristic.  It is 2 when at 20MHz, 2 at 25MHz and 1
 2905          * at 40MHz. This needs testing.
 2906          */
 2907         microtime(&wait);
 2908         wait.tv_usec += 50 / sc->sc_freq;
 2909         if (wait.tv_usec > 1000000) {
 2910                 wait.tv_sec++;
 2911                 wait.tv_usec -= 1000000;
 2912         }
 2913         do {
 2914                 if (NCRDMA_ISINTR(sc))
 2915                         goto again;
 2916                 microtime(&cur);
 2917         } while (cur.tv_sec <= wait.tv_sec && cur.tv_usec <= wait.tv_usec);
 2918         goto out;
 2919 }
 2920 
 2921 static void
 2922 ncr53c9x_abort(struct ncr53c9x_softc *sc, struct ncr53c9x_ecb *ecb)
 2923 {
 2924 
 2925         /* 2 secs for the abort */
 2926         ecb->timeout = NCR_ABORT_TIMEOUT;
 2927         ecb->flags |= ECB_ABORT;
 2928 
 2929         if (ecb == sc->sc_nexus) {
 2930                 /*
 2931                  * If we're still selecting, the message will be scheduled
 2932                  * after selection is complete.
 2933                  */
 2934                 if (sc->sc_state == NCR_CONNECTED)
 2935                         ncr53c9x_sched_msgout(SEND_ABORT);
 2936 
 2937                 /*
 2938                  * Reschedule timeout.
 2939                  */
 2940                 ecb->ccb->ccb_h.timeout_ch =
 2941                     timeout(ncr53c9x_timeout, ecb, mstohz(ecb->timeout));
 2942         } else {
 2943                 /*
 2944                  * Just leave the command where it is.
 2945                  * XXX - what choice do we have but to reset the SCSI
 2946                  *       eventually?
 2947                  */
 2948                 if (sc->sc_state == NCR_IDLE)
 2949                         ncr53c9x_sched(sc);
 2950         }
 2951 }
 2952 
 2953 static void
 2954 ncr53c9x_timeout(void *arg)
 2955 {
 2956         struct ncr53c9x_ecb *ecb = arg;
 2957         union ccb *ccb = ecb->ccb;
 2958         struct ncr53c9x_softc *sc = ecb->sc;
 2959         struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[ccb->ccb_h.target_id];
 2960 
 2961         xpt_print_path(ccb->ccb_h.path);
 2962         device_printf(sc->sc_dev, "timed out [ecb %p (flags 0x%x, dleft %x, "
 2963             "stat %x)], <state %d, nexus %p, phase(l %x, c %x, p %x), "
 2964             "resid %lx, msg(q %x,o %x) %s>",
 2965             ecb, ecb->flags, ecb->dleft, ecb->stat,
 2966             sc->sc_state, sc->sc_nexus,
 2967             NCR_READ_REG(sc, NCR_STAT),
 2968             sc->sc_phase, sc->sc_prevphase,
 2969             (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout,
 2970             NCRDMA_ISACTIVE(sc) ? "DMA active" : "");
 2971 #if NCR53C9X_DEBUG > 1
 2972         printf("TRACE: %s.", ecb->trace);
 2973 #endif
 2974 
 2975         mtx_lock(&sc->sc_lock);
 2976 
 2977         if (ecb->flags & ECB_ABORT) {
 2978                 /* Abort timed out. */
 2979                 printf(" AGAIN\n");
 2980                 ncr53c9x_init(sc, 1);
 2981         } else {
 2982                 /* Abort the operation that has timed out. */
 2983                 printf("\n");
 2984                 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
 2985                 ncr53c9x_abort(sc, ecb);
 2986 
 2987                 /* Disable sync mode if stuck in a data phase. */
 2988                 if (ecb == sc->sc_nexus &&
 2989                     (ti->flags & T_SYNCMODE) != 0 &&
 2990                     (sc->sc_phase & (MSGI|CDI)) == 0) {
 2991                         /* XXX ASYNC CALLBACK! */
 2992                         xpt_print_path(ccb->ccb_h.path);
 2993                         printf("sync negotiation disabled\n");
 2994                         sc->sc_cfflags |=
 2995                             (1 << ((ccb->ccb_h.target_id & 7) + 8));
 2996                 }
 2997         }
 2998 
 2999         mtx_unlock(&sc->sc_lock);
 3000 }
 3001 
 3002 static void
 3003 ncr53c9x_watch(void *arg)
 3004 {
 3005         struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg;
 3006         struct ncr53c9x_linfo *li;
 3007         struct ncr53c9x_tinfo *ti;
 3008         time_t old;
 3009         int t;
 3010 
 3011         /* Delete any structures that have not been used in 10min. */
 3012         old = time_second - (10 * 60);
 3013 
 3014         mtx_lock(&sc->sc_lock);
 3015         for (t = 0; t < sc->sc_ntarg; t++) {
 3016                 ti = &sc->sc_tinfo[t];
 3017                 li = LIST_FIRST(&ti->luns);
 3018                 while (li) {
 3019                         if (li->last_used < old &&
 3020                             li->untagged == NULL &&
 3021                             li->used == 0) {
 3022                                 if (li->lun < NCR_NLUN)
 3023                                         ti->lun[li->lun] = NULL;
 3024                                 LIST_REMOVE(li, link);
 3025                                 free(li, M_DEVBUF);
 3026                                 /* Restart the search at the beginning. */
 3027                                 li = LIST_FIRST(&ti->luns);
 3028                                 continue;
 3029                         }
 3030                         li = LIST_NEXT(li, link);
 3031                 }
 3032         }
 3033         mtx_unlock(&sc->sc_lock);
 3034         callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc);
 3035 }

Cache object: a3739688996aad483ebd93ddd3c543e1


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.