The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/etherswitch/arswitch/arswitch_8316.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2011-2012 Stefan Bethke.
    5  * Copyright (c) 2012 Adrian Chadd.
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD$
   30  */
   31 
   32 #include <sys/param.h>
   33 #include <sys/bus.h>
   34 #include <sys/errno.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <sys/socket.h>
   38 #include <sys/sockio.h>
   39 #include <sys/sysctl.h>
   40 #include <sys/systm.h>
   41 
   42 #include <net/if.h>
   43 #include <net/if_arp.h>
   44 #include <net/ethernet.h>
   45 #include <net/if_dl.h>
   46 #include <net/if_media.h>
   47 #include <net/if_types.h>
   48 
   49 #include <machine/bus.h>
   50 #include <dev/iicbus/iic.h>
   51 #include <dev/iicbus/iiconf.h>
   52 #include <dev/iicbus/iicbus.h>
   53 #include <dev/mii/mii.h>
   54 #include <dev/mii/miivar.h>
   55 #include <dev/mdio/mdio.h>
   56 
   57 #include <dev/etherswitch/etherswitch.h>
   58 
   59 #include <dev/etherswitch/arswitch/arswitchreg.h>
   60 #include <dev/etherswitch/arswitch/arswitchvar.h>
   61 #include <dev/etherswitch/arswitch/arswitch_reg.h>
   62 #include <dev/etherswitch/arswitch/arswitch_8316.h>
   63 
   64 #include "mdio_if.h"
   65 #include "miibus_if.h"
   66 #include "etherswitch_if.h"
   67 
   68 /*
   69  * AR8316 specific functions
   70  */
   71 static int
   72 ar8316_hw_setup(struct arswitch_softc *sc)
   73 {
   74 
   75         /*
   76          * Configure the switch mode based on whether:
   77          *
   78          * + The switch port is GMII/RGMII;
   79          * + Port 4 is either connected to the CPU or to the internal switch.
   80          */
   81         if (sc->is_rgmii && sc->phy4cpu) {
   82                 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
   83                     AR8X16_MODE_RGMII_PORT4_ISO);
   84                 device_printf(sc->sc_dev,
   85                     "%s: MAC port == RGMII, port 4 = dedicated PHY\n",
   86                     __func__);
   87         } else if (sc->is_rgmii) {
   88                 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
   89                     AR8X16_MODE_RGMII_PORT4_SWITCH);
   90                 device_printf(sc->sc_dev,
   91                     "%s: MAC port == RGMII, port 4 = switch port\n",
   92                     __func__);
   93         } else if (sc->is_gmii) {
   94                 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
   95                     AR8X16_MODE_GMII);
   96                 device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__);
   97         } else {
   98                 device_printf(sc->sc_dev, "%s: unknown switch PHY config\n",
   99                     __func__);
  100                 return (ENXIO);
  101         }
  102 
  103         DELAY(1000);    /* 1ms wait for things to settle */
  104 
  105         /*
  106          * If port 4 is RGMII, force workaround
  107          */
  108         if (sc->is_rgmii && sc->phy4cpu) {
  109                 device_printf(sc->sc_dev,
  110                     "%s: port 4 RGMII workaround\n",
  111                     __func__);
  112 
  113                 /* work around for phy4 rgmii mode */
  114                 arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c);
  115                 /* rx delay */
  116                 arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e);
  117                 /* tx delay */
  118                 arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47);
  119                 DELAY(1000);    /* 1ms, again to let things settle */
  120         }
  121 
  122         return (0);
  123 }
  124 
  125 /*
  126  * Initialise other global values, for the AR8316.
  127  */
  128 static int
  129 ar8316_hw_global_setup(struct arswitch_softc *sc)
  130 {
  131 
  132         ARSWITCH_LOCK(sc);
  133 
  134         arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC);
  135 
  136         /* Enable CPU port and disable mirror port. */
  137         arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
  138             AR8X16_CPU_PORT_EN | AR8X16_CPU_MIRROR_DIS);
  139 
  140         /* Setup TAG priority mapping. */
  141         arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
  142 
  143         /*
  144          * Flood address table misses to all ports, and enable forwarding of
  145          * broadcasts to the cpu port.
  146          */
  147         arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
  148             AR8X16_FLOOD_MASK_BCAST_TO_CPU | 0x003f003f);
  149 
  150         /* Enable jumbo frames. */
  151         arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
  152             AR8316_GLOBAL_CTRL_MTU_MASK, 9018 + 8 + 2);
  153 
  154         /* Setup service TAG. */
  155         arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
  156             AR8X16_SERVICE_TAG_MASK, 0);
  157 
  158         ARSWITCH_UNLOCK(sc);
  159         return (0);
  160 }
  161 
  162 void
  163 ar8316_attach(struct arswitch_softc *sc)
  164 {
  165 
  166         sc->hal.arswitch_hw_setup = ar8316_hw_setup;
  167         sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup;
  168 
  169         /* Set the switch vlan capabilities. */
  170         sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
  171             ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOUBLE_TAG;
  172         sc->info.es_nvlangroups = AR8X16_MAX_VLANS;
  173 }

Cache object: 17fbdca417a4aea3e5e4c768fce09fb3


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