arswitch_phy.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2011-2012 Stefan Bethke.
    5  * Copyright (c) 2012 Adrian Chadd.
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * $FreeBSD$
   30  */
   31 
   32 #include <sys/param.h>
   33 #include <sys/bus.h>
   34 #include <sys/errno.h>
   35 #include <sys/kernel.h>
   36 #include <sys/lock.h>
   37 #include <sys/module.h>
   38 #include <sys/mutex.h>
   39 #include <sys/socket.h>
   40 #include <sys/sockio.h>
   41 #include <sys/sysctl.h>
   42 #include <sys/systm.h>
   43 
   44 #include <net/if.h>
   45 #include <net/if_media.h>
   46 
   47 #include <machine/bus.h>
   48 #include <dev/iicbus/iic.h>
   49 #include <dev/iicbus/iiconf.h>
   50 #include <dev/iicbus/iicbus.h>
   51 #include <dev/mii/mii.h>
   52 #include <dev/mii/miivar.h>
   53 #include <dev/mdio/mdio.h>
   54 
   55 #include <dev/etherswitch/etherswitch.h>
   56 
   57 #include <dev/etherswitch/arswitch/arswitchreg.h>
   58 #include <dev/etherswitch/arswitch/arswitchvar.h>
   59 
   60 #include <dev/etherswitch/arswitch/arswitch_reg.h>
   61 #include <dev/etherswitch/arswitch/arswitch_phy.h>
   62 
   63 #include "mdio_if.h"
   64 #include "miibus_if.h"
   65 #include "etherswitch_if.h"
   66 
   67 /*
   68  * Access PHYs integrated into the switch by going direct
   69  * to the PHY space itself, rather than through the switch
   70  * MDIO register.
   71  */
   72 int
   73 arswitch_readphy_external(device_t dev, int phy, int reg)
   74 {
   75         int ret;
   76         struct arswitch_softc *sc;
   77 
   78         sc = device_get_softc(dev);
   79 
   80         ARSWITCH_LOCK(sc);
   81         ret = (MDIO_READREG(device_get_parent(dev), phy, reg));
   82         DPRINTF(sc, ARSWITCH_DBG_PHYIO,
   83             "%s: phy=0x%08x, reg=0x%08x, ret=0x%08x\n",
   84             __func__, phy, reg, ret);
   85         ARSWITCH_UNLOCK(sc);
   86 
   87         return (ret);
   88 }
   89 
   90 int
   91 arswitch_writephy_external(device_t dev, int phy, int reg, int data)
   92 {
   93         struct arswitch_softc *sc;
   94 
   95         sc = device_get_softc(dev);
   96 
   97         ARSWITCH_LOCK(sc);
   98         (void) MDIO_WRITEREG(device_get_parent(dev), phy,
   99             reg, data);
  100         DPRINTF(sc, ARSWITCH_DBG_PHYIO,
  101             "%s: phy=0x%08x, reg=0x%08x, data=0x%08x\n",
  102             __func__, phy, reg, data);
  103         ARSWITCH_UNLOCK(sc);
  104 
  105         return (0);
  106 }
  107 
  108 /*
  109  * Access PHYs integrated into the switch chip through the switch's MDIO
  110  * control register.
  111  */
  112 int
  113 arswitch_readphy_internal(device_t dev, int phy, int reg)
  114 {
  115         struct arswitch_softc *sc;
  116         uint32_t data = 0, ctrl;
  117         int err, timeout;
  118         uint32_t a;
  119 
  120         sc = device_get_softc(dev);
  121         ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
  122 
  123         if (phy < 0 || phy >= 32)
  124                 return (ENXIO);
  125         if (reg < 0 || reg >= 32)
  126                 return (ENXIO);
  127 
  128         if (AR8X16_IS_SWITCH(sc, AR8327))
  129                 a = AR8327_REG_MDIO_CTRL;
  130         else
  131                 a = AR8X16_REG_MDIO_CTRL;
  132 
  133         ARSWITCH_LOCK(sc);
  134         err = arswitch_writereg_msb(dev, a,
  135             AR8X16_MDIO_CTRL_BUSY | AR8X16_MDIO_CTRL_MASTER_EN |
  136             AR8X16_MDIO_CTRL_CMD_READ |
  137             (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
  138             (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT));
  139         DEVERR(dev, err, "arswitch_readphy()=%d: phy=%d.%02x\n", phy, reg);
  140         if (err != 0)
  141                 goto fail;
  142         for (timeout = 100; timeout--; ) {
  143                 ctrl = arswitch_readreg_msb(dev, a);
  144                 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
  145                         break;
  146         }
  147         if (timeout < 0) {
  148                 DPRINTF(sc, ARSWITCH_DBG_ANY,
  149                     "arswitch_readphy(): phy=%d.%02x; timeout=%d\n",
  150                     phy, reg, timeout);
  151                 goto fail;
  152         }
  153         data = arswitch_readreg_lsb(dev, a) &
  154             AR8X16_MDIO_CTRL_DATA_MASK;
  155         ARSWITCH_UNLOCK(sc);
  156 
  157         DPRINTF(sc, ARSWITCH_DBG_PHYIO,
  158             "%s: phy=0x%08x, reg=0x%08x, ret=0x%08x\n",
  159             __func__, phy, reg, data);
  160 
  161         return (data);
  162 
  163 fail:
  164         ARSWITCH_UNLOCK(sc);
  165 
  166         DPRINTF(sc, ARSWITCH_DBG_PHYIO,
  167             "%s: phy=0x%08x, reg=0x%08x, fail; err=%d\n",
  168             __func__, phy, reg, err);
  169 
  170         return (-1);
  171 }
  172 
  173 int
  174 arswitch_writephy_internal(device_t dev, int phy, int reg, int data)
  175 {
  176         struct arswitch_softc *sc;
  177         uint32_t ctrl;
  178         int err, timeout;
  179         uint32_t a;
  180 
  181         sc = device_get_softc(dev);
  182         ARSWITCH_LOCK_ASSERT(sc, MA_NOTOWNED);
  183 
  184         if (reg < 0 || reg >= 32)
  185                 return (ENXIO);
  186 
  187         if (AR8X16_IS_SWITCH(sc, AR8327))
  188                 a = AR8327_REG_MDIO_CTRL;
  189         else
  190                 a = AR8X16_REG_MDIO_CTRL;
  191 
  192         ARSWITCH_LOCK(sc);
  193         err = arswitch_writereg(dev, a,
  194             AR8X16_MDIO_CTRL_BUSY |
  195             AR8X16_MDIO_CTRL_MASTER_EN |
  196             AR8X16_MDIO_CTRL_CMD_WRITE |
  197             (phy << AR8X16_MDIO_CTRL_PHY_ADDR_SHIFT) |
  198             (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) |
  199             (data & AR8X16_MDIO_CTRL_DATA_MASK));
  200         if (err != 0)
  201                 goto out;
  202         for (timeout = 100; timeout--; ) {
  203                 ctrl = arswitch_readreg(dev, a);
  204                 if ((ctrl & AR8X16_MDIO_CTRL_BUSY) == 0)
  205                         break;
  206         }
  207         if (timeout < 0)
  208                 err = EIO;
  209 
  210         DPRINTF(sc, ARSWITCH_DBG_PHYIO,
  211             "%s: phy=0x%08x, reg=0x%08x, data=0x%08x, err=%d\n",
  212             __func__, phy, reg, data, err);
  213 
  214 out:
  215         DEVERR(dev, err, "arswitch_writephy()=%d: phy=%d.%02x\n", phy, reg);
  216         ARSWITCH_UNLOCK(sc);
  217         return (err);
  218 }

Cache object: 9a6df2d69052c825bb5b5deee1bb23ca

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FreeBSD/Linux Kernel Cross Reference sys/dev/etherswitch/arswitch/arswitch_phy.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/etherswitch/arswitch/arswitch_phy.c