1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2021 Alstom Group.
5 * Copyright (c) 2021 Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #ifndef _FELIX_VAR_H_
30 #define _FELIX_VAR_H_
31
32 #define FELIX_INIT_TIMEOUT 5000 /* msec */
33
34 #define FELIX_DEV_NAME "Felix TSN Switch driver"
35 #define FELIX_MAX_PORTS 6
36 #define FELIX_NUM_VLANS 4096
37
38 #define PCI_VENDOR_FREESCALE 0x1957
39 #define FELIX_DEV_ID 0xEEF0
40
41 #define FELIX_BAR_MDIO 0
42 #define FELIX_BAR_REGS 4
43
44 #define FELIX_LOCK(_sc) mtx_lock(&(_sc)->mtx)
45 #define FELIX_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
46 #define FELIX_LOCK_ASSERT(_sc, _what) mtx_assert(&(_sc)->mtx, (_what))
47
48 #define FELIX_RD4(sc, reg) bus_read_4((sc)->regs, reg)
49 #define FELIX_WR4(sc, reg, value) bus_write_4((sc)->regs, reg, value)
50
51 #define FELIX_DEVGMII_PORT_RD4(sc, port, reg) \
52 FELIX_RD4(sc, \
53 FELIX_DEVGMII_BASE + (FELIX_DEVGMII_PORT_OFFSET * (port)) + reg)
54 #define FELIX_DEVGMII_PORT_WR4(sc, port, reg, value) \
55 FELIX_WR4(sc, \
56 FELIX_DEVGMII_BASE + (FELIX_DEVGMII_PORT_OFFSET * (port)) + reg, \
57 value)
58
59 #define FELIX_ANA_PORT_RD4(sc, port, reg) \
60 FELIX_RD4(sc, \
61 FELIX_ANA_PORT_BASE + (FELIX_ANA_PORT_OFFSET * (port)) + reg)
62 #define FELIX_ANA_PORT_WR4(sc, port, reg, value) \
63 FELIX_WR4(sc, \
64 FELIX_ANA_PORT_BASE + (FELIX_ANA_PORT_OFFSET * (port)) + reg, \
65 value)
66
67 #define FELIX_REW_PORT_RD4(sc, port, reg) \
68 FELIX_RD4(sc, \
69 FELIX_REW_PORT_BASE + (FELIX_REW_PORT_OFFSET * (port)) + reg)
70 #define FELIX_REW_PORT_WR4(sc, port, reg, value) \
71 FELIX_WR4(sc, \
72 FELIX_REW_PORT_BASE + (FELIX_REW_PORT_OFFSET * (port)) + reg, \
73 value)
74
75 struct felix_pci_id {
76 uint16_t vendor;
77 uint16_t device;
78 const char *desc;
79 };
80
81 struct felix_port {
82 if_t ifp;
83 device_t miibus;
84 char *ifname;
85
86 uint32_t phyaddr;
87
88 int fixed_link_status;
89 bool fixed_port;
90 bool cpu_port;
91 };
92
93 typedef struct felix_softc {
94 device_t dev;
95 struct resource *regs;
96 struct resource *mdio;
97
98 etherswitch_info_t info;
99 struct callout tick_callout;
100 struct mtx mtx;
101 struct felix_port ports[FELIX_MAX_PORTS];
102
103 int vlan_mode;
104 int vlans[FELIX_NUM_VLANS];
105
106 uint32_t timer_ticks;
107 } *felix_softc_t;
108
109 #endif
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