The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/etherswitch/ip17x/ip175c.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 2013 Luiz Otavio O Souza.
    5  * Copyright (c) 2011-2012 Stefan Bethke.
    6  * Copyright (c) 2012 Adrian Chadd.
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD$
   31  */
   32 
   33 #include <sys/param.h>
   34 #include <sys/bus.h>
   35 #include <sys/kernel.h>
   36 #include <sys/lock.h>
   37 #include <sys/mutex.h>
   38 #include <sys/systm.h>
   39 #include <sys/socket.h>
   40 
   41 #include <net/if.h>
   42 
   43 #include <dev/mii/mii.h>
   44 
   45 #include <dev/etherswitch/etherswitch.h>
   46 #include <dev/etherswitch/ip17x/ip17x_phy.h>
   47 #include <dev/etherswitch/ip17x/ip17x_reg.h>
   48 #include <dev/etherswitch/ip17x/ip17x_var.h>
   49 #include <dev/etherswitch/ip17x/ip17x_vlans.h>
   50 #include <dev/etherswitch/ip17x/ip175c.h>
   51 
   52 /*
   53  * IP175C specific functions.
   54  */
   55 
   56 /*
   57  * Reset the switch.
   58  */
   59 static int
   60 ip175c_reset(struct ip17x_softc *sc)
   61 {
   62         uint32_t data;
   63 
   64         /* Reset all the switch settings. */
   65         if (ip17x_writephy(sc->sc_dev, IP175C_RESET_PHY, IP175C_RESET_REG,
   66             0x175c))
   67                 return (-1);
   68         DELAY(2000);
   69 
   70         /* Force IP175C mode. */
   71         data = ip17x_readphy(sc->sc_dev, IP175C_MODE_PHY, IP175C_MODE_REG);
   72         if (data == 0x175a) {
   73                 if (ip17x_writephy(sc->sc_dev, IP175C_MODE_PHY, IP175C_MODE_REG,
   74                     0x175c))
   75                 return (-1);
   76         }
   77 
   78         return (0);
   79 }
   80 
   81 static int
   82 ip175c_port_vlan_setup(struct ip17x_softc *sc)
   83 {
   84         struct ip17x_vlan *v;
   85         uint32_t ports[IP175X_NUM_PORTS], reg[IP175X_NUM_PORTS/2];
   86         int i, err, phy;
   87 
   88         KASSERT(sc->cpuport == 5, ("cpuport != 5 not supported for IP175C"));
   89         KASSERT(sc->numports == 6, ("numports != 6 not supported for IP175C"));
   90 
   91         /* Build the port access masks. */
   92         memset(ports, 0, sizeof(ports));
   93         for (i = 0; i < sc->info.es_nports; i++) {
   94                 phy = sc->portphy[i];
   95                 v = &sc->vlan[i];
   96                 ports[phy] = v->ports;
   97         }
   98 
   99         /* Move the cpuport bit to its correct place. */
  100         for (i = 0; i < sc->numports; i++) {
  101                 if (ports[i] & (1 << sc->cpuport)) {
  102                         ports[i] |= (1 << 7);
  103                         ports[i] &= ~(1 << sc->cpuport);
  104                 }
  105         }
  106 
  107         /* And now build the switch register data. */
  108         memset(reg, 0, sizeof(reg));
  109         for (i = 0; i < (sc->numports / 2); i++)
  110                 reg[i] = ports[i * 2] << 8 | ports[i * 2 + 1];
  111 
  112         /* Update the switch resgisters. */
  113         err = ip17x_writephy(sc->sc_dev, 29, 19, reg[0]);
  114         if (err == 0)
  115                 err = ip17x_writephy(sc->sc_dev, 29, 20, reg[1]);
  116         if (err == 0)
  117                 err = ip17x_updatephy(sc->sc_dev, 29, 21, 0xff00, reg[2]);
  118         if (err == 0)
  119                 err = ip17x_updatephy(sc->sc_dev, 30, 18, 0x00ff, reg[2]);
  120         return (err);
  121 }
  122 
  123 static int
  124 ip175c_dot1q_vlan_setup(struct ip17x_softc *sc)
  125 {
  126         struct ip17x_vlan *v;
  127         uint32_t data;
  128         uint32_t vlans[IP17X_MAX_VLANS];
  129         int i, j;
  130 
  131         KASSERT(sc->cpuport == 5, ("cpuport != 5 not supported for IP175C"));
  132         KASSERT(sc->numports == 6, ("numports != 6 not supported for IP175C"));
  133 
  134         /* Add and strip VLAN tags. */
  135         data = (sc->addtag & ~(1 << IP175X_CPU_PORT)) << 11;
  136         data |= (sc->striptag & ~(1 << IP175X_CPU_PORT)) << 6;
  137         if (sc->addtag & (1 << IP175X_CPU_PORT))
  138                 data |= (1 << 1);
  139         if (sc->striptag & (1 << IP175X_CPU_PORT))
  140                 data |= (1 << 0);
  141         if (ip17x_writephy(sc->sc_dev, 29, 23, data))
  142                 return (-1);
  143 
  144         /* Set the VID_IDX_SEL to 0. */
  145         if (ip17x_updatephy(sc->sc_dev, 30, 9, 0x70, 0))
  146                 return (-1);
  147 
  148         /* Calculate the port masks. */
  149         memset(vlans, 0, sizeof(vlans));
  150         for (i = 0; i < IP17X_MAX_VLANS; i++) {
  151                 v = &sc->vlan[i];
  152                 if ((v->vlanid & ETHERSWITCH_VID_VALID) == 0)
  153                         continue;
  154                 vlans[v->vlanid & ETHERSWITCH_VID_MASK] = v->ports;
  155         }
  156 
  157         for (j = 0, i = 1; i <= IP17X_MAX_VLANS / 2; i++) {
  158                 data = vlans[j++] & 0x3f;
  159                 data |= (vlans[j++] & 0x3f) << 8;
  160                 if (ip17x_writephy(sc->sc_dev, 30, i, data))
  161                         return (-1);
  162         }
  163 
  164         /* Port default VLAN ID. */
  165         for (i = 0; i < sc->numports; i++) {
  166                 if (i == IP175X_CPU_PORT) {
  167                         if (ip17x_writephy(sc->sc_dev, 29, 30, sc->pvid[i]))
  168                                 return (-1);
  169                 } else {
  170                         if (ip17x_writephy(sc->sc_dev, 29, 24 + i, sc->pvid[i]))
  171                                 return (-1);
  172                 }
  173         }
  174 
  175         return (0);
  176 }
  177 
  178 /*
  179  * Set the Switch configuration.
  180  */
  181 static int
  182 ip175c_hw_setup(struct ip17x_softc *sc)
  183 {
  184 
  185         switch (sc->vlan_mode) {
  186         case ETHERSWITCH_VLAN_PORT:
  187                 return (ip175c_port_vlan_setup(sc));
  188                 break;
  189         case ETHERSWITCH_VLAN_DOT1Q:
  190                 return (ip175c_dot1q_vlan_setup(sc));
  191                 break;
  192         }
  193         return (-1);
  194 }
  195 
  196 /*
  197  * Set the switch VLAN mode.
  198  */
  199 static int
  200 ip175c_set_vlan_mode(struct ip17x_softc *sc, uint32_t mode)
  201 {
  202 
  203         switch (mode) {
  204         case ETHERSWITCH_VLAN_DOT1Q:
  205                 /* Enable VLAN tag processing. */
  206                 ip17x_updatephy(sc->sc_dev, 30, 9, 0x80, 0x80);
  207                 sc->vlan_mode = mode;
  208                 break;
  209         case ETHERSWITCH_VLAN_PORT:
  210         default:
  211                 /* Disable VLAN tag processing. */
  212                 ip17x_updatephy(sc->sc_dev, 30, 9, 0x80, 0);
  213                 sc->vlan_mode = ETHERSWITCH_VLAN_PORT;
  214                 break;
  215         }
  216 
  217         /* Reset vlans. */
  218         ip17x_reset_vlans(sc, sc->vlan_mode);
  219 
  220         /* Update switch configuration. */
  221         ip175c_hw_setup(sc);
  222 
  223         return (0);
  224 }
  225 
  226 /*
  227  * Get the switch VLAN mode.
  228  */
  229 static int
  230 ip175c_get_vlan_mode(struct ip17x_softc *sc)
  231 {
  232 
  233         return (sc->vlan_mode);
  234 }
  235 
  236 void
  237 ip175c_attach(struct ip17x_softc *sc)
  238 {
  239         uint32_t data;
  240 
  241         data = ip17x_readphy(sc->sc_dev, IP175C_MII_PHY, IP175C_MII_CTL_REG);
  242         device_printf(sc->sc_dev, "MII: %x\n", data);
  243         /* check mii1 interface if disabled then phy4 and mac4 hold on switch */
  244         if((data & (1 << IP175C_MII_MII1_RMII_EN)) == 0)
  245                 sc->phymask |= 0x10;
  246 
  247         sc->hal.ip17x_reset = ip175c_reset;
  248         sc->hal.ip17x_hw_setup = ip175c_hw_setup;
  249         sc->hal.ip17x_get_vlan_mode = ip175c_get_vlan_mode;
  250         sc->hal.ip17x_set_vlan_mode = ip175c_set_vlan_mode;
  251 
  252         /* Defaults for IP175C. */
  253         sc->cpuport = IP175X_CPU_PORT;
  254         sc->numports = IP175X_NUM_PORTS;
  255         sc->info.es_vlan_caps = ETHERSWITCH_VLAN_PORT | ETHERSWITCH_VLAN_DOT1Q;
  256 
  257         device_printf(sc->sc_dev, "type: IP175C\n");
  258 }

Cache object: e4281721125fc41ed9a6cd549cc14d67


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