Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/ex/if_ex.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /* 2 * Copyright (c) 1996, Javier Martín Rueda (jmrueda@diatel.upm.es) 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 * MAINTAINER: Matthew N. Dodd <winter@jurai.net> 30 * <mdodd@FreeBSD.org> 31 */ 32 33 /* 34 * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver 35 * 36 * Revision history: 37 * 38 * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast. 39 */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/kernel.h> 44 #include <sys/sockio.h> 45 #include <sys/mbuf.h> 46 #include <sys/socket.h> 47 48 #include <sys/module.h> 49 #include <sys/bus.h> 50 51 #include <machine/bus.h> 52 #include <machine/resource.h> 53 #include <sys/rman.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_media.h> 58 #include <net/ethernet.h> 59 #include <net/bpf.h> 60 61 #include <netinet/in.h> 62 #include <netinet/if_ether.h> 63 64 65 #include <isa/isavar.h> 66 #include <isa/pnpvar.h> 67 68 #include <dev/ex/if_exreg.h> 69 #include <dev/ex/if_exvar.h> 70 71 #ifdef EXDEBUG 72 # define Start_End 1 73 # define Rcvd_Pkts 2 74 # define Sent_Pkts 4 75 # define Status 8 76 static int debug_mask = 0; 77 static int exintr_count = 0; 78 # define DODEBUG(level, action) if (level & debug_mask) action 79 #else 80 # define DODEBUG(level, action) 81 #endif 82 83 char irq2eemap[] = 84 { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1, -1, -1 }; 85 u_char ee2irqmap[] = 86 { 9, 3, 5, 10, 11, 0, 0, 0 }; 87 88 char plus_irq2eemap[] = 89 { -1, -1, -1, 0, 1, 2, -1, 3, -1, 4, 5, 6, 7, -1, -1, -1 }; 90 u_char plus_ee2irqmap[] = 91 { 3, 4, 5, 7, 9, 10, 11, 12 }; 92 93 /* Network Interface Functions */ 94 static void ex_init __P((void *)); 95 static void ex_start __P((struct ifnet *)); 96 static int ex_ioctl __P((struct ifnet *, u_long, caddr_t)); 97 static void ex_watchdog __P((struct ifnet *)); 98 99 /* ifmedia Functions */ 100 static int ex_ifmedia_upd __P((struct ifnet *)); 101 static void ex_ifmedia_sts __P((struct ifnet *, struct ifmediareq *)); 102 103 static int ex_get_media __P((u_int32_t iobase)); 104 105 static void ex_reset __P((struct ex_softc *)); 106 107 static void ex_tx_intr __P((struct ex_softc *)); 108 static void ex_rx_intr __P((struct ex_softc *)); 109 110 int 111 look_for_card (u_int32_t iobase) 112 { 113 int count1, count2; 114 115 /* 116 * Check for the i82595 signature, and check that the round robin 117 * counter actually advances. 118 */ 119 if (((count1 = inb(iobase + ID_REG)) & Id_Mask) != Id_Sig) 120 return(0); 121 count2 = inb(iobase + ID_REG); 122 count2 = inb(iobase + ID_REG); 123 count2 = inb(iobase + ID_REG); 124 125 return((count2 & Counter_bits) == ((count1 + 0xc0) & Counter_bits)); 126 } 127 128 void 129 ex_get_address (u_int32_t iobase, u_char *enaddr) 130 { 131 u_int16_t eaddr_tmp; 132 133 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Lo); 134 enaddr[5] = eaddr_tmp & 0xff; 135 enaddr[4] = eaddr_tmp >> 8; 136 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Mid); 137 enaddr[3] = eaddr_tmp & 0xff; 138 enaddr[2] = eaddr_tmp >> 8; 139 eaddr_tmp = eeprom_read(iobase, EE_Eth_Addr_Hi); 140 enaddr[1] = eaddr_tmp & 0xff; 141 enaddr[0] = eaddr_tmp >> 8; 142 143 return; 144 } 145 146 int 147 ex_card_type (u_char *enaddr) 148 { 149 if ((enaddr[0] == 0x00) && (enaddr[1] == 0xA0) && (enaddr[2] == 0xC9)) 150 return (CARD_TYPE_EX_10_PLUS); 151 152 return (CARD_TYPE_EX_10); 153 } 154 155 /* 156 * Caller is responsible for eventually calling 157 * ex_release_resources() on failure. 158 */ 159 int 160 ex_alloc_resources (device_t dev) 161 { 162 struct ex_softc * sc = device_get_softc(dev); 163 int error = 0; 164 165 sc->ioport = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->ioport_rid, 166 0, ~0, 1, RF_ACTIVE); 167 if (!sc->ioport) { 168 device_printf(dev, "No I/O space?!\n"); 169 error = ENOMEM; 170 goto bad; 171 } 172 173 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 174 0, ~0, 1, RF_ACTIVE); 175 176 if (!sc->irq) { 177 device_printf(dev, "No IRQ?!\n"); 178 error = ENOMEM; 179 goto bad; 180 } 181 182 bad: 183 return (error); 184 } 185 186 void 187 ex_release_resources (device_t dev) 188 { 189 struct ex_softc * sc = device_get_softc(dev); 190 191 if (sc->ih) { 192 bus_teardown_intr(dev, sc->irq, sc->ih); 193 sc->ih = NULL; 194 } 195 196 if (sc->ioport) { 197 bus_release_resource(dev, SYS_RES_IOPORT, 198 sc->ioport_rid, sc->ioport); 199 sc->ioport = NULL; 200 } 201 202 if (sc->irq) { 203 bus_release_resource(dev, SYS_RES_IRQ, 204 sc->irq_rid, sc->irq); 205 sc->irq = NULL; 206 } 207 208 return; 209 } 210 211 int 212 ex_attach(device_t dev) 213 { 214 struct ex_softc * sc = device_get_softc(dev); 215 struct ifnet * ifp = &sc->arpcom.ac_if; 216 struct ifmedia * ifm; 217 int unit = device_get_unit(dev); 218 u_int16_t temp; 219 220 /* work out which set of irq <-> internal tables to use */ 221 if (ex_card_type(sc->arpcom.ac_enaddr) == CARD_TYPE_EX_10_PLUS) { 222 sc->irq2ee = plus_irq2eemap; 223 sc->ee2irq = plus_ee2irqmap; 224 } else { 225 sc->irq2ee = irq2eemap; 226 sc->ee2irq = ee2irqmap; 227 } 228 229 sc->mem_size = CARD_RAM_SIZE; /* XXX This should be read from the card itself. */ 230 231 /* 232 * Initialize the ifnet structure. 233 */ 234 ifp->if_softc = sc; 235 ifp->if_unit = unit; 236 ifp->if_name = "ex"; 237 ifp->if_mtu = ETHERMTU; 238 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST /* XXX not done yet. | IFF_MULTICAST */; 239 ifp->if_output = ether_output; 240 ifp->if_start = ex_start; 241 ifp->if_ioctl = ex_ioctl; 242 ifp->if_watchdog = ex_watchdog; 243 ifp->if_init = ex_init; 244 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN; 245 246 ifmedia_init(&sc->ifmedia, 0, ex_ifmedia_upd, ex_ifmedia_sts); 247 248 temp = eeprom_read(sc->iobase, EE_W5); 249 if (temp & EE_W5_PORT_TPE) 250 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); 251 if (temp & EE_W5_PORT_BNC) 252 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_2, 0, NULL); 253 if (temp & EE_W5_PORT_AUI) 254 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_5, 0, NULL); 255 256 ifmedia_set(&sc->ifmedia, ex_get_media(sc->iobase)); 257 258 ifm = &sc->ifmedia; 259 ifm->ifm_media = ifm->ifm_cur->ifm_media; 260 ex_ifmedia_upd(ifp); 261 262 /* 263 * Attach the interface. 264 */ 265 ether_ifattach(ifp, ETHER_BPF_SUPPORTED); 266 267 device_printf(sc->dev, "Ethernet address %6D\n", 268 sc->arpcom.ac_enaddr, ":"); 269 270 return(0); 271 } 272 273 static void 274 ex_init(void *xsc) 275 { 276 struct ex_softc * sc = (struct ex_softc *) xsc; 277 struct ifnet * ifp = &sc->arpcom.ac_if; 278 int s; 279 int i; 280 register int iobase = sc->iobase; 281 unsigned short temp_reg; 282 283 DODEBUG(Start_End, printf("ex_init%d: start\n", ifp->if_unit);); 284 285 if (TAILQ_FIRST(&ifp->if_addrhead) == NULL) { 286 return; 287 } 288 s = splimp(); 289 ifp->if_timer = 0; 290 291 /* 292 * Load the ethernet address into the card. 293 */ 294 outb(iobase + CMD_REG, Bank2_Sel); 295 temp_reg = inb(iobase + EEPROM_REG); 296 if (temp_reg & Trnoff_Enable) { 297 outb(iobase + EEPROM_REG, temp_reg & ~Trnoff_Enable); 298 } 299 for (i = 0; i < ETHER_ADDR_LEN; i++) { 300 outb(iobase + I_ADDR_REG0 + i, sc->arpcom.ac_enaddr[i]); 301 } 302 /* 303 * - Setup transmit chaining and discard bad received frames. 304 * - Match broadcast. 305 * - Clear test mode. 306 * - Set receiving mode. 307 * - Set IRQ number. 308 */ 309 outb(iobase + REG1, inb(iobase + REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr); 310 outb(iobase + REG2, inb(iobase + REG2) | No_SA_Ins | RX_CRC_InMem); 311 outb(iobase + REG3, inb(iobase + REG3) & 0x3f /* XXX constants. */ ); 312 outb(iobase + CMD_REG, Bank1_Sel); 313 outb(iobase + INT_NO_REG, (inb(iobase + INT_NO_REG) & 0xf8) | sc->irq2ee[sc->irq_no]); 314 315 /* 316 * Divide the available memory in the card into rcv and xmt buffers. 317 * By default, I use the first 3/4 of the memory for the rcv buffer, 318 * and the remaining 1/4 of the memory for the xmt buffer. 319 */ 320 sc->rx_mem_size = sc->mem_size * 3 / 4; 321 sc->tx_mem_size = sc->mem_size - sc->rx_mem_size; 322 sc->rx_lower_limit = 0x0000; 323 sc->rx_upper_limit = sc->rx_mem_size - 2; 324 sc->tx_lower_limit = sc->rx_mem_size; 325 sc->tx_upper_limit = sc->mem_size - 2; 326 outb(iobase + RCV_LOWER_LIMIT_REG, sc->rx_lower_limit >> 8); 327 outb(iobase + RCV_UPPER_LIMIT_REG, sc->rx_upper_limit >> 8); 328 outb(iobase + XMT_LOWER_LIMIT_REG, sc->tx_lower_limit >> 8); 329 outb(iobase + XMT_UPPER_LIMIT_REG, sc->tx_upper_limit >> 8); 330 331 /* 332 * Enable receive and transmit interrupts, and clear any pending int. 333 */ 334 outb(iobase + REG1, inb(iobase + REG1) | TriST_INT); 335 outb(iobase + CMD_REG, Bank0_Sel); 336 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int)); 337 outb(iobase + STATUS_REG, All_Int); 338 339 /* 340 * Initialize receive and transmit ring buffers. 341 */ 342 outw(iobase + RCV_BAR, sc->rx_lower_limit); 343 sc->rx_head = sc->rx_lower_limit; 344 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit | 0xfe); 345 outw(iobase + XMT_BAR, sc->tx_lower_limit); 346 sc->tx_head = sc->tx_tail = sc->tx_lower_limit; 347 348 ifp->if_flags |= IFF_RUNNING; 349 ifp->if_flags &= ~IFF_OACTIVE; 350 DODEBUG(Status, printf("OIDLE init\n");); 351 352 /* 353 * Final reset of the board, and enable operation. 354 */ 355 outb(iobase + CMD_REG, Sel_Reset_CMD); 356 DELAY(2); 357 outb(iobase + CMD_REG, Rcv_Enable_CMD); 358 359 ex_start(ifp); 360 splx(s); 361 362 DODEBUG(Start_End, printf("ex_init%d: finish\n", ifp->if_unit);); 363 } 364 365 366 static void 367 ex_start(struct ifnet *ifp) 368 { 369 struct ex_softc * sc = ifp->if_softc; 370 int iobase = sc->iobase; 371 int i, s, len, data_len, avail, dest, next; 372 unsigned char tmp16[2]; 373 struct mbuf * opkt; 374 struct mbuf * m; 375 376 DODEBUG(Start_End, printf("ex_start%d: start\n", unit);); 377 378 s = splimp(); 379 380 /* 381 * Main loop: send outgoing packets to network card until there are no 382 * more packets left, or the card cannot accept any more yet. 383 */ 384 while (((opkt = ifp->if_snd.ifq_head) != NULL) && 385 !(ifp->if_flags & IFF_OACTIVE)) { 386 387 /* 388 * Ensure there is enough free transmit buffer space for 389 * this packet, including its header. Note: the header 390 * cannot wrap around the end of the transmit buffer and 391 * must be kept together, so we allow space for twice the 392 * length of the header, just in case. 393 */ 394 395 for (len = 0, m = opkt; m != NULL; m = m->m_next) { 396 len += m->m_len; 397 } 398 399 data_len = len; 400 401 DODEBUG(Sent_Pkts, printf("1. Sending packet with %d data bytes. ", data_len);); 402 403 if (len & 1) { 404 len += XMT_HEADER_LEN + 1; 405 } else { 406 len += XMT_HEADER_LEN; 407 } 408 409 if ((i = sc->tx_tail - sc->tx_head) >= 0) { 410 avail = sc->tx_mem_size - i; 411 } else { 412 avail = -i; 413 } 414 415 DODEBUG(Sent_Pkts, printf("i=%d, avail=%d\n", i, avail);); 416 417 if (avail >= len + XMT_HEADER_LEN) { 418 IF_DEQUEUE(&ifp->if_snd, opkt); 419 420 #ifdef EX_PSA_INTR 421 /* 422 * Disable rx and tx interrupts, to avoid corruption 423 * of the host address register by interrupt service 424 * routines. 425 * XXX Is this necessary with splimp() enabled? 426 */ 427 outb(iobase + MASK_REG, All_Int); 428 #endif 429 430 /* 431 * Compute the start and end addresses of this 432 * frame in the tx buffer. 433 */ 434 dest = sc->tx_tail; 435 next = dest + len; 436 437 if (next > sc->tx_upper_limit) { 438 if ((sc->tx_upper_limit + 2 - sc->tx_tail) <= 439 XMT_HEADER_LEN) { 440 dest = sc->tx_lower_limit; 441 next = dest + len; 442 } else { 443 next = sc->tx_lower_limit + 444 next - sc->tx_upper_limit - 2; 445 } 446 } 447 448 /* 449 * Build the packet frame in the card's ring buffer. 450 */ 451 DODEBUG(Sent_Pkts, printf("2. dest=%d, next=%d. ", dest, next);); 452 453 outw(iobase + HOST_ADDR_REG, dest); 454 outw(iobase + IO_PORT_REG, Transmit_CMD); 455 outw(iobase + IO_PORT_REG, 0); 456 outw(iobase + IO_PORT_REG, next); 457 outw(iobase + IO_PORT_REG, data_len); 458 459 /* 460 * Output the packet data to the card. Ensure all 461 * transfers are 16-bit wide, even if individual 462 * mbufs have odd length. 463 */ 464 465 for (m = opkt, i = 0; m != NULL; m = m->m_next) { 466 DODEBUG(Sent_Pkts, printf("[%d]", m->m_len);); 467 if (i) { 468 tmp16[1] = *(mtod(m, caddr_t)); 469 outsw(iobase + IO_PORT_REG, tmp16, 1); 470 } 471 outsw(iobase + IO_PORT_REG, 472 mtod(m, caddr_t) + i, (m->m_len - i) / 2); 473 474 if ((i = (m->m_len - i) & 1) != 0) { 475 tmp16[0] = *(mtod(m, caddr_t) + 476 m->m_len - 1); 477 } 478 } 479 if (i) { 480 outsw(iobase + IO_PORT_REG, tmp16, 1); 481 } 482 483 /* 484 * If there were other frames chained, update the 485 * chain in the last one. 486 */ 487 if (sc->tx_head != sc->tx_tail) { 488 if (sc->tx_tail != dest) { 489 outw(iobase + HOST_ADDR_REG, 490 sc->tx_last + XMT_Chain_Point); 491 outw(iobase + IO_PORT_REG, dest); 492 } 493 outw(iobase + HOST_ADDR_REG, 494 sc->tx_last + XMT_Byte_Count); 495 i = inw(iobase + IO_PORT_REG); 496 outw(iobase + HOST_ADDR_REG, 497 sc->tx_last + XMT_Byte_Count); 498 outw(iobase + IO_PORT_REG, i | Ch_bit); 499 } 500 501 /* 502 * Resume normal operation of the card: 503 * - Make a dummy read to flush the DRAM write 504 * pipeline. 505 * - Enable receive and transmit interrupts. 506 * - Send Transmit or Resume_XMT command, as 507 * appropriate. 508 */ 509 inw(iobase + IO_PORT_REG); 510 #ifdef EX_PSA_INTR 511 outb(iobase + MASK_REG, All_Int & ~(Rx_Int | Tx_Int)); 512 #endif 513 if (sc->tx_head == sc->tx_tail) { 514 outw(iobase + XMT_BAR, dest); 515 outb(iobase + CMD_REG, Transmit_CMD); 516 sc->tx_head = dest; 517 DODEBUG(Sent_Pkts, printf("Transmit\n");); 518 } else { 519 outb(iobase + CMD_REG, Resume_XMT_List_CMD); 520 DODEBUG(Sent_Pkts, printf("Resume\n");); 521 } 522 523 sc->tx_last = dest; 524 sc->tx_tail = next; 525 526 if (ifp->if_bpf != NULL) { 527 bpf_mtap(ifp, opkt); 528 } 529 530 ifp->if_timer = 2; 531 ifp->if_opackets++; 532 m_freem(opkt); 533 } else { 534 ifp->if_flags |= IFF_OACTIVE; 535 DODEBUG(Status, printf("OACTIVE start\n");); 536 } 537 } 538 539 splx(s); 540 541 DODEBUG(Start_End, printf("ex_start%d: finish\n", unit);); 542 } 543 544 void 545 ex_stop(struct ex_softc *sc) 546 { 547 int iobase = sc->iobase; 548 549 DODEBUG(Start_End, printf("ex_stop%d: start\n", unit);); 550 551 /* 552 * Disable card operation: 553 * - Disable the interrupt line. 554 * - Flush transmission and disable reception. 555 * - Mask and clear all interrupts. 556 * - Reset the 82595. 557 */ 558 outb(iobase + CMD_REG, Bank1_Sel); 559 outb(iobase + REG1, inb(iobase + REG1) & ~TriST_INT); 560 outb(iobase + CMD_REG, Bank0_Sel); 561 outb(iobase + CMD_REG, Rcv_Stop); 562 sc->tx_head = sc->tx_tail = sc->tx_lower_limit; 563 sc->tx_last = 0; /* XXX I think these two lines are not necessary, because ex_init will always be called again to reinit the interface. */ 564 outb(iobase + MASK_REG, All_Int); 565 outb(iobase + STATUS_REG, All_Int); 566 outb(iobase + CMD_REG, Reset_CMD); 567 DELAY(200); 568 569 DODEBUG(Start_End, printf("ex_stop%d: finish\n", unit);); 570 571 return; 572 } 573 574 void 575 ex_intr(void *arg) 576 { 577 struct ex_softc * sc = (struct ex_softc *)arg; 578 struct ifnet * ifp = &sc->arpcom.ac_if; 579 int iobase = sc->iobase; 580 int int_status, send_pkts; 581 582 DODEBUG(Start_End, printf("ex_intr%d: start\n", unit);); 583 584 #ifdef EXDEBUG 585 if (++exintr_count != 1) 586 printf("WARNING: nested interrupt (%d). Mail the author.\n", exintr_count); 587 #endif 588 589 send_pkts = 0; 590 while ((int_status = inb(iobase + STATUS_REG)) & (Tx_Int | Rx_Int)) { 591 if (int_status & Rx_Int) { 592 outb(iobase + STATUS_REG, Rx_Int); 593 594 ex_rx_intr(sc); 595 } else if (int_status & Tx_Int) { 596 outb(iobase + STATUS_REG, Tx_Int); 597 598 ex_tx_intr(sc); 599 send_pkts = 1; 600 } 601 } 602 603 /* 604 * If any packet has been transmitted, and there are queued packets to 605 * be sent, attempt to send more packets to the network card. 606 */ 607 608 if (send_pkts && (ifp->if_snd.ifq_head != NULL)) { 609 ex_start(ifp); 610 } 611 612 #ifdef EXDEBUG 613 exintr_count--; 614 #endif 615 616 DODEBUG(Start_End, printf("ex_intr%d: finish\n", unit);); 617 618 return; 619 } 620 621 static void 622 ex_tx_intr(struct ex_softc *sc) 623 { 624 struct ifnet * ifp = &sc->arpcom.ac_if; 625 int iobase = sc->iobase; 626 int tx_status; 627 628 DODEBUG(Start_End, printf("ex_tx_intr%d: start\n", unit);); 629 630 /* 631 * - Cancel the watchdog. 632 * For all packets transmitted since last transmit interrupt: 633 * - Advance chain pointer to next queued packet. 634 * - Update statistics. 635 */ 636 637 ifp->if_timer = 0; 638 639 while (sc->tx_head != sc->tx_tail) { 640 outw(iobase + HOST_ADDR_REG, sc->tx_head); 641 642 if (! inw(iobase + IO_PORT_REG) & Done_bit) 643 break; 644 645 tx_status = inw(iobase + IO_PORT_REG); 646 sc->tx_head = inw(iobase + IO_PORT_REG); 647 648 if (tx_status & TX_OK_bit) { 649 ifp->if_opackets++; 650 } else { 651 ifp->if_oerrors++; 652 } 653 654 ifp->if_collisions += tx_status & No_Collisions_bits; 655 } 656 657 /* 658 * The card should be ready to accept more packets now. 659 */ 660 661 ifp->if_flags &= ~IFF_OACTIVE; 662 663 DODEBUG(Status, printf("OIDLE tx_intr\n");); 664 DODEBUG(Start_End, printf("ex_tx_intr%d: finish\n", unit);); 665 666 return; 667 } 668 669 static void 670 ex_rx_intr(struct ex_softc *sc) 671 { 672 struct ifnet * ifp = &sc->arpcom.ac_if; 673 int iobase = sc->iobase; 674 int rx_status; 675 int pkt_len; 676 int QQQ; 677 struct mbuf * m; 678 struct mbuf * ipkt; 679 struct ether_header * eh; 680 681 DODEBUG(Start_End, printf("ex_rx_intr%d: start\n", unit);); 682 683 /* 684 * For all packets received since last receive interrupt: 685 * - If packet ok, read it into a new mbuf and queue it to interface, 686 * updating statistics. 687 * - If packet bad, just discard it, and update statistics. 688 * Finally, advance receive stop limit in card's memory to new location. 689 */ 690 691 outw(iobase + HOST_ADDR_REG, sc->rx_head); 692 693 while (inw(iobase + IO_PORT_REG) == RCV_Done) { 694 695 rx_status = inw(iobase + IO_PORT_REG); 696 sc->rx_head = inw(iobase + IO_PORT_REG); 697 QQQ = pkt_len = inw(iobase + IO_PORT_REG); 698 699 if (rx_status & RCV_OK_bit) { 700 MGETHDR(m, M_DONTWAIT, MT_DATA); 701 ipkt = m; 702 if (ipkt == NULL) { 703 ifp->if_iqdrops++; 704 } else { 705 ipkt->m_pkthdr.rcvif = ifp; 706 ipkt->m_pkthdr.len = pkt_len; 707 ipkt->m_len = MHLEN; 708 709 while (pkt_len > 0) { 710 if (pkt_len > MINCLSIZE) { 711 MCLGET(m, M_DONTWAIT); 712 if (m->m_flags & M_EXT) { 713 m->m_len = MCLBYTES; 714 } else { 715 m_freem(ipkt); 716 ifp->if_iqdrops++; 717 goto rx_another; 718 } 719 } 720 m->m_len = min(m->m_len, pkt_len); 721 722 /* 723 * NOTE: I'm assuming that all mbufs allocated are of even length, 724 * except for the last one in an odd-length packet. 725 */ 726 727 insw(iobase + IO_PORT_REG, 728 mtod(m, caddr_t), m->m_len / 2); 729 730 if (m->m_len & 1) { 731 *(mtod(m, caddr_t) + m->m_len - 1) = inb(iobase + IO_PORT_REG); 732 } 733 pkt_len -= m->m_len; 734 735 if (pkt_len > 0) { 736 MGET(m->m_next, M_DONTWAIT, MT_DATA); 737 if (m->m_next == NULL) { 738 m_freem(ipkt); 739 ifp->if_iqdrops++; 740 goto rx_another; 741 } 742 m = m->m_next; 743 m->m_len = MLEN; 744 } 745 } 746 eh = mtod(ipkt, struct ether_header *); 747 #ifdef EXDEBUG 748 if (debug_mask & Rcvd_Pkts) { 749 if ((eh->ether_dhost[5] != 0xff) || (eh->ether_dhost[0] != 0xff)) { 750 printf("Receive packet with %d data bytes: %6D -> ", QQQ, eh->ether_shost, ":"); 751 printf("%6D\n", eh->ether_dhost, ":"); 752 } /* QQQ */ 753 } 754 #endif 755 m_adj(ipkt, sizeof(struct ether_header)); 756 ether_input(ifp, eh, ipkt); 757 ifp->if_ipackets++; 758 } 759 } else { 760 ifp->if_ierrors++; 761 } 762 outw(iobase + HOST_ADDR_REG, sc->rx_head); 763 rx_another: ; 764 } 765 766 if (sc->rx_head < sc->rx_lower_limit + 2) 767 outw(iobase + RCV_STOP_REG, sc->rx_upper_limit); 768 else 769 outw(iobase + RCV_STOP_REG, sc->rx_head - 2); 770 771 DODEBUG(Start_End, printf("ex_rx_intr%d: finish\n", unit);); 772 773 return; 774 } 775 776 777 static int 778 ex_ioctl(register struct ifnet *ifp, u_long cmd, caddr_t data) 779 { 780 struct ex_softc * sc = ifp->if_softc; 781 struct ifreq * ifr = (struct ifreq *)data; 782 int s; 783 int error = 0; 784 785 DODEBUG(Start_End, printf("ex_ioctl%d: start ", ifp->if_unit);); 786 787 s = splimp(); 788 789 switch(cmd) { 790 case SIOCSIFADDR: 791 case SIOCGIFADDR: 792 case SIOCSIFMTU: 793 error = ether_ioctl(ifp, cmd, data); 794 break; 795 796 case SIOCSIFFLAGS: 797 DODEBUG(Start_End, printf("SIOCSIFFLAGS");); 798 if ((ifp->if_flags & IFF_UP) == 0 && 799 (ifp->if_flags & IFF_RUNNING)) { 800 801 ifp->if_flags &= ~IFF_RUNNING; 802 ex_stop(sc); 803 } else { 804 ex_init(sc); 805 } 806 break; 807 #ifdef NODEF 808 case SIOCGHWADDR: 809 DODEBUG(Start_End, printf("SIOCGHWADDR");); 810 bcopy((caddr_t)sc->sc_addr, (caddr_t)&ifr->ifr_data, 811 sizeof(sc->sc_addr)); 812 break; 813 #endif 814 case SIOCADDMULTI: 815 DODEBUG(Start_End, printf("SIOCADDMULTI");); 816 case SIOCDELMULTI: 817 DODEBUG(Start_End, printf("SIOCDELMULTI");); 818 /* XXX Support not done yet. */ 819 error = EINVAL; 820 break; 821 case SIOCSIFMEDIA: 822 case SIOCGIFMEDIA: 823 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd); 824 break; 825 default: 826 DODEBUG(Start_End, printf("unknown");); 827 error = EINVAL; 828 } 829 830 splx(s); 831 832 DODEBUG(Start_End, printf("\nex_ioctl%d: finish\n", ifp->if_unit);); 833 834 return(error); 835 } 836 837 838 static void 839 ex_reset(struct ex_softc *sc) 840 { 841 int s; 842 843 DODEBUG(Start_End, printf("ex_reset%d: start\n", unit);); 844 845 s = splimp(); 846 847 ex_stop(sc); 848 ex_init(sc); 849 850 splx(s); 851 852 DODEBUG(Start_End, printf("ex_reset%d: finish\n", unit);); 853 854 return; 855 } 856 857 static void 858 ex_watchdog(struct ifnet *ifp) 859 { 860 struct ex_softc * sc = ifp->if_softc; 861 862 DODEBUG(Start_End, printf("ex_watchdog%d: start\n", ifp->if_unit);); 863 864 ifp->if_flags &= ~IFF_OACTIVE; 865 866 DODEBUG(Status, printf("OIDLE watchdog\n");); 867 868 ifp->if_oerrors++; 869 ex_reset(sc); 870 ex_start(ifp); 871 872 DODEBUG(Start_End, printf("ex_watchdog%d: finish\n", ifp->if_unit);); 873 874 return; 875 } 876 877 static int 878 ex_get_media (u_int32_t iobase) 879 { 880 int tmp; 881 882 outb(iobase + CMD_REG, Bank2_Sel); 883 tmp = inb(iobase + REG3); 884 outb(iobase + CMD_REG, Bank0_Sel); 885 886 if (tmp & TPE_bit) 887 return(IFM_ETHER|IFM_10_T); 888 if (tmp & BNC_bit) 889 return(IFM_ETHER|IFM_10_2); 890 891 return (IFM_ETHER|IFM_10_5); 892 } 893 894 static int 895 ex_ifmedia_upd (ifp) 896 struct ifnet * ifp; 897 { 898 899 return (0); 900 } 901 902 static void 903 ex_ifmedia_sts(ifp, ifmr) 904 struct ifnet * ifp; 905 struct ifmediareq * ifmr; 906 { 907 struct ex_softc * sc = ifp->if_softc; 908 909 ifmr->ifm_active = ex_get_media(sc->iobase); 910 911 return; 912 } 913 914 u_short 915 eeprom_read(u_int32_t iobase, int location) 916 { 917 int i; 918 u_short data = 0; 919 int ee_addr; 920 int read_cmd = location | EE_READ_CMD; 921 short ctrl_val = EECS; 922 923 ee_addr = iobase + EEPROM_REG; 924 outb(iobase + CMD_REG, Bank2_Sel); 925 outb(ee_addr, EECS); 926 for (i = 8; i >= 0; i--) { 927 short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI : ctrl_val; 928 outb(ee_addr, outval); 929 outb(ee_addr, outval | EESK); 930 DELAY(3); 931 outb(ee_addr, outval); 932 DELAY(2); 933 } 934 outb(ee_addr, ctrl_val); 935 936 for (i = 16; i > 0; i--) { 937 outb(ee_addr, ctrl_val | EESK); 938 DELAY(3); 939 data = (data << 1) | ((inb(ee_addr) & EEDO) ? 1 : 0); 940 outb(ee_addr, ctrl_val); 941 DELAY(2); 942 } 943 944 ctrl_val &= ~EECS; 945 outb(ee_addr, ctrl_val | EESK); 946 DELAY(3); 947 outb(ee_addr, ctrl_val); 948 DELAY(2); 949 outb(iobase + CMD_REG, Bank0_Sel); 950 return(data); 951 }
Cache object: 5227814e71e66b7fbc79657af0bf6057
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]