Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/fb/vga.c
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1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1999 Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp> 5 * Copyright (c) 1992-1998 Søren Schmidt 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer as 13 * the first lines of this file unmodified. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include "opt_vga.h" 37 #include "opt_fb.h" 38 #ifndef FB_DEBUG 39 #define FB_DEBUG 0 40 #endif 41 #include "opt_syscons.h" /* should be removed in the future, XXX */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/conf.h> 47 #include <sys/fcntl.h> 48 #include <sys/malloc.h> 49 #include <sys/fbio.h> 50 51 #include <vm/vm.h> 52 #include <vm/vm_param.h> 53 #include <vm/pmap.h> 54 55 #include <machine/md_var.h> 56 #if defined(__i386__) || defined(__amd64__) 57 #include <machine/pc/bios.h> 58 #endif 59 #include <machine/bus.h> 60 61 #include <dev/fb/fbreg.h> 62 #include <dev/fb/vgareg.h> 63 64 #include <isa/isareg.h> 65 66 #ifndef VGA_DEBUG 67 #define VGA_DEBUG 0 68 #endif 69 70 /* XXX machine/pc/bios.h has got too much i386-specific stuff in it */ 71 #ifndef BIOS_PADDRTOVADDR 72 #define BIOS_PADDRTOVADDR(x) (x) 73 #endif 74 75 int 76 vga_probe_unit(int unit, video_adapter_t *buf, int flags) 77 { 78 video_adapter_t *adp; 79 video_switch_t *sw; 80 int error; 81 82 sw = vid_get_switch(VGA_DRIVER_NAME); 83 if (sw == NULL) 84 return 0; 85 error = (*sw->probe)(unit, &adp, NULL, flags); 86 if (error) 87 return error; 88 bcopy(adp, buf, sizeof(*buf)); 89 return 0; 90 } 91 92 int 93 vga_attach_unit(int unit, vga_softc_t *sc, int flags) 94 { 95 video_switch_t *sw; 96 int error; 97 98 sw = vid_get_switch(VGA_DRIVER_NAME); 99 if (sw == NULL) 100 return ENXIO; 101 102 error = (*sw->probe)(unit, &sc->adp, NULL, flags); 103 if (error) 104 return error; 105 return (*sw->init)(unit, sc->adp, flags); 106 } 107 108 /* LOW-LEVEL */ 109 110 #include <isa/rtc.h> 111 #ifdef __i386__ 112 #include <dev/fb/vesa.h> 113 #endif 114 115 #define probe_done(adp) ((adp)->va_flags & V_ADP_PROBED) 116 #define init_done(adp) ((adp)->va_flags & V_ADP_INITIALIZED) 117 #define config_done(adp) ((adp)->va_flags & V_ADP_REGISTERED) 118 119 /* for compatibility with old kernel options */ 120 #ifdef SC_ALT_SEQACCESS 121 #undef SC_ALT_SEQACCESS 122 #undef VGA_ALT_SEQACCESS 123 #define VGA_ALT_SEQACCESS 1 124 #endif 125 126 #ifdef SLOW_VGA 127 #undef SLOW_VGA 128 #undef VGA_SLOW_IOACCESS 129 #define VGA_SLOW_IOACCESS 130 #endif 131 132 /* architecture dependent option */ 133 #if !defined(__i386__) && !defined(__amd64__) 134 #define VGA_NO_BIOS 1 135 #endif 136 137 /* this should really be in `rtc.h' */ 138 #define RTC_EQUIPMENT 0x14 139 140 /* various sizes */ 141 #define V_MODE_MAP_SIZE (M_VGA_CG320 + 1) 142 #define V_MODE_PARAM_SIZE 64 143 144 /* video adapter state buffer */ 145 struct adp_state { 146 int sig; 147 #define V_STATE_SIG 0x736f6962 148 u_char regs[V_MODE_PARAM_SIZE]; 149 }; 150 typedef struct adp_state adp_state_t; 151 152 /* video adapter information */ 153 #define DCC_MONO 0 154 #define DCC_CGA40 1 155 #define DCC_CGA80 2 156 #define DCC_EGAMONO 3 157 #define DCC_EGA40 4 158 #define DCC_EGA80 5 159 160 /* 161 * NOTE: `va_window' should have a virtual address, but is initialized 162 * with a physical address in the following table, as verify_adapter() 163 * will perform address conversion at run-time. 164 */ 165 static video_adapter_t adapter_init_value[] = { 166 /* DCC_MONO */ 167 { 0, KD_MONO, "mda", 0, 0, 0, IO_MDA, IO_MDASIZE, MONO_CRTC, 168 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 169 0, 0, 0, 0, 7, 0, }, 170 /* DCC_CGA40 */ 171 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 172 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 173 0, 0, 0, 0, 3, 0, }, 174 /* DCC_CGA80 */ 175 { 0, KD_CGA, "cga", 0, 0, V_ADP_COLOR, IO_CGA, IO_CGASIZE, COLOR_CRTC, 176 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 177 0, 0, 0, 0, 3, 0, }, 178 /* DCC_EGAMONO */ 179 { 0, KD_EGA, "ega", 0, 0, 0, IO_MDA, 48, MONO_CRTC, 180 EGA_BUF_BASE, EGA_BUF_SIZE, MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 181 0, 0, 0, 0, 7, 0, }, 182 /* DCC_EGA40 */ 183 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 184 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 185 0, 0, 0, 0, 3, 0, }, 186 /* DCC_EGA80 */ 187 { 0, KD_EGA, "ega", 0, 0, V_ADP_COLOR, IO_MDA, 48, COLOR_CRTC, 188 EGA_BUF_BASE, EGA_BUF_SIZE, CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 189 0, 0, 0, 0, 3, 0, }, 190 }; 191 192 static video_adapter_t biosadapter[2]; 193 static int biosadapters = 0; 194 195 /* video driver declarations */ 196 static int vga_configure(int flags); 197 int (*vga_sub_configure)(int flags); 198 #if 0 199 static int vga_nop(void); 200 #endif 201 static int vga_error(void); 202 static vi_probe_t vga_probe; 203 static vi_init_t vga_init; 204 static vi_get_info_t vga_get_info; 205 static vi_query_mode_t vga_query_mode; 206 static vi_set_mode_t vga_set_mode; 207 static vi_save_font_t vga_save_font; 208 static vi_load_font_t vga_load_font; 209 static vi_show_font_t vga_show_font; 210 static vi_save_palette_t vga_save_palette; 211 static vi_load_palette_t vga_load_palette; 212 static vi_set_border_t vga_set_border; 213 static vi_save_state_t vga_save_state; 214 static vi_load_state_t vga_load_state; 215 static vi_set_win_org_t vga_set_origin; 216 static vi_read_hw_cursor_t vga_read_hw_cursor; 217 static vi_set_hw_cursor_t vga_set_hw_cursor; 218 static vi_set_hw_cursor_shape_t vga_set_hw_cursor_shape; 219 static vi_blank_display_t vga_blank_display; 220 static vi_mmap_t vga_mmap_buf; 221 static vi_ioctl_t vga_dev_ioctl; 222 #ifndef VGA_NO_MODE_CHANGE 223 static vi_clear_t vga_clear; 224 static vi_fill_rect_t vga_fill_rect; 225 static vi_bitblt_t vga_bitblt; 226 #else /* VGA_NO_MODE_CHANGE */ 227 #define vga_clear (vi_clear_t *)vga_error 228 #define vga_fill_rect (vi_fill_rect_t *)vga_error 229 #define vga_bitblt (vi_bitblt_t *)vga_error 230 #endif 231 static vi_diag_t vga_diag; 232 233 static video_switch_t vgavidsw = { 234 vga_probe, 235 vga_init, 236 vga_get_info, 237 vga_query_mode, 238 vga_set_mode, 239 vga_save_font, 240 vga_load_font, 241 vga_show_font, 242 vga_save_palette, 243 vga_load_palette, 244 vga_set_border, 245 vga_save_state, 246 vga_load_state, 247 vga_set_origin, 248 vga_read_hw_cursor, 249 vga_set_hw_cursor, 250 vga_set_hw_cursor_shape, 251 vga_blank_display, 252 vga_mmap_buf, 253 vga_dev_ioctl, 254 vga_clear, 255 vga_fill_rect, 256 vga_bitblt, 257 vga_error, 258 vga_error, 259 vga_diag, 260 }; 261 262 VIDEO_DRIVER(mda, vgavidsw, NULL); 263 VIDEO_DRIVER(cga, vgavidsw, NULL); 264 VIDEO_DRIVER(ega, vgavidsw, NULL); 265 VIDEO_DRIVER(vga, vgavidsw, vga_configure); 266 267 /* VGA BIOS standard video modes */ 268 #define EOT (-1) 269 #define NA (-2) 270 271 static video_info_t bios_vmode[] = { 272 /* CGA */ 273 { M_B40x25, V_INFO_COLOR, 40, 25, 8, 8, 2, 1, 274 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 275 { M_C40x25, V_INFO_COLOR, 40, 25, 8, 8, 4, 1, 276 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 277 { M_B80x25, V_INFO_COLOR, 80, 25, 8, 8, 2, 1, 278 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 279 { M_C80x25, V_INFO_COLOR, 80, 25, 8, 8, 4, 1, 280 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 281 /* EGA */ 282 { M_ENH_B40x25, V_INFO_COLOR, 40, 25, 8, 14, 2, 1, 283 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 284 { M_ENH_C40x25, V_INFO_COLOR, 40, 25, 8, 14, 4, 1, 285 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 286 { M_ENH_B80x25, V_INFO_COLOR, 80, 25, 8, 14, 2, 1, 287 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 288 { M_ENH_C80x25, V_INFO_COLOR, 80, 25, 8, 14, 4, 1, 289 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 290 /* VGA */ 291 { M_VGA_C40x25, V_INFO_COLOR, 40, 25, 8, 16, 4, 1, 292 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 293 { M_VGA_M80x25, 0, 80, 25, 8, 16, 2, 1, 294 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 295 { M_VGA_C80x25, V_INFO_COLOR, 80, 25, 8, 16, 4, 1, 296 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 297 /* MDA */ 298 { M_EGAMONO80x25, 0, 80, 25, 8, 14, 2, 1, 299 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 300 /* EGA */ 301 { M_ENH_B80x43, V_INFO_COLOR, 80, 43, 8, 8, 2, 1, 302 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 303 { M_ENH_C80x43, V_INFO_COLOR, 80, 43, 8, 8, 4, 1, 304 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 305 /* VGA */ 306 { M_VGA_M80x30, 0, 80, 30, 8, 16, 2, 1, 307 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 308 { M_VGA_C80x30, V_INFO_COLOR, 80, 30, 8, 16, 4, 1, 309 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 310 { M_VGA_M80x50, 0, 80, 50, 8, 8, 2, 1, 311 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 312 { M_VGA_C80x50, V_INFO_COLOR, 80, 50, 8, 8, 4, 1, 313 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 314 { M_VGA_M80x60, 0, 80, 60, 8, 8, 2, 1, 315 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 316 { M_VGA_C80x60, V_INFO_COLOR, 80, 60, 8, 8, 4, 1, 317 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 318 319 #ifndef VGA_NO_MODE_CHANGE 320 321 #ifdef VGA_WIDTH90 322 { M_VGA_M90x25, 0, 90, 25, 8, 16, 2, 1, 323 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 324 { M_VGA_C90x25, V_INFO_COLOR, 90, 25, 8, 16, 4, 1, 325 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 326 { M_VGA_M90x30, 0, 90, 30, 8, 16, 2, 1, 327 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 328 { M_VGA_C90x30, V_INFO_COLOR, 90, 30, 8, 16, 4, 1, 329 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 330 { M_VGA_M90x43, 0, 90, 43, 8, 8, 2, 1, 331 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 332 { M_VGA_C90x43, V_INFO_COLOR, 90, 43, 8, 8, 4, 1, 333 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 334 { M_VGA_M90x50, 0, 90, 50, 8, 8, 2, 1, 335 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 336 { M_VGA_C90x50, V_INFO_COLOR, 90, 50, 8, 8, 4, 1, 337 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 338 { M_VGA_M90x60, 0, 90, 60, 8, 8, 2, 1, 339 MDA_BUF_BASE, MDA_BUF_SIZE, MDA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 340 { M_VGA_C90x60, V_INFO_COLOR, 90, 60, 8, 8, 4, 1, 341 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_TEXT }, 342 #endif /* VGA_WIDTH90 */ 343 344 /* CGA */ 345 { M_BG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 346 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 347 { M_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 2, 1, 348 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 349 { M_BG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 1, 1, 350 CGA_BUF_BASE, CGA_BUF_SIZE, CGA_BUF_SIZE, 0, 0, V_INFO_MM_CGA }, 351 /* EGA */ 352 { M_CG320_D, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 4, 4, 353 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 354 V_INFO_MM_PLANAR }, 355 { M_CG640_E, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 200, 8, 8, 4, 4, 356 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 357 V_INFO_MM_PLANAR }, 358 { M_EGAMONOAPA, V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 359 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, 64*1024, 0, 0 , 360 V_INFO_MM_PLANAR }, 361 { M_ENHMONOAPA2,V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 362 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 363 V_INFO_MM_PLANAR }, 364 { M_CG640x350, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 2, 2, 365 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 366 V_INFO_MM_PLANAR }, 367 { M_ENH_CG640, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 350, 8, 14, 4, 4, 368 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 369 V_INFO_MM_PLANAR }, 370 /* VGA */ 371 { M_BG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 372 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 373 V_INFO_MM_PLANAR }, 374 { M_CG640x480, V_INFO_COLOR | V_INFO_GRAPHICS, 640, 480, 8, 16, 4, 4, 375 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0 , 376 V_INFO_MM_PLANAR }, 377 { M_VGA_CG320, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 200, 8, 8, 8, 1, 378 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 379 V_INFO_MM_PACKED, 1 }, 380 { M_VGA_MODEX, V_INFO_COLOR | V_INFO_GRAPHICS, 320, 240, 8, 8, 8, 4, 381 GRAPHICS_BUF_BASE, GRAPHICS_BUF_SIZE, GRAPHICS_BUF_SIZE, 0, 0, 382 V_INFO_MM_VGAX, 1 }, 383 #endif /* VGA_NO_MODE_CHANGE */ 384 385 { EOT }, 386 }; 387 388 static int vga_init_done = FALSE; 389 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 390 static u_char *video_mode_ptr = NULL; /* EGA/VGA */ 391 static u_char *video_mode_ptr2 = NULL; /* CGA/MDA */ 392 #endif 393 static u_char *mode_map[V_MODE_MAP_SIZE]; 394 static adp_state_t adpstate; 395 static adp_state_t adpstate2; 396 static int rows_offset = 1; 397 398 /* local macros and functions */ 399 #define BIOS_SADDRTOLADDR(p) ((((p) & 0xffff0000) >> 12) + ((p) & 0x0000ffff)) 400 401 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 402 static void map_mode_table(u_char *map[], u_char *table, int max); 403 #endif 404 static void clear_mode_map(video_adapter_t *adp, u_char *map[], int max, 405 int color); 406 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 407 static int map_mode_num(int mode); 408 #endif 409 static int map_gen_mode_num(int type, int color, int mode); 410 static int map_bios_mode_num(int type, int color, int bios_mode); 411 static u_char *get_mode_param(int mode); 412 #ifndef VGA_NO_BIOS 413 static void fill_adapter_param(int code, video_adapter_t *adp); 414 #endif 415 static int verify_adapter(video_adapter_t *adp); 416 static void update_adapter_info(video_adapter_t *adp, video_info_t *info); 417 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 418 #define COMP_IDENTICAL 0 419 #define COMP_SIMILAR 1 420 #define COMP_DIFFERENT 2 421 static int comp_adpregs(u_char *buf1, u_char *buf2); 422 #endif 423 static int probe_adapters(void); 424 static int set_line_length(video_adapter_t *adp, int pixel); 425 static int set_display_start(video_adapter_t *adp, int x, int y); 426 427 #ifndef VGA_NO_MODE_CHANGE 428 #ifdef VGA_WIDTH90 429 static void set_width90(adp_state_t *params); 430 #endif 431 #endif /* !VGA_NO_MODE_CHANGE */ 432 433 #ifndef VGA_NO_FONT_LOADING 434 #define PARAM_BUFSIZE 6 435 static void set_font_mode(video_adapter_t *adp, u_char *buf); 436 static void set_normal_mode(video_adapter_t *adp, u_char *buf); 437 #endif 438 439 #ifndef VGA_NO_MODE_CHANGE 440 static void filll_io(int val, vm_offset_t d, size_t size); 441 static void planar_fill(video_adapter_t *adp, int val); 442 static void packed_fill(video_adapter_t *adp, int val); 443 static void direct_fill(video_adapter_t *adp, int val); 444 #ifdef notyet 445 static void planar_fill_rect(video_adapter_t *adp, int val, int x, int y, 446 int cx, int cy); 447 static void packed_fill_rect(video_adapter_t *adp, int val, int x, int y, 448 int cx, int cy); 449 static void direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, 450 int cx, int cy); 451 static void direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, 452 int cx, int cy); 453 static void direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, 454 int cx, int cy); 455 #endif /* notyet */ 456 #endif /* !VGA_NO_MODE_CHANGE */ 457 458 static void dump_buffer(u_char *buf, size_t len); 459 460 #define ISMAPPED(pa, width) \ 461 (((pa) <= (u_long)0x1000 - (width)) \ 462 || ((pa) >= ISA_HOLE_START && (pa) <= 0x100000 - (width))) 463 464 #define prologue(adp, flag, err) \ 465 if (!vga_init_done || !((adp)->va_flags & (flag))) \ 466 return (err) 467 468 /* a backdoor for the console driver */ 469 static int 470 vga_configure(int flags) 471 { 472 int i; 473 474 probe_adapters(); 475 for (i = 0; i < biosadapters; ++i) { 476 if (!probe_done(&biosadapter[i])) 477 continue; 478 biosadapter[i].va_flags |= V_ADP_INITIALIZED; 479 if (!config_done(&biosadapter[i])) { 480 if (vid_register(&biosadapter[i]) < 0) 481 continue; 482 biosadapter[i].va_flags |= V_ADP_REGISTERED; 483 } 484 } 485 if (vga_sub_configure != NULL) 486 (*vga_sub_configure)(flags); 487 488 return biosadapters; 489 } 490 491 /* local subroutines */ 492 493 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 494 /* construct the mode parameter map */ 495 static void 496 map_mode_table(u_char *map[], u_char *table, int max) 497 { 498 int i; 499 500 for(i = 0; i < max; ++i) 501 map[i] = table + i*V_MODE_PARAM_SIZE; 502 for(; i < V_MODE_MAP_SIZE; ++i) 503 map[i] = NULL; 504 } 505 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 506 507 static void 508 clear_mode_map(video_adapter_t *adp, u_char *map[], int max, int color) 509 { 510 video_info_t info; 511 int i; 512 513 /* 514 * NOTE: we don't touch `bios_vmode[]' because it is shared 515 * by all adapters. 516 */ 517 for(i = 0; i < max; ++i) { 518 if (vga_get_info(adp, i, &info)) 519 continue; 520 if ((info.vi_flags & V_INFO_COLOR) != color) 521 map[i] = NULL; 522 } 523 } 524 525 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 526 /* map the non-standard video mode to a known mode number */ 527 static int 528 map_mode_num(int mode) 529 { 530 static struct { 531 int from; 532 int to; 533 } mode_map[] = { 534 { M_ENH_B80x43, M_ENH_B80x25 }, 535 { M_ENH_C80x43, M_ENH_C80x25 }, 536 { M_VGA_M80x30, M_VGA_M80x25 }, 537 { M_VGA_C80x30, M_VGA_C80x25 }, 538 { M_VGA_M80x50, M_VGA_M80x25 }, 539 { M_VGA_C80x50, M_VGA_C80x25 }, 540 { M_VGA_M80x60, M_VGA_M80x25 }, 541 { M_VGA_C80x60, M_VGA_C80x25 }, 542 #ifdef VGA_WIDTH90 543 { M_VGA_M90x25, M_VGA_M80x25 }, 544 { M_VGA_C90x25, M_VGA_C80x25 }, 545 { M_VGA_M90x30, M_VGA_M80x25 }, 546 { M_VGA_C90x30, M_VGA_C80x25 }, 547 { M_VGA_M90x43, M_VGA_M80x25 }, 548 { M_VGA_C90x43, M_ENH_C80x25 }, 549 { M_VGA_M90x50, M_VGA_M80x25 }, 550 { M_VGA_C90x50, M_VGA_C80x25 }, 551 { M_VGA_M90x60, M_VGA_M80x25 }, 552 { M_VGA_C90x60, M_VGA_C80x25 }, 553 #endif 554 { M_VGA_MODEX, M_VGA_CG320 }, 555 }; 556 int i; 557 558 for (i = 0; i < nitems(mode_map); ++i) { 559 if (mode_map[i].from == mode) 560 return mode_map[i].to; 561 } 562 return mode; 563 } 564 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 565 566 /* map a generic video mode to a known mode number */ 567 static int 568 map_gen_mode_num(int type, int color, int mode) 569 { 570 static struct { 571 int from; 572 int to_color; 573 int to_mono; 574 } mode_map[] = { 575 { M_TEXT_80x30, M_VGA_C80x30, M_VGA_M80x30, }, 576 { M_TEXT_80x43, M_ENH_C80x43, M_ENH_B80x43, }, 577 { M_TEXT_80x50, M_VGA_C80x50, M_VGA_M80x50, }, 578 { M_TEXT_80x60, M_VGA_C80x60, M_VGA_M80x60, }, 579 }; 580 int i; 581 582 if (mode == M_TEXT_80x25) { 583 switch (type) { 584 585 case KD_VGA: 586 if (color) 587 return M_VGA_C80x25; 588 else 589 return M_VGA_M80x25; 590 break; 591 592 case KD_EGA: 593 if (color) 594 return M_ENH_C80x25; 595 else 596 return M_EGAMONO80x25; 597 break; 598 599 case KD_CGA: 600 return M_C80x25; 601 602 case KD_MONO: 603 case KD_HERCULES: 604 return M_EGAMONO80x25; /* XXX: this name is confusing */ 605 606 default: 607 return -1; 608 } 609 } 610 611 for (i = 0; i < nitems(mode_map); ++i) { 612 if (mode_map[i].from == mode) 613 return ((color) ? mode_map[i].to_color : mode_map[i].to_mono); 614 } 615 return mode; 616 } 617 618 /* turn the BIOS video number into our video mode number */ 619 static int 620 map_bios_mode_num(int type, int color, int bios_mode) 621 { 622 static int cga_modes[7] = { 623 M_B40x25, M_C40x25, /* 0, 1 */ 624 M_B80x25, M_C80x25, /* 2, 3 */ 625 M_BG320, M_CG320, 626 M_BG640, 627 }; 628 static int ega_modes[17] = { 629 M_ENH_B40x25, M_ENH_C40x25, /* 0, 1 */ 630 M_ENH_B80x25, M_ENH_C80x25, /* 2, 3 */ 631 M_BG320, M_CG320, 632 M_BG640, 633 M_EGAMONO80x25, /* 7 */ 634 8, 9, 10, 11, 12, 635 M_CG320_D, 636 M_CG640_E, 637 M_ENHMONOAPA2, /* XXX: video momery > 64K */ 638 M_ENH_CG640, /* XXX: video momery > 64K */ 639 }; 640 static int vga_modes[20] = { 641 M_VGA_C40x25, M_VGA_C40x25, /* 0, 1 */ 642 M_VGA_C80x25, M_VGA_C80x25, /* 2, 3 */ 643 M_BG320, M_CG320, 644 M_BG640, 645 M_VGA_M80x25, /* 7 */ 646 8, 9, 10, 11, 12, 647 M_CG320_D, 648 M_CG640_E, 649 M_ENHMONOAPA2, 650 M_ENH_CG640, 651 M_BG640x480, M_CG640x480, 652 M_VGA_CG320, 653 }; 654 655 switch (type) { 656 657 case KD_VGA: 658 if (bios_mode < nitems(vga_modes)) 659 return vga_modes[bios_mode]; 660 else if (color) 661 return M_VGA_C80x25; 662 else 663 return M_VGA_M80x25; 664 break; 665 666 case KD_EGA: 667 if (bios_mode < nitems(ega_modes)) 668 return ega_modes[bios_mode]; 669 else if (color) 670 return M_ENH_C80x25; 671 else 672 return M_EGAMONO80x25; 673 break; 674 675 case KD_CGA: 676 if (bios_mode < nitems(cga_modes)) 677 return cga_modes[bios_mode]; 678 else 679 return M_C80x25; 680 break; 681 682 case KD_MONO: 683 case KD_HERCULES: 684 return M_EGAMONO80x25; /* XXX: this name is confusing */ 685 686 default: 687 break; 688 } 689 return -1; 690 } 691 692 /* look up a parameter table entry */ 693 static u_char 694 *get_mode_param(int mode) 695 { 696 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 697 if (mode >= V_MODE_MAP_SIZE) 698 mode = map_mode_num(mode); 699 #endif 700 if ((mode >= 0) && (mode < V_MODE_MAP_SIZE)) 701 return mode_map[mode]; 702 else 703 return NULL; 704 } 705 706 #ifndef VGA_NO_BIOS 707 static void 708 fill_adapter_param(int code, video_adapter_t *adp) 709 { 710 static struct { 711 int primary; 712 int secondary; 713 } dcc[] = { 714 { DCC_MONO, DCC_EGA40 /* CGA monitor */ }, 715 { DCC_MONO, DCC_EGA80 /* CGA monitor */ }, 716 { DCC_MONO, DCC_EGA80 }, 717 { DCC_MONO, DCC_EGA80 }, 718 { DCC_CGA40, DCC_EGAMONO }, 719 { DCC_CGA80, DCC_EGAMONO }, 720 { DCC_EGA40 /* CGA monitor */, DCC_MONO}, 721 { DCC_EGA80 /* CGA monitor */, DCC_MONO}, 722 { DCC_EGA80, DCC_MONO }, 723 { DCC_EGA80, DCC_MONO }, 724 { DCC_EGAMONO, DCC_CGA40 }, 725 { DCC_EGAMONO, DCC_CGA80 }, 726 }; 727 728 if ((code < 0) || (code >= nitems(dcc))) { 729 adp[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 730 adp[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 731 } else { 732 adp[V_ADP_PRIMARY] = adapter_init_value[dcc[code].primary]; 733 adp[V_ADP_SECONDARY] = adapter_init_value[dcc[code].secondary]; 734 } 735 } 736 #endif /* VGA_NO_BIOS */ 737 738 static int 739 verify_adapter(video_adapter_t *adp) 740 { 741 vm_offset_t buf; 742 u_int16_t v; 743 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 744 u_int32_t p; 745 #endif 746 747 buf = BIOS_PADDRTOVADDR(adp->va_window); 748 v = readw(buf); 749 writew(buf, 0xA55A); 750 if (readw(buf) != 0xA55A) 751 return ENXIO; 752 writew(buf, v); 753 754 switch (adp->va_type) { 755 756 case KD_EGA: 757 outb(adp->va_crtc_addr, 7); 758 if (inb(adp->va_crtc_addr) == 7) { 759 adp->va_type = KD_VGA; 760 adp->va_name = "vga"; 761 adp->va_flags |= V_ADP_STATESAVE | V_ADP_PALETTE; 762 } 763 adp->va_flags |= V_ADP_STATELOAD | V_ADP_BORDER; 764 /* the color adapter may be in the 40x25 mode... XXX */ 765 766 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 767 /* get the BIOS video mode pointer */ 768 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8); 769 p = BIOS_SADDRTOLADDR(p); 770 if (ISMAPPED(p, sizeof(u_int32_t))) { 771 p = *(u_int32_t *)BIOS_PADDRTOVADDR(p); 772 p = BIOS_SADDRTOLADDR(p); 773 if (ISMAPPED(p, V_MODE_PARAM_SIZE)) 774 video_mode_ptr = (u_char *)BIOS_PADDRTOVADDR(p); 775 } 776 #endif 777 break; 778 779 case KD_CGA: 780 adp->va_flags |= V_ADP_COLOR | V_ADP_BORDER; 781 /* may be in the 40x25 mode... XXX */ 782 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 783 /* get the BIOS video mode pointer */ 784 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 785 p = BIOS_SADDRTOLADDR(p); 786 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 787 #endif 788 break; 789 790 case KD_MONO: 791 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 792 /* get the BIOS video mode pointer */ 793 p = *(u_int32_t *)BIOS_PADDRTOVADDR(0x1d*4); 794 p = BIOS_SADDRTOLADDR(p); 795 video_mode_ptr2 = (u_char *)BIOS_PADDRTOVADDR(p); 796 #endif 797 break; 798 } 799 800 return 0; 801 } 802 803 static void 804 update_adapter_info(video_adapter_t *adp, video_info_t *info) 805 { 806 adp->va_flags &= ~V_ADP_COLOR; 807 adp->va_flags |= 808 (info->vi_flags & V_INFO_COLOR) ? V_ADP_COLOR : 0; 809 adp->va_crtc_addr = 810 (adp->va_flags & V_ADP_COLOR) ? COLOR_CRTC : MONO_CRTC; 811 adp->va_window = BIOS_PADDRTOVADDR(info->vi_window); 812 adp->va_window_size = info->vi_window_size; 813 adp->va_window_gran = info->vi_window_gran; 814 adp->va_window_orig = 0; 815 /* XXX */ 816 adp->va_buffer = info->vi_buffer; 817 adp->va_buffer_size = info->vi_buffer_size; 818 adp->va_flags &= ~V_ADP_CWIDTH9; 819 if (info->vi_flags & V_INFO_CWIDTH9) 820 adp->va_flags |= V_ADP_CWIDTH9; 821 if (info->vi_mem_model == V_INFO_MM_VGAX) { 822 adp->va_line_width = info->vi_width/2; 823 } else if (info->vi_flags & V_INFO_GRAPHICS) { 824 switch (info->vi_depth/info->vi_planes) { 825 case 1: 826 adp->va_line_width = info->vi_width/8; 827 break; 828 case 2: 829 adp->va_line_width = info->vi_width/4; 830 break; 831 case 4: 832 adp->va_line_width = info->vi_width/2; 833 break; 834 case 8: 835 default: /* shouldn't happen */ 836 adp->va_line_width = info->vi_width; 837 break; 838 } 839 } else { 840 adp->va_line_width = info->vi_width; 841 } 842 adp->va_disp_start.x = 0; 843 adp->va_disp_start.y = 0; 844 bcopy(info, &adp->va_info, sizeof(adp->va_info)); 845 } 846 847 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 848 /* compare two parameter table entries */ 849 static int 850 comp_adpregs(u_char *buf1, u_char *buf2) 851 { 852 static struct { 853 u_char mask; 854 } params[V_MODE_PARAM_SIZE] = { 855 {0xff}, {0x00}, {0xff}, /* COLS}, ROWS}, POINTS */ 856 {0x00}, {0x00}, /* page length */ 857 {0xfe}, {0xff}, {0xff}, {0xff}, /* sequencer registers */ 858 {0xf3}, /* misc register */ 859 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, /* CRTC */ 860 {0xff}, {0xff}, {0xff}, {0x7f}, {0xff}, 861 {0x00}, {0x00}, {0x00}, {0x00}, {0x00}, 862 {0x00}, {0xff}, {0x7f}, {0xff}, {0xff}, 863 {0x7f}, {0xff}, {0xff}, {0xef}, {0xff}, 864 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* attribute controller regs */ 865 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 866 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, 867 {0xff}, {0xff}, {0xff}, {0xff}, {0xf0}, 868 {0xff}, {0xff}, {0xff}, {0xff}, {0xff}, /* GDC register */ 869 {0xff}, {0xff}, {0xff}, {0xff}, 870 }; 871 int identical = TRUE; 872 int i; 873 874 if ((buf1 == NULL) || (buf2 == NULL)) 875 return COMP_DIFFERENT; 876 877 for (i = 0; i < nitems(params); ++i) { 878 if (params[i].mask == 0) /* don't care */ 879 continue; 880 if ((buf1[i] & params[i].mask) != (buf2[i] & params[i].mask)) 881 return COMP_DIFFERENT; 882 if (buf1[i] != buf2[i]) 883 identical = FALSE; 884 } 885 return (identical) ? COMP_IDENTICAL : COMP_SIMILAR; 886 } 887 #endif /* !VGA_NO_BIOS && !VGA_NO_MODE_CHANGE */ 888 889 /* probe video adapters and return the number of detected adapters */ 890 static int 891 probe_adapters(void) 892 { 893 video_adapter_t *adp; 894 video_info_t info; 895 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 896 u_char *mp; 897 #endif 898 int height, i, width; 899 900 /* do this test only once */ 901 if (vga_init_done) 902 return biosadapters; 903 vga_init_done = TRUE; 904 905 /* 906 * Locate display adapters. 907 * The AT architecture supports up to two adapters. `syscons' allows 908 * the following combinations of adapters: 909 * 1) MDA + CGA 910 * 2) MDA + EGA/VGA color 911 * 3) CGA + EGA/VGA mono 912 * Note that `syscons' doesn't bother with MCGA as it is only 913 * avaiable for low end PS/2 models which has 80286 or earlier CPUs, 914 * thus, they are not running FreeBSD! 915 * When there are two adapaters in the system, one becomes `primary' 916 * and the other `secondary'. The EGA adapter has a set of DIP 917 * switches on board for this information and the EGA BIOS copies 918 * it in the BIOS data area BIOSDATA_VIDEOSWITCH (40:88). 919 * The VGA BIOS has more sophisticated mechanism and has this 920 * information in BIOSDATA_DCCINDEX (40:8a), but it also maintains 921 * compatibility with the EGA BIOS by updating BIOSDATA_VIDEOSWITCH. 922 */ 923 924 /* 925 * Check rtc and BIOS data area. 926 * XXX: we don't use BIOSDATA_EQUIPMENT, since it is not a dead 927 * copy of RTC_EQUIPMENT. Bits 4 and 5 of ETC_EQUIPMENT are 928 * zeros for EGA and VGA. However, the EGA/VGA BIOS sets 929 * these bits in BIOSDATA_EQUIPMENT according to the monitor 930 * type detected. 931 */ 932 #ifndef VGA_NO_BIOS 933 if (*(u_int32_t *)BIOS_PADDRTOVADDR(0x4a8)) { 934 /* EGA/VGA BIOS is present */ 935 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 936 biosadapter); 937 } else { 938 switch ((rtcin(RTC_EQUIPMENT) >> 4) & 3) { /* bit 4 and 5 */ 939 case 0: 940 /* EGA/VGA: shouldn't be happening */ 941 fill_adapter_param(readb(BIOS_PADDRTOVADDR(0x488)) & 0x0f, 942 biosadapter); 943 break; 944 case 1: 945 /* CGA 40x25 */ 946 /* FIXME: switch to the 80x25 mode? XXX */ 947 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA40]; 948 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 949 break; 950 case 2: 951 /* CGA 80x25 */ 952 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_CGA80]; 953 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 954 break; 955 case 3: 956 /* MDA */ 957 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_MONO]; 958 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_CGA80]; 959 break; 960 } 961 } 962 #else 963 /* assume EGA/VGA? XXX */ 964 biosadapter[V_ADP_PRIMARY] = adapter_init_value[DCC_EGA80]; 965 biosadapter[V_ADP_SECONDARY] = adapter_init_value[DCC_MONO]; 966 #endif /* VGA_NO_BIOS */ 967 968 biosadapters = 0; 969 if (verify_adapter(&biosadapter[V_ADP_SECONDARY]) == 0) { 970 ++biosadapters; 971 biosadapter[V_ADP_SECONDARY].va_flags |= V_ADP_PROBED; 972 biosadapter[V_ADP_SECONDARY].va_mode = 973 biosadapter[V_ADP_SECONDARY].va_initial_mode = 974 map_bios_mode_num(biosadapter[V_ADP_SECONDARY].va_type, 975 biosadapter[V_ADP_SECONDARY].va_flags 976 & V_ADP_COLOR, 977 biosadapter[V_ADP_SECONDARY].va_initial_bios_mode); 978 } else { 979 biosadapter[V_ADP_SECONDARY].va_type = -1; 980 } 981 if (verify_adapter(&biosadapter[V_ADP_PRIMARY]) == 0) { 982 ++biosadapters; 983 biosadapter[V_ADP_PRIMARY].va_flags |= V_ADP_PROBED; 984 #ifndef VGA_NO_BIOS 985 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 986 readb(BIOS_PADDRTOVADDR(0x449)); 987 #else 988 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode = 3; /* XXX */ 989 #endif 990 biosadapter[V_ADP_PRIMARY].va_mode = 991 biosadapter[V_ADP_PRIMARY].va_initial_mode = 992 map_bios_mode_num(biosadapter[V_ADP_PRIMARY].va_type, 993 biosadapter[V_ADP_PRIMARY].va_flags & V_ADP_COLOR, 994 biosadapter[V_ADP_PRIMARY].va_initial_bios_mode); 995 } else { 996 biosadapter[V_ADP_PRIMARY] = biosadapter[V_ADP_SECONDARY]; 997 biosadapter[V_ADP_SECONDARY].va_type = -1; 998 } 999 if (biosadapters == 0) 1000 return biosadapters; 1001 biosadapter[V_ADP_PRIMARY].va_unit = V_ADP_PRIMARY; 1002 biosadapter[V_ADP_SECONDARY].va_unit = V_ADP_SECONDARY; 1003 1004 #if 0 /* we don't need these... */ 1005 fb_init_struct(&biosadapter[V_ADP_PRIMARY], ...); 1006 fb_init_struct(&biosadapter[V_ADP_SECONDARY], ...); 1007 #endif 1008 1009 #ifdef notyet 1010 /* 1011 * We cannot have two video adapter of the same type; there must be 1012 * only one of color or mono adapter, or one each of them. 1013 */ 1014 if (biosadapters > 1) { 1015 if (!((biosadapter[0].va_flags ^ biosadapter[1].va_flags) 1016 & V_ADP_COLOR)) 1017 /* we have two mono or color adapters!! */ 1018 return (biosadapters = 0); 1019 } 1020 #endif 1021 1022 /* 1023 * Ensure a zero start address. The registers are w/o 1024 * for old hardware so it's too hard to relocate the active screen 1025 * memory. 1026 * This must be done before vga_save_state() for VGA. 1027 */ 1028 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 12); 1029 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1030 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr, 13); 1031 outb(biosadapter[V_ADP_PRIMARY].va_crtc_addr + 1, 0); 1032 1033 /* the video mode parameter table in EGA/VGA BIOS */ 1034 /* NOTE: there can be only one EGA/VGA, wheather color or mono, 1035 * recognized by the video BIOS. 1036 */ 1037 if ((biosadapter[V_ADP_PRIMARY].va_type == KD_EGA) || 1038 (biosadapter[V_ADP_PRIMARY].va_type == KD_VGA)) { 1039 adp = &biosadapter[V_ADP_PRIMARY]; 1040 } else if ((biosadapter[V_ADP_SECONDARY].va_type == KD_EGA) || 1041 (biosadapter[V_ADP_SECONDARY].va_type == KD_VGA)) { 1042 adp = &biosadapter[V_ADP_SECONDARY]; 1043 } else { 1044 adp = NULL; 1045 } 1046 bzero(mode_map, sizeof(mode_map)); 1047 if (adp != NULL) { 1048 if (adp->va_type == KD_VGA) { 1049 vga_save_state(adp, &adpstate, sizeof(adpstate)); 1050 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1051 mode_map[adp->va_initial_mode] = adpstate.regs; 1052 rows_offset = 1; 1053 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1054 if (video_mode_ptr == NULL) { 1055 mode_map[adp->va_initial_mode] = adpstate.regs; 1056 rows_offset = 1; 1057 } else { 1058 /* discard the table if we are not familiar with it... */ 1059 map_mode_table(mode_map, video_mode_ptr, M_VGA_CG320 + 1); 1060 mp = get_mode_param(adp->va_initial_mode); 1061 if (mp != NULL) 1062 bcopy(mp, adpstate2.regs, sizeof(adpstate2.regs)); 1063 switch (comp_adpregs(adpstate.regs, mp)) { 1064 case COMP_IDENTICAL: 1065 /* 1066 * OK, this parameter table looks reasonably familiar 1067 * to us... 1068 */ 1069 /* 1070 * This is a kludge for Toshiba DynaBook SS433 1071 * whose BIOS video mode table entry has the actual # 1072 * of rows at the offset 1; BIOSes from other 1073 * manufacturers store the # of rows - 1 there. XXX 1074 */ 1075 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1076 break; 1077 1078 case COMP_SIMILAR: 1079 /* 1080 * Not exactly the same, but similar enough to be 1081 * trusted. However, use the saved register values 1082 * for the initial mode and other modes which are 1083 * based on the initial mode. 1084 */ 1085 mode_map[adp->va_initial_mode] = adpstate.regs; 1086 rows_offset = adpstate.regs[1] + 1 - mp[1]; 1087 adpstate.regs[1] -= rows_offset - 1; 1088 break; 1089 1090 case COMP_DIFFERENT: 1091 default: 1092 /* 1093 * Don't use the parameter table in the BIOS, since 1094 * even the BIOS doesn't use it for the initial mode. 1095 * Restrict the tweaked modes to (in practice) 80x50 1096 * from 80x25 with 400 scan lines, since the only safe 1097 * tweak is changing the characters from 8x16 to 8x8. 1098 */ 1099 video_mode_ptr = NULL; 1100 bzero(mode_map, sizeof(mode_map)); 1101 mode_map[adp->va_initial_mode] = adpstate.regs; 1102 rows_offset = 1; 1103 1104 width = height = -1; 1105 for (i = 0; i < nitems(bios_vmode); ++i) { 1106 if (bios_vmode[i].vi_mode == adp->va_initial_mode) { 1107 width = bios_vmode[i].vi_width; 1108 height = bios_vmode[i].vi_height; 1109 break; 1110 } 1111 } 1112 for (i = 0; i < nitems(bios_vmode); ++i) { 1113 if (bios_vmode[i].vi_mode != adp->va_initial_mode && 1114 map_mode_num(bios_vmode[i].vi_mode) == 1115 adp->va_initial_mode && 1116 (bios_vmode[i].vi_width != width || 1117 bios_vmode[i].vi_height != 2 * height)) { 1118 bios_vmode[i].vi_mode = NA; 1119 } 1120 } 1121 break; 1122 } 1123 } 1124 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1125 1126 #ifndef VGA_NO_MODE_CHANGE 1127 adp->va_flags |= V_ADP_MODECHANGE; 1128 #endif 1129 #ifndef VGA_NO_FONT_LOADING 1130 adp->va_flags |= V_ADP_FONT; 1131 #endif 1132 } else if (adp->va_type == KD_EGA) { 1133 #if defined(VGA_NO_BIOS) || defined(VGA_NO_MODE_CHANGE) 1134 rows_offset = 1; 1135 #else /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1136 if (video_mode_ptr == NULL) { 1137 rows_offset = 1; 1138 } else { 1139 map_mode_table(mode_map, video_mode_ptr, M_ENH_C80x25 + 1); 1140 /* XXX how can one validate the EGA table... */ 1141 mp = get_mode_param(adp->va_initial_mode); 1142 if (mp != NULL) { 1143 adp->va_flags |= V_ADP_MODECHANGE; 1144 #ifndef VGA_NO_FONT_LOADING 1145 adp->va_flags |= V_ADP_FONT; 1146 #endif 1147 rows_offset = 1; 1148 } else { 1149 /* 1150 * This is serious. We will not be able to switch video 1151 * modes at all... 1152 */ 1153 video_mode_ptr = NULL; 1154 bzero(mode_map, sizeof(mode_map)); 1155 rows_offset = 1; 1156 } 1157 } 1158 #endif /* VGA_NO_BIOS || VGA_NO_MODE_CHANGE */ 1159 } 1160 } 1161 1162 /* remove conflicting modes if we have more than one adapter */ 1163 if (biosadapters > 0) { 1164 for (i = 0; i < biosadapters; ++i) { 1165 if (!(biosadapter[i].va_flags & V_ADP_MODECHANGE)) 1166 continue; 1167 clear_mode_map(&biosadapter[i], mode_map, M_VGA_CG320 + 1, 1168 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1169 V_INFO_COLOR : 0); 1170 if ((biosadapter[i].va_type == KD_VGA) 1171 || (biosadapter[i].va_type == KD_EGA)) { 1172 biosadapter[i].va_io_base = 1173 (biosadapter[i].va_flags & V_ADP_COLOR) ? 1174 IO_VGA : IO_MDA; 1175 biosadapter[i].va_io_size = 32; 1176 } 1177 } 1178 } 1179 1180 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 1181 /* 1182 * Attempt to determine the real character width for each mode. 9 wide 1183 * is supposed to be standard for EGA mono mode and most VGA text modes, 1184 * but some hardware doesn't support it, so dynamic configuration is 1185 * needed. Bit 0 in sequencer register 1 is supposed control the width 1186 * (set = 8), but this is unreliable too. Trust that 0 in the sequencer 1187 * bit means 9 wide after verifying that 9 is consistent with some CRTC 1188 * timing. The ratio (Horizontal Total) / (Horizontal Displayed) is 1189 * about 1.2 in all standard 9-wide modes and should be about 9/8 larger 1190 * again in similar 8-wide modes; in practice it is usually about 1.4 1191 * times larger. 1192 */ 1193 for (i = 0; i < nitems(bios_vmode); ++i) { 1194 if (bios_vmode[i].vi_mem_model == V_INFO_MM_TEXT && 1195 bios_vmode[i].vi_width != 90) { 1196 mp = get_mode_param(map_mode_num(bios_vmode[i].vi_mode)); 1197 if (mp != NULL && !(mp[5] & 1) && mp[10] <= mp[11] * 125 / 100) 1198 bios_vmode[i].vi_flags |= V_INFO_CWIDTH9; 1199 } 1200 } 1201 #endif 1202 1203 /* buffer address */ 1204 vga_get_info(&biosadapter[V_ADP_PRIMARY], 1205 biosadapter[V_ADP_PRIMARY].va_initial_mode, &info); 1206 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1207 update_adapter_info(&biosadapter[V_ADP_PRIMARY], &info); 1208 1209 if (biosadapters > 1) { 1210 vga_get_info(&biosadapter[V_ADP_SECONDARY], 1211 biosadapter[V_ADP_SECONDARY].va_initial_mode, &info); 1212 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1213 update_adapter_info(&biosadapter[V_ADP_SECONDARY], &info); 1214 } 1215 1216 /* 1217 * XXX: we should verify the following values for the primary adapter... 1218 * crtc I/O port address: *(u_int16_t *)BIOS_PADDRTOVADDR(0x463); 1219 * color/mono display: (*(u_int8_t *)BIOS_PADDRTOVADDR(0x487) & 0x02) 1220 * ? 0 : V_ADP_COLOR; 1221 * columns: *(u_int8_t *)BIOS_PADDRTOVADDR(0x44a); 1222 * rows: *(u_int8_t *)BIOS_PADDRTOVADDR(0x484); 1223 * font size: *(u_int8_t *)BIOS_PADDRTOVADDR(0x485); 1224 * buffer size: *(u_int16_t *)BIOS_PADDRTOVADDR(0x44c); 1225 */ 1226 1227 return biosadapters; 1228 } 1229 1230 /* set the scan line length in pixel */ 1231 static int 1232 set_line_length(video_adapter_t *adp, int pixel) 1233 { 1234 u_char *mp; 1235 int ppw; /* pixels per word */ 1236 int bpl; /* bytes per line */ 1237 int count; 1238 1239 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1240 return ENODEV; 1241 mp = get_mode_param(adp->va_mode); 1242 if (mp == NULL) 1243 return EINVAL; 1244 1245 switch (adp->va_info.vi_mem_model) { 1246 case V_INFO_MM_PLANAR: 1247 ppw = 16/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1248 count = howmany(pixel, ppw)/2; 1249 bpl = (howmany(pixel, ppw)/2)*4; 1250 break; 1251 case V_INFO_MM_PACKED: 1252 count = (pixel + 7)/8; 1253 bpl = rounddown(pixel + 7, 8); 1254 break; 1255 case V_INFO_MM_TEXT: 1256 count = (pixel + 7)/8; /* columns */ 1257 bpl = (pixel + 7)/8; /* columns */ 1258 break; 1259 default: 1260 return ENODEV; 1261 } 1262 1263 if (mp[10 + 0x17] & 0x40) /* CRTC mode control reg */ 1264 count *= 2; /* byte mode */ 1265 outb(adp->va_crtc_addr, 0x13); 1266 outb(adp->va_crtc_addr + 1, count); 1267 adp->va_line_width = bpl; 1268 1269 return 0; 1270 } 1271 1272 static int 1273 set_display_start(video_adapter_t *adp, int x, int y) 1274 { 1275 int off; /* byte offset (graphics mode)/word offset (text mode) */ 1276 int poff; /* pixel offset */ 1277 int roff; /* row offset */ 1278 int ppb; /* pixels per byte */ 1279 1280 if ((adp->va_type != KD_VGA) && (adp->va_type != KD_EGA)) 1281 x &= ~7; 1282 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) { 1283 ppb = 8/(adp->va_info.vi_depth/adp->va_info.vi_planes); 1284 off = y*adp->va_line_width + x/ppb; 1285 roff = 0; 1286 poff = x%ppb; 1287 } else { 1288 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1289 outb(TSIDX, 1); 1290 if (inb(TSREG) & 1) 1291 ppb = 9; 1292 else 1293 ppb = 8; 1294 } else { 1295 ppb = 8; 1296 } 1297 off = y/adp->va_info.vi_cheight*adp->va_line_width + x/ppb; 1298 roff = y%adp->va_info.vi_cheight; 1299 /* FIXME: is this correct? XXX */ 1300 if (ppb == 8) 1301 poff = x%ppb; 1302 else 1303 poff = (x + 8)%ppb; 1304 } 1305 1306 /* start address */ 1307 outb(adp->va_crtc_addr, 0xc); /* high */ 1308 outb(adp->va_crtc_addr + 1, off >> 8); 1309 outb(adp->va_crtc_addr, 0xd); /* low */ 1310 outb(adp->va_crtc_addr + 1, off & 0xff); 1311 1312 /* horizontal pel pan */ 1313 if ((adp->va_type == KD_VGA) || (adp->va_type == KD_EGA)) { 1314 inb(adp->va_crtc_addr + 6); 1315 outb(ATC, 0x13 | 0x20); 1316 outb(ATC, poff); 1317 inb(adp->va_crtc_addr + 6); 1318 outb(ATC, 0x20); 1319 } 1320 1321 /* preset raw scan */ 1322 outb(adp->va_crtc_addr, 8); 1323 outb(adp->va_crtc_addr + 1, roff); 1324 1325 adp->va_disp_start.x = x; 1326 adp->va_disp_start.y = y; 1327 return 0; 1328 } 1329 1330 #ifndef VGA_NO_MODE_CHANGE 1331 #if defined(__i386__) || defined(__amd64__) /* XXX */ 1332 static void 1333 fill(int val, void *d, size_t size) 1334 { 1335 u_char *p = d; 1336 1337 while (size-- > 0) 1338 *p++ = val; 1339 } 1340 #endif /* __i386__ */ 1341 1342 static void 1343 filll_io(int val, vm_offset_t d, size_t size) 1344 { 1345 while (size-- > 0) { 1346 writel(d, val); 1347 d += sizeof(u_int32_t); 1348 } 1349 } 1350 #endif /* !VGA_NO_MODE_CHANGE */ 1351 1352 /* entry points */ 1353 1354 #if 0 1355 static int 1356 vga_nop(void) 1357 { 1358 return 0; 1359 } 1360 #endif 1361 1362 static int 1363 vga_error(void) 1364 { 1365 return ENODEV; 1366 } 1367 1368 static int 1369 vga_probe(int unit, video_adapter_t **adpp, void *arg, int flags) 1370 { 1371 probe_adapters(); 1372 if (unit >= biosadapters) 1373 return ENXIO; 1374 1375 *adpp = &biosadapter[unit]; 1376 1377 return 0; 1378 } 1379 1380 static int 1381 vga_init(int unit, video_adapter_t *adp, int flags) 1382 { 1383 if ((unit >= biosadapters) || (adp == NULL) || !probe_done(adp)) 1384 return ENXIO; 1385 1386 if (!init_done(adp)) { 1387 /* nothing to do really... */ 1388 adp->va_flags |= V_ADP_INITIALIZED; 1389 } 1390 1391 if (!config_done(adp)) { 1392 if (vid_register(adp) < 0) 1393 return ENXIO; 1394 adp->va_flags |= V_ADP_REGISTERED; 1395 } 1396 if (vga_sub_configure != NULL) 1397 (*vga_sub_configure)(0); 1398 1399 return 0; 1400 } 1401 1402 /* 1403 * get_info(): 1404 * Return the video_info structure of the requested video mode. 1405 * 1406 * all adapters 1407 */ 1408 static int 1409 vga_get_info(video_adapter_t *adp, int mode, video_info_t *info) 1410 { 1411 int i; 1412 1413 if (!vga_init_done) 1414 return ENXIO; 1415 1416 mode = map_gen_mode_num(adp->va_type, adp->va_flags & V_ADP_COLOR, mode); 1417 #ifndef VGA_NO_MODE_CHANGE 1418 if (adp->va_flags & V_ADP_MODECHANGE) { 1419 /* 1420 * If the parameter table entry for this mode is not found, 1421 * the mode is not supported... 1422 */ 1423 if (get_mode_param(mode) == NULL) 1424 return EINVAL; 1425 } else 1426 #endif /* VGA_NO_MODE_CHANGE */ 1427 { 1428 /* 1429 * Even if we don't support video mode switching on this adapter, 1430 * the information on the initial (thus current) video mode 1431 * should be made available. 1432 */ 1433 if (mode != adp->va_initial_mode) 1434 return EINVAL; 1435 } 1436 1437 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1438 if (bios_vmode[i].vi_mode == NA) 1439 continue; 1440 if (mode == bios_vmode[i].vi_mode) { 1441 *info = bios_vmode[i]; 1442 /* XXX */ 1443 info->vi_buffer_size = info->vi_window_size*info->vi_planes; 1444 return 0; 1445 } 1446 } 1447 return EINVAL; 1448 } 1449 1450 /* 1451 * query_mode(): 1452 * Find a video mode matching the requested parameters. 1453 * Fields filled with 0 are considered "don't care" fields and 1454 * match any modes. 1455 * 1456 * all adapters 1457 */ 1458 static int 1459 vga_query_mode(video_adapter_t *adp, video_info_t *info) 1460 { 1461 int i; 1462 1463 if (!vga_init_done) 1464 return ENXIO; 1465 1466 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 1467 if (bios_vmode[i].vi_mode == NA) 1468 continue; 1469 1470 if ((info->vi_width != 0) 1471 && (info->vi_width != bios_vmode[i].vi_width)) 1472 continue; 1473 if ((info->vi_height != 0) 1474 && (info->vi_height != bios_vmode[i].vi_height)) 1475 continue; 1476 if ((info->vi_cwidth != 0) 1477 && (info->vi_cwidth != bios_vmode[i].vi_cwidth)) 1478 continue; 1479 if ((info->vi_cheight != 0) 1480 && (info->vi_cheight != bios_vmode[i].vi_cheight)) 1481 continue; 1482 if ((info->vi_depth != 0) 1483 && (info->vi_depth != bios_vmode[i].vi_depth)) 1484 continue; 1485 if ((info->vi_planes != 0) 1486 && (info->vi_planes != bios_vmode[i].vi_planes)) 1487 continue; 1488 /* XXX: should check pixel format, memory model */ 1489 if ((info->vi_flags != 0) 1490 && (info->vi_flags != bios_vmode[i].vi_flags)) 1491 continue; 1492 1493 /* verify if this mode is supported on this adapter */ 1494 if (vga_get_info(adp, bios_vmode[i].vi_mode, info)) 1495 continue; 1496 return 0; 1497 } 1498 return ENODEV; 1499 } 1500 1501 /* 1502 * set_mode(): 1503 * Change the video mode. 1504 * 1505 * EGA/VGA 1506 */ 1507 1508 #ifndef VGA_NO_MODE_CHANGE 1509 #ifdef VGA_WIDTH90 1510 static void 1511 set_width90(adp_state_t *params) 1512 { 1513 /* 1514 * Based on code submitted by Kelly Yancey (kbyanc@freedomnet.com) 1515 * and alexv@sui.gda.itesm.mx. 1516 */ 1517 params->regs[5] |= 1; /* toggle 8 pixel wide fonts */ 1518 params->regs[10+0x0] = 0x6b; 1519 params->regs[10+0x1] = 0x59; 1520 params->regs[10+0x2] = 0x5a; 1521 params->regs[10+0x3] = 0x8e; 1522 params->regs[10+0x4] = 0x5e; 1523 params->regs[10+0x5] = 0x8a; 1524 params->regs[10+0x13] = 45; 1525 params->regs[35+0x13] = 0; 1526 } 1527 #endif /* VGA_WIDTH90 */ 1528 #endif /* !VGA_NO_MODE_CHANGE */ 1529 1530 static int 1531 vga_set_mode(video_adapter_t *adp, int mode) 1532 { 1533 #ifndef VGA_NO_MODE_CHANGE 1534 video_info_t info; 1535 adp_state_t params; 1536 1537 prologue(adp, V_ADP_MODECHANGE, ENODEV); 1538 1539 mode = map_gen_mode_num(adp->va_type, 1540 adp->va_flags & V_ADP_COLOR, mode); 1541 if (vga_get_info(adp, mode, &info)) 1542 return EINVAL; 1543 1544 #if VGA_DEBUG > 1 1545 printf("vga_set_mode(): setting mode %d\n", mode); 1546 #endif 1547 1548 params.sig = V_STATE_SIG; 1549 bcopy(get_mode_param(mode), params.regs, sizeof(params.regs)); 1550 1551 switch (mode) { 1552 #ifdef VGA_WIDTH90 1553 case M_VGA_C90x60: case M_VGA_M90x60: 1554 set_width90(¶ms); 1555 /* FALLTHROUGH */ 1556 #endif 1557 case M_VGA_C80x60: case M_VGA_M80x60: 1558 params.regs[2] = 0x08; 1559 params.regs[19] = 0x47; 1560 goto special_480l; 1561 1562 #ifdef VGA_WIDTH90 1563 case M_VGA_C90x30: case M_VGA_M90x30: 1564 set_width90(¶ms); 1565 /* FALLTHROUGH */ 1566 #endif 1567 case M_VGA_C80x30: case M_VGA_M80x30: 1568 params.regs[19] = 0x4f; 1569 special_480l: 1570 params.regs[9] |= 0xc0; 1571 params.regs[16] = 0x08; 1572 params.regs[17] = 0x3e; 1573 params.regs[26] = 0xea; 1574 params.regs[28] = 0xdf; 1575 params.regs[31] = 0xe7; 1576 params.regs[32] = 0x04; 1577 goto setup_mode; 1578 1579 #ifdef VGA_WIDTH90 1580 case M_VGA_C90x43: case M_VGA_M90x43: 1581 set_width90(¶ms); 1582 /* FALLTHROUGH */ 1583 #endif 1584 case M_ENH_C80x43: case M_ENH_B80x43: 1585 params.regs[28] = 87; 1586 goto special_80x50; 1587 1588 #ifdef VGA_WIDTH90 1589 case M_VGA_C90x50: case M_VGA_M90x50: 1590 set_width90(¶ms); 1591 /* FALLTHROUGH */ 1592 #endif 1593 case M_VGA_C80x50: case M_VGA_M80x50: 1594 special_80x50: 1595 params.regs[2] = 8; 1596 params.regs[19] = 7; 1597 goto setup_mode; 1598 1599 #ifdef VGA_WIDTH90 1600 case M_VGA_C90x25: case M_VGA_M90x25: 1601 set_width90(¶ms); 1602 /* FALLTHROUGH */ 1603 #endif 1604 case M_VGA_C40x25: case M_VGA_C80x25: 1605 case M_VGA_M80x25: 1606 case M_B40x25: case M_C40x25: 1607 case M_B80x25: case M_C80x25: 1608 case M_ENH_B40x25: case M_ENH_C40x25: 1609 case M_ENH_B80x25: case M_ENH_C80x25: 1610 case M_EGAMONO80x25: 1611 1612 setup_mode: 1613 vga_load_state(adp, ¶ms); 1614 break; 1615 1616 case M_VGA_MODEX: 1617 /* "unchain" the VGA mode */ 1618 params.regs[5-1+0x04] &= 0xf7; 1619 params.regs[5-1+0x04] |= 0x04; 1620 /* turn off doubleword mode */ 1621 params.regs[10+0x14] &= 0xbf; 1622 /* turn off word addressing */ 1623 params.regs[10+0x17] |= 0x40; 1624 /* set logical screen width */ 1625 params.regs[10+0x13] = 80; 1626 /* set 240 lines */ 1627 params.regs[10+0x11] = 0x2c; 1628 params.regs[10+0x06] = 0x0d; 1629 params.regs[10+0x07] = 0x3e; 1630 params.regs[10+0x10] = 0xea; 1631 params.regs[10+0x11] = 0xac; 1632 params.regs[10+0x12] = 0xdf; 1633 params.regs[10+0x15] = 0xe7; 1634 params.regs[10+0x16] = 0x06; 1635 /* set vertical sync polarity to reflect aspect ratio */ 1636 params.regs[9] = 0xe3; 1637 goto setup_grmode; 1638 1639 case M_BG320: case M_CG320: case M_BG640: 1640 case M_CG320_D: case M_CG640_E: 1641 case M_CG640x350: case M_ENH_CG640: 1642 case M_BG640x480: case M_CG640x480: case M_VGA_CG320: 1643 1644 setup_grmode: 1645 vga_load_state(adp, ¶ms); 1646 break; 1647 1648 default: 1649 return EINVAL; 1650 } 1651 1652 adp->va_mode = mode; 1653 info.vi_flags &= ~V_INFO_LINEAR; /* XXX */ 1654 update_adapter_info(adp, &info); 1655 1656 /* move hardware cursor out of the way */ 1657 vidd_set_hw_cursor(adp, -1, -1); 1658 1659 return 0; 1660 #else /* VGA_NO_MODE_CHANGE */ 1661 return ENODEV; 1662 #endif /* VGA_NO_MODE_CHANGE */ 1663 } 1664 1665 #ifndef VGA_NO_FONT_LOADING 1666 1667 static void 1668 set_font_mode(video_adapter_t *adp, u_char *buf) 1669 { 1670 u_char *mp; 1671 int s; 1672 1673 s = splhigh(); 1674 1675 /* save register values */ 1676 if (adp->va_type == KD_VGA) { 1677 outb(TSIDX, 0x02); buf[0] = inb(TSREG); 1678 outb(TSIDX, 0x04); buf[1] = inb(TSREG); 1679 outb(GDCIDX, 0x04); buf[2] = inb(GDCREG); 1680 outb(GDCIDX, 0x05); buf[3] = inb(GDCREG); 1681 outb(GDCIDX, 0x06); buf[4] = inb(GDCREG); 1682 inb(adp->va_crtc_addr + 6); 1683 outb(ATC, 0x10); buf[5] = inb(ATC + 1); 1684 } else /* if (adp->va_type == KD_EGA) */ { 1685 /* 1686 * EGA cannot be read; copy parameters from the mode parameter 1687 * table. 1688 */ 1689 mp = get_mode_param(adp->va_mode); 1690 buf[0] = mp[5 + 0x02 - 1]; 1691 buf[1] = mp[5 + 0x04 - 1]; 1692 buf[2] = mp[55 + 0x04]; 1693 buf[3] = mp[55 + 0x05]; 1694 buf[4] = mp[55 + 0x06]; 1695 buf[5] = mp[35 + 0x10]; 1696 } 1697 1698 /* setup vga for loading fonts */ 1699 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1700 outb(ATC, 0x10); outb(ATC, buf[5] & ~0x01); 1701 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1702 outb(ATC, 0x20); /* enable palette */ 1703 1704 #ifdef VGA_SLOW_IOACCESS 1705 #ifdef VGA_ALT_SEQACCESS 1706 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1707 #endif 1708 outb(TSIDX, 0x02); outb(TSREG, 0x04); 1709 outb(TSIDX, 0x04); outb(TSREG, 0x07); 1710 #ifdef VGA_ALT_SEQACCESS 1711 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1712 #endif 1713 outb(GDCIDX, 0x04); outb(GDCREG, 0x02); 1714 outb(GDCIDX, 0x05); outb(GDCREG, 0x00); 1715 outb(GDCIDX, 0x06); outb(GDCREG, 0x04); 1716 #else /* VGA_SLOW_IOACCESS */ 1717 #ifdef VGA_ALT_SEQACCESS 1718 outw(TSIDX, 0x0100); 1719 #endif 1720 outw(TSIDX, 0x0402); 1721 outw(TSIDX, 0x0704); 1722 #ifdef VGA_ALT_SEQACCESS 1723 outw(TSIDX, 0x0300); 1724 #endif 1725 outw(GDCIDX, 0x0204); 1726 outw(GDCIDX, 0x0005); 1727 outw(GDCIDX, 0x0406); /* addr = a0000, 64kb */ 1728 #endif /* VGA_SLOW_IOACCESS */ 1729 1730 splx(s); 1731 } 1732 1733 static void 1734 set_normal_mode(video_adapter_t *adp, u_char *buf) 1735 { 1736 int s; 1737 1738 s = splhigh(); 1739 1740 /* setup vga for normal operation mode again */ 1741 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1742 outb(ATC, 0x10); outb(ATC, buf[5]); 1743 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 1744 outb(ATC, 0x20); /* enable palette */ 1745 1746 #ifdef VGA_SLOW_IOACCESS 1747 #ifdef VGA_ALT_SEQACCESS 1748 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1749 #endif 1750 outb(TSIDX, 0x02); outb(TSREG, buf[0]); 1751 outb(TSIDX, 0x04); outb(TSREG, buf[1]); 1752 #ifdef VGA_ALT_SEQACCESS 1753 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1754 #endif 1755 outb(GDCIDX, 0x04); outb(GDCREG, buf[2]); 1756 outb(GDCIDX, 0x05); outb(GDCREG, buf[3]); 1757 if (adp->va_crtc_addr == MONO_CRTC) { 1758 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x08); 1759 } else { 1760 outb(GDCIDX, 0x06); outb(GDCREG,(buf[4] & 0x03) | 0x0c); 1761 } 1762 #else /* VGA_SLOW_IOACCESS */ 1763 #ifdef VGA_ALT_SEQACCESS 1764 outw(TSIDX, 0x0100); 1765 #endif 1766 outw(TSIDX, 0x0002 | (buf[0] << 8)); 1767 outw(TSIDX, 0x0004 | (buf[1] << 8)); 1768 #ifdef VGA_ALT_SEQACCESS 1769 outw(TSIDX, 0x0300); 1770 #endif 1771 outw(GDCIDX, 0x0004 | (buf[2] << 8)); 1772 outw(GDCIDX, 0x0005 | (buf[3] << 8)); 1773 if (adp->va_crtc_addr == MONO_CRTC) 1774 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x08)<<8)); 1775 else 1776 outw(GDCIDX, 0x0006 | (((buf[4] & 0x03) | 0x0c)<<8)); 1777 #endif /* VGA_SLOW_IOACCESS */ 1778 1779 splx(s); 1780 } 1781 1782 #endif /* VGA_NO_FONT_LOADING */ 1783 1784 /* 1785 * save_font(): 1786 * Read the font data in the requested font page from the video adapter. 1787 * 1788 * EGA/VGA 1789 */ 1790 static int 1791 vga_save_font(video_adapter_t *adp, int page, int fontsize, int fontwidth, 1792 u_char *data, int ch, int count) 1793 { 1794 #ifndef VGA_NO_FONT_LOADING 1795 u_char buf[PARAM_BUFSIZE]; 1796 vm_offset_t segment; 1797 int c; 1798 #ifdef VGA_ALT_SEQACCESS 1799 int s; 1800 u_char val = 0; 1801 #endif 1802 1803 prologue(adp, V_ADP_FONT, ENODEV); 1804 1805 if (fontsize < 14) { 1806 /* FONT_8 */ 1807 fontsize = 8; 1808 } else if (fontsize >= 32) { 1809 fontsize = 32; 1810 } else if (fontsize >= 16) { 1811 /* FONT_16 */ 1812 fontsize = 16; 1813 } else { 1814 /* FONT_14 */ 1815 fontsize = 14; 1816 } 1817 1818 if (page < 0 || page >= 8 || fontwidth != 8) 1819 return EINVAL; 1820 segment = FONT_BUF + 0x4000*page; 1821 if (page > 3) 1822 segment -= 0xe000; 1823 1824 #ifdef VGA_ALT_SEQACCESS 1825 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1826 s = splhigh(); 1827 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1828 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1829 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1830 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1831 splx(s); 1832 } 1833 #endif 1834 1835 set_font_mode(adp, buf); 1836 if (fontsize == 32) { 1837 bcopy_fromio((uintptr_t)segment + ch*32, data, fontsize*count); 1838 } else { 1839 for (c = ch; count > 0; ++c, --count) { 1840 bcopy_fromio((uintptr_t)segment + c*32, data, fontsize); 1841 data += fontsize; 1842 } 1843 } 1844 set_normal_mode(adp, buf); 1845 1846 #ifdef VGA_ALT_SEQACCESS 1847 if (adp->va_type == KD_VGA) { 1848 s = splhigh(); 1849 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1850 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1851 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1852 splx(s); 1853 } 1854 #endif 1855 1856 return 0; 1857 #else /* VGA_NO_FONT_LOADING */ 1858 return ENODEV; 1859 #endif /* VGA_NO_FONT_LOADING */ 1860 } 1861 1862 /* 1863 * load_font(): 1864 * Set the font data in the requested font page. 1865 * NOTE: it appears that some recent video adapters do not support 1866 * the font page other than 0... XXX 1867 * 1868 * EGA/VGA 1869 */ 1870 static int 1871 vga_load_font(video_adapter_t *adp, int page, int fontsize, int fontwidth, 1872 u_char *data, int ch, int count) 1873 { 1874 #ifndef VGA_NO_FONT_LOADING 1875 u_char buf[PARAM_BUFSIZE]; 1876 vm_offset_t segment; 1877 int c; 1878 #ifdef VGA_ALT_SEQACCESS 1879 int s; 1880 u_char val = 0; 1881 #endif 1882 1883 prologue(adp, V_ADP_FONT, ENODEV); 1884 1885 if (fontsize < 14) { 1886 /* FONT_8 */ 1887 fontsize = 8; 1888 } else if (fontsize >= 32) { 1889 fontsize = 32; 1890 } else if (fontsize >= 16) { 1891 /* FONT_16 */ 1892 fontsize = 16; 1893 } else { 1894 /* FONT_14 */ 1895 fontsize = 14; 1896 } 1897 1898 if (page < 0 || page >= 8 || fontwidth != 8) 1899 return EINVAL; 1900 segment = FONT_BUF + 0x4000*page; 1901 if (page > 3) 1902 segment -= 0xe000; 1903 1904 #ifdef VGA_ALT_SEQACCESS 1905 if (adp->va_type == KD_VGA) { /* what about EGA? XXX */ 1906 s = splhigh(); 1907 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1908 outb(TSIDX, 0x01); val = inb(TSREG); /* disable screen */ 1909 outb(TSIDX, 0x01); outb(TSREG, val | 0x20); 1910 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1911 splx(s); 1912 } 1913 #endif 1914 1915 set_font_mode(adp, buf); 1916 if (fontsize == 32) { 1917 bcopy_toio(data, (uintptr_t)segment + ch*32, fontsize*count); 1918 } else { 1919 for (c = ch; count > 0; ++c, --count) { 1920 bcopy_toio(data, (uintptr_t)segment + c*32, fontsize); 1921 data += fontsize; 1922 } 1923 } 1924 set_normal_mode(adp, buf); 1925 1926 #ifdef VGA_ALT_SEQACCESS 1927 if (adp->va_type == KD_VGA) { 1928 s = splhigh(); 1929 outb(TSIDX, 0x00); outb(TSREG, 0x01); 1930 outb(TSIDX, 0x01); outb(TSREG, val & 0xdf); /* enable screen */ 1931 outb(TSIDX, 0x00); outb(TSREG, 0x03); 1932 splx(s); 1933 } 1934 #endif 1935 1936 return 0; 1937 #else /* VGA_NO_FONT_LOADING */ 1938 return ENODEV; 1939 #endif /* VGA_NO_FONT_LOADING */ 1940 } 1941 1942 /* 1943 * show_font(): 1944 * Activate the requested font page. 1945 * NOTE: it appears that some recent video adapters do not support 1946 * the font page other than 0... XXX 1947 * 1948 * EGA/VGA 1949 */ 1950 static int 1951 vga_show_font(video_adapter_t *adp, int page) 1952 { 1953 #ifndef VGA_NO_FONT_LOADING 1954 static u_char cg[] = { 0x00, 0x05, 0x0a, 0x0f, 0x30, 0x35, 0x3a, 0x3f }; 1955 int s; 1956 1957 prologue(adp, V_ADP_FONT, ENODEV); 1958 if (page < 0 || page >= 8) 1959 return EINVAL; 1960 1961 s = splhigh(); 1962 outb(TSIDX, 0x03); outb(TSREG, cg[page]); 1963 splx(s); 1964 1965 return 0; 1966 #else /* VGA_NO_FONT_LOADING */ 1967 return ENODEV; 1968 #endif /* VGA_NO_FONT_LOADING */ 1969 } 1970 1971 /* 1972 * save_palette(): 1973 * Read DAC values. The values have expressed in 8 bits. 1974 * 1975 * VGA 1976 */ 1977 static int 1978 vga_save_palette(video_adapter_t *adp, u_char *palette) 1979 { 1980 int bits; 1981 int i; 1982 1983 prologue(adp, V_ADP_PALETTE, ENODEV); 1984 1985 /* 1986 * We store 8 bit values in the palette buffer, while the standard 1987 * VGA has 6 bit DAC . 1988 */ 1989 outb(PALRADR, 0x00); 1990 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 1991 for (i = 0; i < 256*3; ++i) 1992 palette[i] = inb(PALDATA) << bits; 1993 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 1994 return 0; 1995 } 1996 1997 static int 1998 vga_save_palette2(video_adapter_t *adp, int base, int count, 1999 u_char *r, u_char *g, u_char *b) 2000 { 2001 int bits; 2002 int i; 2003 2004 prologue(adp, V_ADP_PALETTE, ENODEV); 2005 2006 outb(PALRADR, base); 2007 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2008 for (i = 0; i < count; ++i) { 2009 r[i] = inb(PALDATA) << bits; 2010 g[i] = inb(PALDATA) << bits; 2011 b[i] = inb(PALDATA) << bits; 2012 } 2013 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2014 return 0; 2015 } 2016 2017 /* 2018 * load_palette(): 2019 * Set DAC values. 2020 * 2021 * VGA 2022 */ 2023 static int 2024 vga_load_palette(video_adapter_t *adp, u_char *palette) 2025 { 2026 int bits; 2027 int i; 2028 2029 prologue(adp, V_ADP_PALETTE, ENODEV); 2030 2031 outb(PIXMASK, 0xff); /* no pixelmask */ 2032 outb(PALWADR, 0x00); 2033 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2034 for (i = 0; i < 256*3; ++i) 2035 outb(PALDATA, palette[i] >> bits); 2036 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2037 outb(ATC, 0x20); /* enable palette */ 2038 return 0; 2039 } 2040 2041 static int 2042 vga_load_palette2(video_adapter_t *adp, int base, int count, 2043 u_char *r, u_char *g, u_char *b) 2044 { 2045 int bits; 2046 int i; 2047 2048 prologue(adp, V_ADP_PALETTE, ENODEV); 2049 2050 outb(PIXMASK, 0xff); /* no pixelmask */ 2051 outb(PALWADR, base); 2052 bits = (adp->va_flags & V_ADP_DAC8) != 0 ? 0 : 2; 2053 for (i = 0; i < count; ++i) { 2054 outb(PALDATA, r[i] >> bits); 2055 outb(PALDATA, g[i] >> bits); 2056 outb(PALDATA, b[i] >> bits); 2057 } 2058 inb(adp->va_crtc_addr + 6); /* reset flip/flop */ 2059 outb(ATC, 0x20); /* enable palette */ 2060 return 0; 2061 } 2062 2063 /* 2064 * set_border(): 2065 * Change the border color. 2066 * 2067 * CGA/EGA/VGA 2068 */ 2069 static int 2070 vga_set_border(video_adapter_t *adp, int color) 2071 { 2072 prologue(adp, V_ADP_BORDER, ENODEV); 2073 2074 switch (adp->va_type) { 2075 case KD_EGA: 2076 case KD_VGA: 2077 inb(adp->va_crtc_addr + 6); /* reset flip-flop */ 2078 outb(ATC, 0x31); outb(ATC, color & 0xff); 2079 break; 2080 case KD_CGA: 2081 outb(adp->va_crtc_addr + 5, color & 0x0f); /* color select register */ 2082 break; 2083 case KD_MONO: 2084 case KD_HERCULES: 2085 default: 2086 break; 2087 } 2088 return 0; 2089 } 2090 2091 /* 2092 * save_state(): 2093 * Read video register values. 2094 * NOTE: this function only reads the standard EGA/VGA registers. 2095 * any extra/extended registers of SVGA adapters are not saved. 2096 * 2097 * VGA 2098 */ 2099 static int 2100 vga_save_state(video_adapter_t *adp, void *p, size_t size) 2101 { 2102 video_info_t info; 2103 u_char *buf; 2104 int crtc_addr; 2105 int i, j; 2106 int s; 2107 2108 if (size == 0) { 2109 /* return the required buffer size */ 2110 prologue(adp, V_ADP_STATESAVE, 0); 2111 return sizeof(adp_state_t); 2112 } else { 2113 prologue(adp, V_ADP_STATESAVE, ENODEV); 2114 if (size < sizeof(adp_state_t)) 2115 return EINVAL; 2116 } 2117 2118 ((adp_state_t *)p)->sig = V_STATE_SIG; 2119 buf = ((adp_state_t *)p)->regs; 2120 bzero(buf, V_MODE_PARAM_SIZE); 2121 crtc_addr = adp->va_crtc_addr; 2122 2123 s = splhigh(); 2124 2125 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2126 for (i = 0, j = 5; i < 4; i++) { 2127 outb(TSIDX, i + 1); 2128 buf[j++] = inb(TSREG); 2129 } 2130 buf[9] = inb(MISC + 10); /* dot-clock */ 2131 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2132 2133 for (i = 0, j = 10; i < 25; i++) { /* crtc */ 2134 outb(crtc_addr, i); 2135 buf[j++] = inb(crtc_addr + 1); 2136 } 2137 for (i = 0, j = 35; i < 20; i++) { /* attribute ctrl */ 2138 inb(crtc_addr + 6); /* reset flip-flop */ 2139 outb(ATC, i); 2140 buf[j++] = inb(ATC + 1); 2141 } 2142 for (i = 0, j = 55; i < 9; i++) { /* graph data ctrl */ 2143 outb(GDCIDX, i); 2144 buf[j++] = inb(GDCREG); 2145 } 2146 inb(crtc_addr + 6); /* reset flip-flop */ 2147 outb(ATC, 0x20); /* enable palette */ 2148 2149 splx(s); 2150 2151 #if 1 2152 if (vga_get_info(adp, adp->va_mode, &info) == 0) { 2153 if (info.vi_flags & V_INFO_GRAPHICS) { 2154 buf[0] = info.vi_width/info.vi_cwidth; /* COLS */ 2155 buf[1] = info.vi_height/info.vi_cheight - 1; /* ROWS */ 2156 } else { 2157 buf[0] = info.vi_width; /* COLS */ 2158 buf[1] = info.vi_height - 1; /* ROWS */ 2159 } 2160 buf[2] = info.vi_cheight; /* POINTS */ 2161 } 2162 #else 2163 buf[0] = readb(BIOS_PADDRTOVADDR(0x44a)); /* COLS */ 2164 buf[1] = readb(BIOS_PADDRTOVADDR(0x484)); /* ROWS */ 2165 buf[2] = readb(BIOS_PADDRTOVADDR(0x485)); /* POINTS */ 2166 buf[3] = readb(BIOS_PADDRTOVADDR(0x44c)); 2167 buf[4] = readb(BIOS_PADDRTOVADDR(0x44d)); 2168 #endif 2169 2170 return 0; 2171 } 2172 2173 /* 2174 * load_state(): 2175 * Set video registers at once. 2176 * NOTE: this function only updates the standard EGA/VGA registers. 2177 * any extra/extended registers of SVGA adapters are not changed. 2178 * 2179 * EGA/VGA 2180 */ 2181 static int 2182 vga_load_state(video_adapter_t *adp, void *p) 2183 { 2184 u_char *buf; 2185 int crtc_addr; 2186 int s; 2187 int i; 2188 2189 prologue(adp, V_ADP_STATELOAD, ENODEV); 2190 if (((adp_state_t *)p)->sig != V_STATE_SIG) 2191 return EINVAL; 2192 2193 buf = ((adp_state_t *)p)->regs; 2194 crtc_addr = adp->va_crtc_addr; 2195 2196 #if VGA_DEBUG > 1 2197 dump_buffer(buf, V_MODE_PARAM_SIZE); 2198 #endif 2199 2200 s = splhigh(); 2201 2202 outb(TSIDX, 0x00); outb(TSREG, 0x01); /* stop sequencer */ 2203 for (i = 0; i < 4; ++i) { /* program sequencer */ 2204 outb(TSIDX, i + 1); 2205 outb(TSREG, buf[i + 5]); 2206 } 2207 outb(MISC, buf[9]); /* set dot-clock */ 2208 outb(TSIDX, 0x00); outb(TSREG, 0x03); /* start sequencer */ 2209 outb(crtc_addr, 0x11); 2210 outb(crtc_addr + 1, inb(crtc_addr + 1) & 0x7F); 2211 for (i = 0; i < 25; ++i) { /* program crtc */ 2212 outb(crtc_addr, i); 2213 outb(crtc_addr + 1, buf[i + 10]); 2214 } 2215 inb(crtc_addr+6); /* reset flip-flop */ 2216 for (i = 0; i < 20; ++i) { /* program attribute ctrl */ 2217 outb(ATC, i); 2218 outb(ATC, buf[i + 35]); 2219 } 2220 for (i = 0; i < 9; ++i) { /* program graph data ctrl */ 2221 outb(GDCIDX, i); 2222 outb(GDCREG, buf[i + 55]); 2223 } 2224 inb(crtc_addr + 6); /* reset flip-flop */ 2225 outb(ATC, 0x20); /* enable palette */ 2226 2227 #ifdef notyet /* a temporary workaround for kernel panic, XXX */ 2228 #ifndef VGA_NO_BIOS 2229 if (adp->va_unit == V_ADP_PRIMARY) { 2230 writeb(BIOS_PADDRTOVADDR(0x44a), buf[0]); /* COLS */ 2231 writeb(BIOS_PADDRTOVADDR(0x484), buf[1] + rows_offset - 1); /* ROWS */ 2232 writeb(BIOS_PADDRTOVADDR(0x485), buf[2]); /* POINTS */ 2233 #if 0 2234 writeb(BIOS_PADDRTOVADDR(0x44c), buf[3]); 2235 writeb(BIOS_PADDRTOVADDR(0x44d), buf[4]); 2236 #endif 2237 } 2238 #endif /* VGA_NO_BIOS */ 2239 #endif /* notyet */ 2240 2241 splx(s); 2242 return 0; 2243 } 2244 2245 /* 2246 * set_origin(): 2247 * Change the origin (window mapping) of the banked frame buffer. 2248 */ 2249 static int 2250 vga_set_origin(video_adapter_t *adp, off_t offset) 2251 { 2252 /* 2253 * The standard video modes do not require window mapping; 2254 * always return error. 2255 */ 2256 return ENODEV; 2257 } 2258 2259 /* 2260 * read_hw_cursor(): 2261 * Read the position of the hardware text cursor. 2262 * 2263 * all adapters 2264 */ 2265 static int 2266 vga_read_hw_cursor(video_adapter_t *adp, int *col, int *row) 2267 { 2268 u_int16_t off; 2269 int s; 2270 2271 if (!vga_init_done) 2272 return ENXIO; 2273 2274 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2275 return ENODEV; 2276 2277 s = spltty(); 2278 outb(adp->va_crtc_addr, 14); 2279 off = inb(adp->va_crtc_addr + 1); 2280 outb(adp->va_crtc_addr, 15); 2281 off = (off << 8) | inb(adp->va_crtc_addr + 1); 2282 splx(s); 2283 2284 *row = off / adp->va_info.vi_width; 2285 *col = off % adp->va_info.vi_width; 2286 2287 return 0; 2288 } 2289 2290 /* 2291 * set_hw_cursor(): 2292 * Move the hardware text cursor. If col and row are both -1, 2293 * the cursor won't be shown. 2294 * 2295 * all adapters 2296 */ 2297 static int 2298 vga_set_hw_cursor(video_adapter_t *adp, int col, int row) 2299 { 2300 u_int16_t off; 2301 int s; 2302 2303 if (!vga_init_done) 2304 return ENXIO; 2305 2306 if ((col == -1) && (row == -1)) { 2307 off = -1; 2308 } else { 2309 if (adp->va_info.vi_flags & V_INFO_GRAPHICS) 2310 return ENODEV; 2311 off = row*adp->va_info.vi_width + col; 2312 } 2313 2314 s = spltty(); 2315 outb(adp->va_crtc_addr, 14); 2316 outb(adp->va_crtc_addr + 1, off >> 8); 2317 outb(adp->va_crtc_addr, 15); 2318 outb(adp->va_crtc_addr + 1, off & 0x00ff); 2319 splx(s); 2320 2321 return 0; 2322 } 2323 2324 /* 2325 * set_hw_cursor_shape(): 2326 * Change the shape of the hardware text cursor. If the height is 2327 * zero or negative, the cursor won't be shown. 2328 * 2329 * all adapters 2330 */ 2331 static int 2332 vga_set_hw_cursor_shape(video_adapter_t *adp, int base, int height, 2333 int celsize, int blink) 2334 { 2335 int s; 2336 2337 if (!vga_init_done) 2338 return ENXIO; 2339 2340 s = spltty(); 2341 switch (adp->va_type) { 2342 case KD_VGA: 2343 case KD_CGA: 2344 case KD_MONO: 2345 case KD_HERCULES: 2346 default: 2347 if (height <= 0) { 2348 /* make the cursor invisible */ 2349 outb(adp->va_crtc_addr, 10); 2350 outb(adp->va_crtc_addr + 1, 32); 2351 outb(adp->va_crtc_addr, 11); 2352 outb(adp->va_crtc_addr + 1, 0); 2353 } else { 2354 outb(adp->va_crtc_addr, 10); 2355 outb(adp->va_crtc_addr + 1, celsize - base - height); 2356 outb(adp->va_crtc_addr, 11); 2357 outb(adp->va_crtc_addr + 1, celsize - base - 1); 2358 } 2359 break; 2360 case KD_EGA: 2361 if (height <= 0) { 2362 /* make the cursor invisible */ 2363 outb(adp->va_crtc_addr, 10); 2364 outb(adp->va_crtc_addr + 1, celsize); 2365 outb(adp->va_crtc_addr, 11); 2366 outb(adp->va_crtc_addr + 1, 0); 2367 } else { 2368 outb(adp->va_crtc_addr, 10); 2369 outb(adp->va_crtc_addr + 1, celsize - base - height); 2370 outb(adp->va_crtc_addr, 11); 2371 outb(adp->va_crtc_addr + 1, celsize - base); 2372 } 2373 break; 2374 } 2375 splx(s); 2376 2377 return 0; 2378 } 2379 2380 /* 2381 * blank_display() 2382 * Put the display in power save/power off mode. 2383 * 2384 * all adapters 2385 */ 2386 static int 2387 vga_blank_display(video_adapter_t *adp, int mode) 2388 { 2389 u_char val; 2390 int s; 2391 2392 s = splhigh(); 2393 switch (adp->va_type) { 2394 case KD_VGA: 2395 switch (mode) { 2396 case V_DISPLAY_SUSPEND: 2397 case V_DISPLAY_STAND_BY: 2398 outb(TSIDX, 0x01); 2399 val = inb(TSREG); 2400 outb(TSIDX, 0x01); 2401 outb(TSREG, val | 0x20); 2402 outb(adp->va_crtc_addr, 0x17); 2403 val = inb(adp->va_crtc_addr + 1); 2404 outb(adp->va_crtc_addr + 1, val & ~0x80); 2405 break; 2406 case V_DISPLAY_BLANK: 2407 outb(TSIDX, 0x01); 2408 val = inb(TSREG); 2409 outb(TSIDX, 0x01); 2410 outb(TSREG, val | 0x20); 2411 break; 2412 case V_DISPLAY_ON: 2413 outb(TSIDX, 0x01); 2414 val = inb(TSREG); 2415 outb(TSIDX, 0x01); 2416 outb(TSREG, val & 0xDF); 2417 outb(adp->va_crtc_addr, 0x17); 2418 val = inb(adp->va_crtc_addr + 1); 2419 outb(adp->va_crtc_addr + 1, val | 0x80); 2420 break; 2421 } 2422 break; 2423 2424 case KD_EGA: 2425 /* no support yet */ 2426 splx(s); 2427 return ENODEV; 2428 2429 case KD_CGA: 2430 switch (mode) { 2431 case V_DISPLAY_SUSPEND: 2432 case V_DISPLAY_STAND_BY: 2433 case V_DISPLAY_BLANK: 2434 outb(adp->va_crtc_addr + 4, 0x25); 2435 break; 2436 case V_DISPLAY_ON: 2437 outb(adp->va_crtc_addr + 4, 0x2d); 2438 break; 2439 } 2440 break; 2441 2442 case KD_MONO: 2443 case KD_HERCULES: 2444 switch (mode) { 2445 case V_DISPLAY_SUSPEND: 2446 case V_DISPLAY_STAND_BY: 2447 case V_DISPLAY_BLANK: 2448 outb(adp->va_crtc_addr + 4, 0x21); 2449 break; 2450 case V_DISPLAY_ON: 2451 outb(adp->va_crtc_addr + 4, 0x29); 2452 break; 2453 } 2454 break; 2455 default: 2456 break; 2457 } 2458 splx(s); 2459 2460 return 0; 2461 } 2462 2463 /* 2464 * mmap(): 2465 * Mmap frame buffer. 2466 * 2467 * all adapters 2468 */ 2469 static int 2470 vga_mmap_buf(video_adapter_t *adp, vm_ooffset_t offset, vm_paddr_t *paddr, 2471 int prot, vm_memattr_t *memattr) 2472 { 2473 if (adp->va_info.vi_flags & V_INFO_LINEAR) 2474 return -1; 2475 2476 #if VGA_DEBUG > 0 2477 printf("vga_mmap_buf(): window:0x%jx, offset:0x%jx\n", 2478 (uintmax_t)adp->va_info.vi_window, (uintmax_t)offset); 2479 #endif 2480 2481 /* XXX: is this correct? */ 2482 if (offset > adp->va_window_size - PAGE_SIZE) 2483 return -1; 2484 2485 *paddr = adp->va_info.vi_window + offset; 2486 return 0; 2487 } 2488 2489 #ifndef VGA_NO_MODE_CHANGE 2490 2491 static void 2492 planar_fill(video_adapter_t *adp, int val) 2493 { 2494 int length; 2495 int at; /* position in the frame buffer */ 2496 int l; 2497 2498 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2499 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2500 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2501 outw(GDCIDX, 0xff08); /* bit mask */ 2502 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2503 at = 0; 2504 length = adp->va_line_width*adp->va_info.vi_height; 2505 while (length > 0) { 2506 l = imin(length, adp->va_window_size); 2507 vidd_set_win_org(adp, at); 2508 bzero_io(adp->va_window, l); 2509 length -= l; 2510 at += l; 2511 } 2512 outw(GDCIDX, 0x0000); /* set/reset */ 2513 outw(GDCIDX, 0x0001); /* set/reset enable */ 2514 } 2515 2516 static void 2517 packed_fill(video_adapter_t *adp, int val) 2518 { 2519 int length; 2520 int at; /* position in the frame buffer */ 2521 int l; 2522 2523 at = 0; 2524 length = adp->va_line_width*adp->va_info.vi_height; 2525 while (length > 0) { 2526 l = imin(length, adp->va_window_size); 2527 vidd_set_win_org(adp, at); 2528 fill_io(val, adp->va_window, l); 2529 length -= l; 2530 at += l; 2531 } 2532 } 2533 2534 static void 2535 direct_fill(video_adapter_t *adp, int val) 2536 { 2537 int length; 2538 int at; /* position in the frame buffer */ 2539 int l; 2540 2541 at = 0; 2542 length = adp->va_line_width*adp->va_info.vi_height; 2543 while (length > 0) { 2544 l = imin(length, adp->va_window_size); 2545 vidd_set_win_org(adp, at); 2546 switch (adp->va_info.vi_pixel_size) { 2547 case sizeof(u_int16_t): 2548 fillw_io(val, adp->va_window, l/sizeof(u_int16_t)); 2549 break; 2550 case 3: 2551 /* FIXME */ 2552 break; 2553 case sizeof(u_int32_t): 2554 filll_io(val, adp->va_window, l/sizeof(u_int32_t)); 2555 break; 2556 } 2557 length -= l; 2558 at += l; 2559 } 2560 } 2561 2562 static int 2563 vga_clear(video_adapter_t *adp) 2564 { 2565 switch (adp->va_info.vi_mem_model) { 2566 case V_INFO_MM_TEXT: 2567 /* do nothing? XXX */ 2568 break; 2569 case V_INFO_MM_PLANAR: 2570 planar_fill(adp, 0); 2571 break; 2572 case V_INFO_MM_PACKED: 2573 packed_fill(adp, 0); 2574 break; 2575 case V_INFO_MM_DIRECT: 2576 direct_fill(adp, 0); 2577 break; 2578 } 2579 return 0; 2580 } 2581 2582 #ifdef notyet 2583 static void 2584 planar_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2585 { 2586 int banksize; 2587 int bank; 2588 int pos; 2589 int offset; /* offset within window */ 2590 int bx; 2591 int l; 2592 2593 outw(GDCIDX, 0x0005); /* read mode 0, write mode 0 */ 2594 outw(GDCIDX, 0x0003); /* data rotate/function select */ 2595 outw(GDCIDX, 0x0f01); /* set/reset enable */ 2596 outw(GDCIDX, 0xff08); /* bit mask */ 2597 outw(GDCIDX, (val << 8) | 0x00); /* set/reset */ 2598 2599 banksize = adp->va_window_size; 2600 bank = -1; 2601 while (cy > 0) { 2602 pos = adp->va_line_width*y + x/8; 2603 if (bank != pos/banksize) { 2604 vidd_set_win_org(adp, pos); 2605 bank = pos/banksize; 2606 } 2607 offset = pos%banksize; 2608 bx = (x + cx)/8 - x/8; 2609 if (x % 8) { 2610 outw(GDCIDX, ((0xff00 >> (x % 8)) & 0xff00) | 0x08); 2611 writeb(adp->va_window + offset, 0); 2612 ++offset; 2613 --bx; 2614 if (offset >= banksize) { 2615 offset = 0; 2616 ++bank; /* next bank */ 2617 vidd_set_win_org(adp, bank*banksize); 2618 } 2619 outw(GDCIDX, 0xff08); /* bit mask */ 2620 } 2621 while (bx > 0) { 2622 l = imin(bx, banksize); 2623 bzero_io(adp->va_window + offset, l); 2624 offset += l; 2625 bx -= l; 2626 if (offset >= banksize) { 2627 offset = 0; 2628 ++bank; /* next bank */ 2629 vidd_set_win_org(adp, bank*banksize); 2630 } 2631 } 2632 if ((x + cx) % 8) { 2633 outw(GDCIDX, (~(0xff00 >> ((x + cx) % 8)) & 0xff00) | 0x08); 2634 writeb(adp->va_window + offset, 0); 2635 ++offset; 2636 if (offset >= banksize) { 2637 offset = 0; 2638 ++bank; /* next bank */ 2639 vidd_set_win_org(adp, bank*banksize); 2640 } 2641 outw(GDCIDX, 0xff08); /* bit mask */ 2642 } 2643 ++y; 2644 --cy; 2645 } 2646 2647 outw(GDCIDX, 0xff08); /* bit mask */ 2648 outw(GDCIDX, 0x0000); /* set/reset */ 2649 outw(GDCIDX, 0x0001); /* set/reset enable */ 2650 } 2651 2652 static void 2653 packed_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2654 { 2655 int banksize; 2656 int bank; 2657 int pos; 2658 int offset; /* offset within window */ 2659 int end; 2660 2661 banksize = adp->va_window_size; 2662 bank = -1; 2663 cx *= adp->va_info.vi_pixel_size; 2664 while (cy > 0) { 2665 pos = adp->va_line_width*y + x*adp->va_info.vi_pixel_size; 2666 if (bank != pos/banksize) { 2667 vidd_set_win_org(adp, pos); 2668 bank = pos/banksize; 2669 } 2670 offset = pos%banksize; 2671 end = imin(offset + cx, banksize); 2672 fill_io(val, adp->va_window + offset, 2673 (end - offset)/adp->va_info.vi_pixel_size); 2674 /* the line may cross the window boundary */ 2675 if (offset + cx > banksize) { 2676 ++bank; /* next bank */ 2677 vidd_set_win_org(adp, bank*banksize); 2678 end = offset + cx - banksize; 2679 fill_io(val, adp->va_window, end/adp->va_info.vi_pixel_size); 2680 } 2681 ++y; 2682 --cy; 2683 } 2684 } 2685 2686 static void 2687 direct_fill_rect16(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2688 { 2689 int banksize; 2690 int bank; 2691 int pos; 2692 int offset; /* offset within window */ 2693 int end; 2694 2695 /* 2696 * XXX: the function assumes that banksize is a muliple of 2697 * sizeof(u_int16_t). 2698 */ 2699 banksize = adp->va_window_size; 2700 bank = -1; 2701 cx *= sizeof(u_int16_t); 2702 while (cy > 0) { 2703 pos = adp->va_line_width*y + x*sizeof(u_int16_t); 2704 if (bank != pos/banksize) { 2705 vidd_set_win_org(adp, pos); 2706 bank = pos/banksize; 2707 } 2708 offset = pos%banksize; 2709 end = imin(offset + cx, banksize); 2710 fillw_io(val, adp->va_window + offset, 2711 (end - offset)/sizeof(u_int16_t)); 2712 /* the line may cross the window boundary */ 2713 if (offset + cx > banksize) { 2714 ++bank; /* next bank */ 2715 vidd_set_win_org(adp, bank*banksize); 2716 end = offset + cx - banksize; 2717 fillw_io(val, adp->va_window, end/sizeof(u_int16_t)); 2718 } 2719 ++y; 2720 --cy; 2721 } 2722 } 2723 2724 static void 2725 direct_fill_rect24(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2726 { 2727 int banksize; 2728 int bank; 2729 int pos; 2730 int offset; /* offset within window */ 2731 int end; 2732 int i; 2733 int j; 2734 u_int8_t b[3]; 2735 2736 b[0] = val & 0x0000ff; 2737 b[1] = (val >> 8) & 0x0000ff; 2738 b[2] = (val >> 16) & 0x0000ff; 2739 banksize = adp->va_window_size; 2740 bank = -1; 2741 cx *= 3; 2742 while (cy > 0) { 2743 pos = adp->va_line_width*y + x*3; 2744 if (bank != pos/banksize) { 2745 vidd_set_win_org(adp, pos); 2746 bank = pos/banksize; 2747 } 2748 offset = pos%banksize; 2749 end = imin(offset + cx, banksize); 2750 for (i = 0, j = offset; j < end; i = (++i)%3, ++j) { 2751 writeb(adp->va_window + j, b[i]); 2752 } 2753 /* the line may cross the window boundary */ 2754 if (offset + cx >= banksize) { 2755 ++bank; /* next bank */ 2756 vidd_set_win_org(adp, bank*banksize); 2757 j = 0; 2758 end = offset + cx - banksize; 2759 for (; j < end; i = (++i)%3, ++j) { 2760 writeb(adp->va_window + j, b[i]); 2761 } 2762 } 2763 ++y; 2764 --cy; 2765 } 2766 } 2767 2768 static void 2769 direct_fill_rect32(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2770 { 2771 int banksize; 2772 int bank; 2773 int pos; 2774 int offset; /* offset within window */ 2775 int end; 2776 2777 /* 2778 * XXX: the function assumes that banksize is a muliple of 2779 * sizeof(u_int32_t). 2780 */ 2781 banksize = adp->va_window_size; 2782 bank = -1; 2783 cx *= sizeof(u_int32_t); 2784 while (cy > 0) { 2785 pos = adp->va_line_width*y + x*sizeof(u_int32_t); 2786 if (bank != pos/banksize) { 2787 vidd_set_win_org(adp, pos); 2788 bank = pos/banksize; 2789 } 2790 offset = pos%banksize; 2791 end = imin(offset + cx, banksize); 2792 filll_io(val, adp->va_window + offset, 2793 (end - offset)/sizeof(u_int32_t)); 2794 /* the line may cross the window boundary */ 2795 if (offset + cx > banksize) { 2796 ++bank; /* next bank */ 2797 vidd_set_win_org(adp, bank*banksize); 2798 end = offset + cx - banksize; 2799 filll_io(val, adp->va_window, end/sizeof(u_int32_t)); 2800 } 2801 ++y; 2802 --cy; 2803 } 2804 } 2805 2806 static int 2807 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2808 { 2809 switch (adp->va_info.vi_mem_model) { 2810 case V_INFO_MM_TEXT: 2811 /* do nothing? XXX */ 2812 break; 2813 case V_INFO_MM_PLANAR: 2814 planar_fill_rect(adp, val, x, y, cx, cy); 2815 break; 2816 case V_INFO_MM_PACKED: 2817 packed_fill_rect(adp, val, x, y, cx, cy); 2818 break; 2819 case V_INFO_MM_DIRECT: 2820 switch (adp->va_info.vi_pixel_size) { 2821 case sizeof(u_int16_t): 2822 direct_fill_rect16(adp, val, x, y, cx, cy); 2823 break; 2824 case 3: 2825 direct_fill_rect24(adp, val, x, y, cx, cy); 2826 break; 2827 case sizeof(u_int32_t): 2828 direct_fill_rect32(adp, val, x, y, cx, cy); 2829 break; 2830 } 2831 break; 2832 } 2833 return 0; 2834 } 2835 #else /* !notyet */ 2836 static int 2837 vga_fill_rect(video_adapter_t *adp, int val, int x, int y, int cx, int cy) 2838 { 2839 return ENODEV; 2840 } 2841 #endif /* notyet */ 2842 2843 static int 2844 vga_bitblt(video_adapter_t *adp,...) 2845 { 2846 /* FIXME */ 2847 return ENODEV; 2848 } 2849 2850 #endif /* !VGA_NO_MODE_CHANGE */ 2851 2852 static int 2853 get_palette(video_adapter_t *adp, int base, int count, 2854 u_char *red, u_char *green, u_char *blue, u_char *trans) 2855 { 2856 u_char *r; 2857 u_char *g; 2858 u_char *b; 2859 2860 if (count < 0 || base < 0 || count > 256 || base > 256 || 2861 base + count > 256) 2862 return EINVAL; 2863 2864 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2865 g = r + count; 2866 b = g + count; 2867 if (vga_save_palette2(adp, base, count, r, g, b)) { 2868 free(r, M_DEVBUF); 2869 return ENODEV; 2870 } 2871 copyout(r, red, count); 2872 copyout(g, green, count); 2873 copyout(b, blue, count); 2874 if (trans != NULL) { 2875 bzero(r, count); 2876 copyout(r, trans, count); 2877 } 2878 free(r, M_DEVBUF); 2879 2880 return 0; 2881 } 2882 2883 static int 2884 set_palette(video_adapter_t *adp, int base, int count, 2885 u_char *red, u_char *green, u_char *blue, u_char *trans) 2886 { 2887 u_char *r; 2888 u_char *g; 2889 u_char *b; 2890 int err; 2891 2892 if (count < 0 || base < 0 || count > 256 || base > 256 || 2893 base + count > 256) 2894 return EINVAL; 2895 2896 r = malloc(count*3, M_DEVBUF, M_WAITOK); 2897 g = r + count; 2898 b = g + count; 2899 err = copyin(red, r, count); 2900 if (!err) 2901 err = copyin(green, g, count); 2902 if (!err) 2903 err = copyin(blue, b, count); 2904 if (!err) 2905 err = vga_load_palette2(adp, base, count, r, g, b); 2906 free(r, M_DEVBUF); 2907 2908 return (err ? ENODEV : 0); 2909 } 2910 2911 static int 2912 vga_dev_ioctl(video_adapter_t *adp, u_long cmd, caddr_t arg) 2913 { 2914 switch (cmd) { 2915 case FBIO_GETWINORG: /* get frame buffer window origin */ 2916 *(u_int *)arg = 0; 2917 return 0; 2918 2919 case FBIO_SETWINORG: /* set frame buffer window origin */ 2920 return ENODEV; 2921 2922 case FBIO_SETDISPSTART: /* set display start address */ 2923 return (set_display_start(adp, 2924 ((video_display_start_t *)arg)->x, 2925 ((video_display_start_t *)arg)->y) 2926 ? ENODEV : 0); 2927 2928 case FBIO_SETLINEWIDTH: /* set scan line length in pixel */ 2929 return (set_line_length(adp, *(u_int *)arg) ? ENODEV : 0); 2930 2931 case FBIO_GETPALETTE: /* get color palette */ 2932 return get_palette(adp, ((video_color_palette_t *)arg)->index, 2933 ((video_color_palette_t *)arg)->count, 2934 ((video_color_palette_t *)arg)->red, 2935 ((video_color_palette_t *)arg)->green, 2936 ((video_color_palette_t *)arg)->blue, 2937 ((video_color_palette_t *)arg)->transparent); 2938 2939 case FBIO_SETPALETTE: /* set color palette */ 2940 return set_palette(adp, ((video_color_palette_t *)arg)->index, 2941 ((video_color_palette_t *)arg)->count, 2942 ((video_color_palette_t *)arg)->red, 2943 ((video_color_palette_t *)arg)->green, 2944 ((video_color_palette_t *)arg)->blue, 2945 ((video_color_palette_t *)arg)->transparent); 2946 2947 case FBIOGTYPE: /* get frame buffer type info. */ 2948 ((struct fbtype *)arg)->fb_type = fb_type(adp->va_type); 2949 ((struct fbtype *)arg)->fb_height = adp->va_info.vi_height; 2950 ((struct fbtype *)arg)->fb_width = adp->va_info.vi_width; 2951 ((struct fbtype *)arg)->fb_depth = adp->va_info.vi_depth; 2952 if ((adp->va_info.vi_depth <= 1) || (adp->va_info.vi_depth > 8)) 2953 ((struct fbtype *)arg)->fb_cmsize = 0; 2954 else 2955 ((struct fbtype *)arg)->fb_cmsize = 1 << adp->va_info.vi_depth; 2956 ((struct fbtype *)arg)->fb_size = adp->va_buffer_size; 2957 return 0; 2958 2959 case FBIOGETCMAP: /* get color palette */ 2960 return get_palette(adp, ((struct fbcmap *)arg)->index, 2961 ((struct fbcmap *)arg)->count, 2962 ((struct fbcmap *)arg)->red, 2963 ((struct fbcmap *)arg)->green, 2964 ((struct fbcmap *)arg)->blue, NULL); 2965 2966 case FBIOPUTCMAP: /* set color palette */ 2967 return set_palette(adp, ((struct fbcmap *)arg)->index, 2968 ((struct fbcmap *)arg)->count, 2969 ((struct fbcmap *)arg)->red, 2970 ((struct fbcmap *)arg)->green, 2971 ((struct fbcmap *)arg)->blue, NULL); 2972 2973 default: 2974 return fb_commonioctl(adp, cmd, arg); 2975 } 2976 } 2977 2978 static void 2979 dump_buffer(u_char *buf, size_t len) 2980 { 2981 int i; 2982 2983 for(i = 0; i < len;) { 2984 printf("%02x ", buf[i]); 2985 if ((++i % 16) == 0) 2986 printf("\n"); 2987 } 2988 } 2989 2990 /* 2991 * diag(): 2992 * Print some information about the video adapter and video modes, 2993 * with requested level of details. 2994 * 2995 * all adapters 2996 */ 2997 static int 2998 vga_diag(video_adapter_t *adp, int level) 2999 { 3000 u_char *mp; 3001 #if FB_DEBUG > 1 3002 video_info_t info; 3003 int i; 3004 #endif 3005 3006 if (!vga_init_done) 3007 return ENXIO; 3008 3009 #if FB_DEBUG > 1 3010 #ifndef VGA_NO_BIOS 3011 printf("vga: RTC equip. code:0x%02x, DCC code:0x%02x\n", 3012 rtcin(RTC_EQUIPMENT), readb(BIOS_PADDRTOVADDR(0x488))); 3013 printf("vga: CRTC:0x%x, video option:0x%02x, ", 3014 readw(BIOS_PADDRTOVADDR(0x463)), 3015 readb(BIOS_PADDRTOVADDR(0x487))); 3016 printf("rows:%d, cols:%d, font height:%d\n", 3017 readb(BIOS_PADDRTOVADDR(0x44a)), 3018 readb(BIOS_PADDRTOVADDR(0x484)) + 1, 3019 readb(BIOS_PADDRTOVADDR(0x485))); 3020 #endif /* VGA_NO_BIOS */ 3021 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3022 printf("vga: param table EGA/VGA:%p", video_mode_ptr); 3023 printf(", CGA/MDA:%p\n", video_mode_ptr2); 3024 printf("vga: rows_offset:%d\n", rows_offset); 3025 #endif 3026 #endif /* FB_DEBUG > 1 */ 3027 3028 fb_dump_adp_info(VGA_DRIVER_NAME, adp, level); 3029 3030 #if FB_DEBUG > 1 3031 if (adp->va_flags & V_ADP_MODECHANGE) { 3032 for (i = 0; bios_vmode[i].vi_mode != EOT; ++i) { 3033 if (bios_vmode[i].vi_mode == NA) 3034 continue; 3035 if (get_mode_param(bios_vmode[i].vi_mode) == NULL) 3036 continue; 3037 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &bios_vmode[i], level); 3038 } 3039 } else { 3040 vga_get_info(adp, adp->va_initial_mode, &info); /* shouldn't fail */ 3041 fb_dump_mode_info(VGA_DRIVER_NAME, adp, &info, level); 3042 } 3043 #endif /* FB_DEBUG > 1 */ 3044 3045 if ((adp->va_type != KD_EGA) && (adp->va_type != KD_VGA)) 3046 return 0; 3047 #if !defined(VGA_NO_BIOS) && !defined(VGA_NO_MODE_CHANGE) 3048 if (video_mode_ptr == NULL) 3049 printf("vga%d: %s: WARNING: video mode switching is not " 3050 "fully supported on this adapter\n", 3051 adp->va_unit, adp->va_name); 3052 #endif 3053 if (level <= 0) 3054 return 0; 3055 3056 if (adp->va_type == KD_VGA) { 3057 printf("VGA parameters upon power-up\n"); 3058 dump_buffer(adpstate.regs, sizeof(adpstate.regs)); 3059 printf("VGA parameters in BIOS for mode %d\n", adp->va_initial_mode); 3060 dump_buffer(adpstate2.regs, sizeof(adpstate2.regs)); 3061 } 3062 3063 mp = get_mode_param(adp->va_initial_mode); 3064 if (mp == NULL) /* this shouldn't be happening */ 3065 return 0; 3066 printf("EGA/VGA parameters to be used for mode %d\n", adp->va_initial_mode); 3067 dump_buffer(mp, V_MODE_PARAM_SIZE); 3068 3069 return 0; 3070 }
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