Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/fe/if_fe.c
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1 /*- 2 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 3 * 4 * This software may be used, modified, copied, distributed, and sold, in 5 * both source and binary form provided that the above copyright, these 6 * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 */ 22 23 #include <sys/cdefs.h> 24 __FBSDID("$FreeBSD$"); 25 26 /* 27 * 28 * Device driver for Fujitsu MB86960A/MB86965A based Ethernet cards. 29 * Contributed by M. Sekiguchi. <seki@sysrap.cs.fujitsu.co.jp> 30 * 31 * This version is intended to be a generic template for various 32 * MB86960A/MB86965A based Ethernet cards. It currently supports 33 * Fujitsu FMV-180 series for ISA and Allied-Telesis AT1700/RE2000 34 * series for ISA, as well as Fujitsu MBH10302 PC card. 35 * There are some currently- 36 * unused hooks embedded, which are primarily intended to support 37 * other types of Ethernet cards, but the author is not sure whether 38 * they are useful. 39 * 40 * This version also includes some alignments to support RE1000, 41 * C-NET(98)P2 and so on. These cards are not for AT-compatibles, 42 * but for NEC PC-98 bus -- a proprietary bus architecture available 43 * only in Japan. Confusingly, it is different from the Microsoft's 44 * PC98 architecture. :-{ 45 * Further work for PC-98 version will be available as a part of 46 * FreeBSD(98) project. 47 * 48 * This software is a derivative work of if_ed.c version 1.56 by David 49 * Greenman available as a part of FreeBSD 2.0 RELEASE source distribution. 50 * 51 * The following lines are retained from the original if_ed.c: 52 * 53 * Copyright (C) 1993, David Greenman. This software may be used, modified, 54 * copied, distributed, and sold, in both source and binary form provided 55 * that the above copyright and these terms are retained. Under no 56 * circumstances is the author responsible for the proper functioning 57 * of this software, nor does the author assume any responsibility 58 * for damages incurred with its use. 59 */ 60 61 /* 62 * TODO: 63 * o To support ISA PnP auto configuration for FMV-183/184. 64 * o To support REX-9886/87(PC-98 only). 65 * o To reconsider mbuf usage. 66 * o To reconsider transmission buffer usage, including 67 * transmission buffer size (currently 4KB x 2) and pros-and- 68 * cons of multiple frame transmission. 69 * o To test IPX codes. 70 * o To test new-bus frontend. 71 */ 72 73 #include <sys/param.h> 74 #include <sys/systm.h> 75 #include <sys/socket.h> 76 #include <sys/sockio.h> 77 #include <sys/mbuf.h> 78 79 #include <sys/bus.h> 80 #include <machine/bus.h> 81 #include <sys/rman.h> 82 #include <machine/resource.h> 83 84 #include <net/ethernet.h> 85 #include <net/if.h> 86 #include <net/if_dl.h> 87 #include <net/if_mib.h> 88 #include <net/if_media.h> 89 90 #include <netinet/in.h> 91 #include <netinet/if_ether.h> 92 93 #include <net/bpf.h> 94 95 #include <i386/isa/ic/mb86960.h> 96 #include <dev/fe/if_fereg.h> 97 #include <dev/fe/if_fevar.h> 98 99 /* 100 * Transmit just one packet per a "send" command to 86960. 101 * This option is intended for performance test. An EXPERIMENTAL option. 102 */ 103 #ifndef FE_SINGLE_TRANSMISSION 104 #define FE_SINGLE_TRANSMISSION 0 105 #endif 106 107 /* 108 * Maximum loops when interrupt. 109 * This option prevents an infinite loop due to hardware failure. 110 * (Some laptops make an infinite loop after PC-Card is ejected.) 111 */ 112 #ifndef FE_MAX_LOOP 113 #define FE_MAX_LOOP 0x800 114 #endif 115 116 /* 117 * Device configuration flags. 118 */ 119 120 /* DLCR6 settings. */ 121 #define FE_FLAGS_DLCR6_VALUE 0x007F 122 123 /* Force DLCR6 override. */ 124 #define FE_FLAGS_OVERRIDE_DLCR6 0x0080 125 126 127 devclass_t fe_devclass; 128 129 /* 130 * Special filter values. 131 */ 132 static struct fe_filter const fe_filter_nothing = { FE_FILTER_NOTHING }; 133 static struct fe_filter const fe_filter_all = { FE_FILTER_ALL }; 134 135 /* Standard driver entry points. These can be static. */ 136 static void fe_init (void *); 137 static driver_intr_t fe_intr; 138 static int fe_ioctl (struct ifnet *, u_long, caddr_t); 139 static void fe_start (struct ifnet *); 140 static void fe_watchdog (struct ifnet *); 141 static int fe_medchange (struct ifnet *); 142 static void fe_medstat (struct ifnet *, struct ifmediareq *); 143 144 /* Local functions. Order of declaration is confused. FIXME. */ 145 static int fe_get_packet ( struct fe_softc *, u_short ); 146 static void fe_tint ( struct fe_softc *, u_char ); 147 static void fe_rint ( struct fe_softc *, u_char ); 148 static void fe_xmit ( struct fe_softc * ); 149 static void fe_write_mbufs ( struct fe_softc *, struct mbuf * ); 150 static void fe_setmode ( struct fe_softc * ); 151 static void fe_loadmar ( struct fe_softc * ); 152 153 #ifdef DIAGNOSTIC 154 static void fe_emptybuffer ( struct fe_softc * ); 155 #endif 156 157 /* 158 * Fe driver specific constants which relate to 86960/86965. 159 */ 160 161 /* Interrupt masks */ 162 #define FE_TMASK ( FE_D2_COLL16 | FE_D2_TXDONE ) 163 #define FE_RMASK ( FE_D3_OVRFLO | FE_D3_CRCERR \ 164 | FE_D3_ALGERR | FE_D3_SRTPKT | FE_D3_PKTRDY ) 165 166 /* Maximum number of iterations for a receive interrupt. */ 167 #define FE_MAX_RECV_COUNT ( ( 65536 - 2048 * 2 ) / 64 ) 168 /* 169 * Maximum size of SRAM is 65536, 170 * minimum size of transmission buffer in fe is 2x2KB, 171 * and minimum amount of received packet including headers 172 * added by the chip is 64 bytes. 173 * Hence FE_MAX_RECV_COUNT is the upper limit for number 174 * of packets in the receive buffer. 175 */ 176 177 /* 178 * Miscellaneous definitions not directly related to hardware. 179 */ 180 181 /* The following line must be delete when "net/if_media.h" support it. */ 182 #ifndef IFM_10_FL 183 #define IFM_10_FL /* 13 */ IFM_10_5 184 #endif 185 186 #if 0 187 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 188 static int const bit2media [] = { 189 IFM_HDX | IFM_ETHER | IFM_AUTO, 190 IFM_HDX | IFM_ETHER | IFM_MANUAL, 191 IFM_HDX | IFM_ETHER | IFM_10_T, 192 IFM_HDX | IFM_ETHER | IFM_10_2, 193 IFM_HDX | IFM_ETHER | IFM_10_5, 194 IFM_HDX | IFM_ETHER | IFM_10_FL, 195 IFM_FDX | IFM_ETHER | IFM_10_T, 196 /* More can be come here... */ 197 0 198 }; 199 #else 200 /* Mapping between media bitmap (in fe_softc.mbitmap) and ifm_media. */ 201 static int const bit2media [] = { 202 IFM_ETHER | IFM_AUTO, 203 IFM_ETHER | IFM_MANUAL, 204 IFM_ETHER | IFM_10_T, 205 IFM_ETHER | IFM_10_2, 206 IFM_ETHER | IFM_10_5, 207 IFM_ETHER | IFM_10_FL, 208 IFM_ETHER | IFM_10_T, 209 /* More can be come here... */ 210 0 211 }; 212 #endif 213 214 /* 215 * Check for specific bits in specific registers have specific values. 216 * A common utility function called from various sub-probe routines. 217 */ 218 int 219 fe_simple_probe (struct fe_softc const * sc, 220 struct fe_simple_probe_struct const * sp) 221 { 222 struct fe_simple_probe_struct const *p; 223 224 for (p = sp; p->mask != 0; p++) { 225 if ((fe_inb(sc, p->port) & p->mask) != p->bits) 226 return 0; 227 } 228 return 1; 229 } 230 231 /* Test if a given 6 byte value is a valid Ethernet station (MAC) 232 address. "Vendor" is an expected vendor code (first three bytes,) 233 or a zero when nothing expected. */ 234 int 235 fe_valid_Ether_p (u_char const * addr, unsigned vendor) 236 { 237 #ifdef FE_DEBUG 238 printf("fe?: validating %6D against %06x\n", addr, ":", vendor); 239 #endif 240 241 /* All zero is not allowed as a vendor code. */ 242 if (addr[0] == 0 && addr[1] == 0 && addr[2] == 0) return 0; 243 244 switch (vendor) { 245 case 0x000000: 246 /* Legal Ethernet address (stored in ROM) must have 247 its Group and Local bits cleared. */ 248 if ((addr[0] & 0x03) != 0) return 0; 249 break; 250 case 0x020000: 251 /* Same as above, but a local address is allowed in 252 this context. */ 253 if (ETHER_IS_MULTICAST(addr)) return 0; 254 break; 255 default: 256 /* Make sure the vendor part matches if one is given. */ 257 if ( addr[0] != ((vendor >> 16) & 0xFF) 258 || addr[1] != ((vendor >> 8) & 0xFF) 259 || addr[2] != ((vendor ) & 0xFF)) return 0; 260 break; 261 } 262 263 /* Host part must not be all-zeros nor all-ones. */ 264 if (addr[3] == 0xFF && addr[4] == 0xFF && addr[5] == 0xFF) return 0; 265 if (addr[3] == 0x00 && addr[4] == 0x00 && addr[5] == 0x00) return 0; 266 267 /* Given addr looks like an Ethernet address. */ 268 return 1; 269 } 270 271 /* Fill our softc struct with default value. */ 272 void 273 fe_softc_defaults (struct fe_softc *sc) 274 { 275 /* Prepare for typical register prototypes. We assume a 276 "typical" board has <32KB> of <fast> SRAM connected with a 277 <byte-wide> data lines. */ 278 sc->proto_dlcr4 = FE_D4_LBC_DISABLE | FE_D4_CNTRL; 279 sc->proto_dlcr5 = 0; 280 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x4KB 281 | FE_D6_BBW_BYTE | FE_D6_SBW_WORD | FE_D6_SRAM_100ns; 282 sc->proto_dlcr7 = FE_D7_BYTSWP_LH; 283 sc->proto_bmpr13 = 0; 284 285 /* Assume the probe process (to be done later) is stable. */ 286 sc->stability = 0; 287 288 /* A typical board needs no hooks. */ 289 sc->init = NULL; 290 sc->stop = NULL; 291 292 /* Assume the board has no software-controllable media selection. */ 293 sc->mbitmap = MB_HM; 294 sc->defmedia = MB_HM; 295 sc->msel = NULL; 296 } 297 298 /* Common error reporting routine used in probe routines for 299 "soft configured IRQ"-type boards. */ 300 void 301 fe_irq_failure (char const *name, int unit, int irq, char const *list) 302 { 303 printf("fe%d: %s board is detected, but %s IRQ was given\n", 304 unit, name, (irq == NO_IRQ ? "no" : "invalid")); 305 if (list != NULL) { 306 printf("fe%d: specify an IRQ from %s in kernel config\n", 307 unit, list); 308 } 309 } 310 311 /* 312 * Hardware (vendor) specific hooks. 313 */ 314 315 /* 316 * Generic media selection scheme for MB86965 based boards. 317 */ 318 void 319 fe_msel_965 (struct fe_softc *sc) 320 { 321 u_char b13; 322 323 /* Find the appropriate bits for BMPR13 tranceiver control. */ 324 switch (IFM_SUBTYPE(sc->media.ifm_media)) { 325 case IFM_AUTO: b13 = FE_B13_PORT_AUTO | FE_B13_TPTYPE_UTP; break; 326 case IFM_10_T: b13 = FE_B13_PORT_TP | FE_B13_TPTYPE_UTP; break; 327 default: b13 = FE_B13_PORT_AUI; break; 328 } 329 330 /* Write it into the register. It takes effect immediately. */ 331 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | b13); 332 } 333 334 335 /* 336 * Fujitsu MB86965 JLI mode support routines. 337 */ 338 339 /* 340 * Routines to read all bytes from the config EEPROM through MB86965A. 341 * It is a MicroWire (3-wire) serial EEPROM with 6-bit address. 342 * (93C06 or 93C46.) 343 */ 344 static void 345 fe_strobe_eeprom_jli (struct fe_softc *sc, u_short bmpr16) 346 { 347 /* 348 * We must guarantee 1us (or more) interval to access slow 349 * EEPROMs. The following redundant code provides enough 350 * delay with ISA timing. (Even if the bus clock is "tuned.") 351 * Some modification will be needed on faster busses. 352 */ 353 fe_outb(sc, bmpr16, FE_B16_SELECT); 354 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 355 fe_outb(sc, bmpr16, FE_B16_SELECT | FE_B16_CLOCK); 356 fe_outb(sc, bmpr16, FE_B16_SELECT); 357 } 358 359 void 360 fe_read_eeprom_jli (struct fe_softc * sc, u_char * data) 361 { 362 u_char n, val, bit; 363 u_char save16, save17; 364 365 /* Save the current value of the EEPROM interface registers. */ 366 save16 = fe_inb(sc, FE_BMPR16); 367 save17 = fe_inb(sc, FE_BMPR17); 368 369 /* Read bytes from EEPROM; two bytes per an iteration. */ 370 for (n = 0; n < JLI_EEPROM_SIZE / 2; n++) { 371 372 /* Reset the EEPROM interface. */ 373 fe_outb(sc, FE_BMPR16, 0x00); 374 fe_outb(sc, FE_BMPR17, 0x00); 375 376 /* Start EEPROM access. */ 377 fe_outb(sc, FE_BMPR16, FE_B16_SELECT); 378 fe_outb(sc, FE_BMPR17, FE_B17_DATA); 379 fe_strobe_eeprom_jli(sc, FE_BMPR16); 380 381 /* Pass the iteration count as well as a READ command. */ 382 val = 0x80 | n; 383 for (bit = 0x80; bit != 0x00; bit >>= 1) { 384 fe_outb(sc, FE_BMPR17, (val & bit) ? FE_B17_DATA : 0); 385 fe_strobe_eeprom_jli(sc, FE_BMPR16); 386 } 387 fe_outb(sc, FE_BMPR17, 0x00); 388 389 /* Read a byte. */ 390 val = 0; 391 for (bit = 0x80; bit != 0x00; bit >>= 1) { 392 fe_strobe_eeprom_jli(sc, FE_BMPR16); 393 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA) 394 val |= bit; 395 } 396 *data++ = val; 397 398 /* Read one more byte. */ 399 val = 0; 400 for (bit = 0x80; bit != 0x00; bit >>= 1) { 401 fe_strobe_eeprom_jli(sc, FE_BMPR16); 402 if (fe_inb(sc, FE_BMPR17) & FE_B17_DATA) 403 val |= bit; 404 } 405 *data++ = val; 406 } 407 408 #if 0 409 /* Reset the EEPROM interface, again. */ 410 fe_outb(sc, FE_BMPR16, 0x00); 411 fe_outb(sc, FE_BMPR17, 0x00); 412 #else 413 /* Make sure to restore the original value of EEPROM interface 414 registers, since we are not yet sure we have MB86965A on 415 the address. */ 416 fe_outb(sc, FE_BMPR17, save17); 417 fe_outb(sc, FE_BMPR16, save16); 418 #endif 419 420 #if 1 421 /* Report what we got. */ 422 if (bootverbose) { 423 int i; 424 data -= JLI_EEPROM_SIZE; 425 for (i = 0; i < JLI_EEPROM_SIZE; i += 16) { 426 printf("%s: EEPROM(JLI):%3x: %16D\n", 427 sc->sc_xname, i, data + i, " "); 428 } 429 } 430 #endif 431 } 432 433 void 434 fe_init_jli (struct fe_softc * sc) 435 { 436 /* "Reset" by writing into a magic location. */ 437 DELAY(200); 438 fe_outb(sc, 0x1E, fe_inb(sc, 0x1E)); 439 DELAY(300); 440 } 441 442 443 /* 444 * SSi 78Q8377A support routines. 445 */ 446 447 /* 448 * Routines to read all bytes from the config EEPROM through 78Q8377A. 449 * It is a MicroWire (3-wire) serial EEPROM with 8-bit address. (I.e., 450 * 93C56 or 93C66.) 451 * 452 * As I don't have SSi manuals, (hmm, an old song again!) I'm not exactly 453 * sure the following code is correct... It is just stolen from the 454 * C-NET(98)P2 support routine in FreeBSD(98). 455 */ 456 457 void 458 fe_read_eeprom_ssi (struct fe_softc *sc, u_char *data) 459 { 460 u_char val, bit; 461 int n; 462 u_char save6, save7, save12; 463 464 /* Save the current value for the DLCR registers we are about 465 to destroy. */ 466 save6 = fe_inb(sc, FE_DLCR6); 467 save7 = fe_inb(sc, FE_DLCR7); 468 469 /* Put the 78Q8377A into a state that we can access the EEPROM. */ 470 fe_outb(sc, FE_DLCR6, 471 FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_DLC_DISABLE); 472 fe_outb(sc, FE_DLCR7, 473 FE_D7_BYTSWP_LH | FE_D7_RBS_BMPR | FE_D7_RDYPNS | FE_D7_POWER_UP); 474 475 /* Save the current value for the BMPR12 register, too. */ 476 save12 = fe_inb(sc, FE_DLCR12); 477 478 /* Read bytes from EEPROM; two bytes per an iteration. */ 479 for (n = 0; n < SSI_EEPROM_SIZE / 2; n++) { 480 481 /* Start EEPROM access */ 482 fe_outb(sc, FE_DLCR12, SSI_EEP); 483 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 484 485 /* Send the following four bits to the EEPROM in the 486 specified order: a dummy bit, a start bit, and 487 command bits (10) for READ. */ 488 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL ); 489 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 490 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT); 491 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 492 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_DAT); 493 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | SSI_DAT); /* 1 */ 494 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL ); 495 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK ); /* 0 */ 496 497 /* Pass the iteration count to the chip. */ 498 for (bit = 0x80; bit != 0x00; bit >>= 1) { 499 val = ( n & bit ) ? SSI_DAT : 0; 500 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | val); 501 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK | val); 502 } 503 504 /* Read a byte. */ 505 val = 0; 506 for (bit = 0x80; bit != 0x00; bit >>= 1) { 507 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 508 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK); 509 if (fe_inb(sc, FE_DLCR12) & SSI_DIN) 510 val |= bit; 511 } 512 *data++ = val; 513 514 /* Read one more byte. */ 515 val = 0; 516 for (bit = 0x80; bit != 0x00; bit >>= 1) { 517 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL); 518 fe_outb(sc, FE_DLCR12, SSI_EEP | SSI_CSL | SSI_CLK); 519 if (fe_inb(sc, FE_DLCR12) & SSI_DIN) 520 val |= bit; 521 } 522 *data++ = val; 523 524 fe_outb(sc, FE_DLCR12, SSI_EEP); 525 } 526 527 /* Reset the EEPROM interface. (For now.) */ 528 fe_outb(sc, FE_DLCR12, 0x00); 529 530 /* Restore the saved register values, for the case that we 531 didn't have 78Q8377A at the given address. */ 532 fe_outb(sc, FE_DLCR12, save12); 533 fe_outb(sc, FE_DLCR7, save7); 534 fe_outb(sc, FE_DLCR6, save6); 535 536 #if 1 537 /* Report what we got. */ 538 if (bootverbose) { 539 int i; 540 data -= SSI_EEPROM_SIZE; 541 for (i = 0; i < SSI_EEPROM_SIZE; i += 16) { 542 printf("%s: EEPROM(SSI):%3x: %16D\n", 543 sc->sc_xname, i, data + i, " "); 544 } 545 } 546 #endif 547 } 548 549 /* 550 * TDK/LANX boards support routines. 551 */ 552 553 /* It is assumed that the CLK line is low and SDA is high (float) upon entry. */ 554 #define LNX_PH(D,K,N) \ 555 ((LNX_SDA_##D | LNX_CLK_##K) << N) 556 #define LNX_CYCLE(D1,D2,D3,D4,K1,K2,K3,K4) \ 557 (LNX_PH(D1,K1,0)|LNX_PH(D2,K2,8)|LNX_PH(D3,K3,16)|LNX_PH(D4,K4,24)) 558 559 #define LNX_CYCLE_START LNX_CYCLE(HI,LO,LO,HI, HI,HI,LO,LO) 560 #define LNX_CYCLE_STOP LNX_CYCLE(LO,LO,HI,HI, LO,HI,HI,LO) 561 #define LNX_CYCLE_HI LNX_CYCLE(HI,HI,HI,HI, LO,HI,LO,LO) 562 #define LNX_CYCLE_LO LNX_CYCLE(LO,LO,LO,HI, LO,HI,LO,LO) 563 #define LNX_CYCLE_INIT LNX_CYCLE(LO,HI,HI,HI, LO,LO,LO,LO) 564 565 static void 566 fe_eeprom_cycle_lnx (struct fe_softc *sc, u_short reg20, u_long cycle) 567 { 568 fe_outb(sc, reg20, (cycle ) & 0xFF); 569 DELAY(15); 570 fe_outb(sc, reg20, (cycle >> 8) & 0xFF); 571 DELAY(15); 572 fe_outb(sc, reg20, (cycle >> 16) & 0xFF); 573 DELAY(15); 574 fe_outb(sc, reg20, (cycle >> 24) & 0xFF); 575 DELAY(15); 576 } 577 578 static u_char 579 fe_eeprom_receive_lnx (struct fe_softc *sc, u_short reg20) 580 { 581 u_char dat; 582 583 fe_outb(sc, reg20, LNX_CLK_HI | LNX_SDA_FL); 584 DELAY(15); 585 dat = fe_inb(sc, reg20); 586 fe_outb(sc, reg20, LNX_CLK_LO | LNX_SDA_FL); 587 DELAY(15); 588 return (dat & LNX_SDA_IN); 589 } 590 591 void 592 fe_read_eeprom_lnx (struct fe_softc *sc, u_char *data) 593 { 594 int i; 595 u_char n, bit, val; 596 u_char save20; 597 u_short reg20 = 0x14; 598 599 save20 = fe_inb(sc, reg20); 600 601 /* NOTE: DELAY() timing constants are approximately three 602 times longer (slower) than the required minimum. This is 603 to guarantee a reliable operation under some tough 604 conditions... Fortunately, this routine is only called 605 during the boot phase, so the speed is less important than 606 stability. */ 607 608 #if 1 609 /* Reset the X24C01's internal state machine and put it into 610 the IDLE state. We usually don't need this, but *if* 611 someone (e.g., probe routine of other driver) write some 612 garbage into the register at 0x14, synchronization will be 613 lost, and the normal EEPROM access protocol won't work. 614 Moreover, as there are no easy way to reset, we need a 615 _manoeuvre_ here. (It even lacks a reset pin, so pushing 616 the RESET button on the PC doesn't help!) */ 617 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_INIT); 618 for (i = 0; i < 10; i++) 619 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START); 620 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP); 621 DELAY(10000); 622 #endif 623 624 /* Issue a start condition. */ 625 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_START); 626 627 /* Send seven bits of the starting address (zero, in this 628 case) and a command bit for READ. */ 629 val = 0x01; 630 for (bit = 0x80; bit != 0x00; bit >>= 1) { 631 if (val & bit) { 632 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_HI); 633 } else { 634 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO); 635 } 636 } 637 638 /* Receive an ACK bit. */ 639 if (fe_eeprom_receive_lnx(sc, reg20)) { 640 /* ACK was not received. EEPROM is not present (i.e., 641 this board was not a TDK/LANX) or not working 642 properly. */ 643 if (bootverbose) { 644 printf("%s: no ACK received from EEPROM(LNX)\n", 645 sc->sc_xname); 646 } 647 /* Clear the given buffer to indicate we could not get 648 any info. and return. */ 649 bzero(data, LNX_EEPROM_SIZE); 650 goto RET; 651 } 652 653 /* Read bytes from EEPROM. */ 654 for (n = 0; n < LNX_EEPROM_SIZE; n++) { 655 656 /* Read a byte and store it into the buffer. */ 657 val = 0x00; 658 for (bit = 0x80; bit != 0x00; bit >>= 1) { 659 if (fe_eeprom_receive_lnx(sc, reg20)) 660 val |= bit; 661 } 662 *data++ = val; 663 664 /* Acknowledge if we have to read more. */ 665 if (n < LNX_EEPROM_SIZE - 1) { 666 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_LO); 667 } 668 } 669 670 /* Issue a STOP condition, de-activating the clock line. 671 It will be safer to keep the clock line low than to leave 672 it high. */ 673 fe_eeprom_cycle_lnx(sc, reg20, LNX_CYCLE_STOP); 674 675 RET: 676 fe_outb(sc, reg20, save20); 677 678 #if 1 679 /* Report what we got. */ 680 if (bootverbose) { 681 data -= LNX_EEPROM_SIZE; 682 for (i = 0; i < LNX_EEPROM_SIZE; i += 16) { 683 printf("%s: EEPROM(LNX):%3x: %16D\n", 684 sc->sc_xname, i, data + i, " "); 685 } 686 } 687 #endif 688 } 689 690 void 691 fe_init_lnx (struct fe_softc * sc) 692 { 693 /* Reset the 86960. Do we need this? FIXME. */ 694 fe_outb(sc, 0x12, 0x06); 695 DELAY(100); 696 fe_outb(sc, 0x12, 0x07); 697 DELAY(100); 698 699 /* Setup IRQ control register on the ASIC. */ 700 fe_outb(sc, 0x14, sc->priv_info); 701 } 702 703 704 /* 705 * Ungermann-Bass boards support routine. 706 */ 707 void 708 fe_init_ubn (struct fe_softc * sc) 709 { 710 /* Do we need this? FIXME. */ 711 fe_outb(sc, FE_DLCR7, 712 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 713 fe_outb(sc, 0x18, 0x00); 714 DELAY(200); 715 716 /* Setup IRQ control register on the ASIC. */ 717 fe_outb(sc, 0x14, sc->priv_info); 718 } 719 720 721 /* 722 * Install interface into kernel networking data structures 723 */ 724 int 725 fe_attach (device_t dev) 726 { 727 struct fe_softc *sc = device_get_softc(dev); 728 int flags = device_get_flags(dev); 729 int b, error; 730 731 error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, 732 fe_intr, sc, &sc->irq_handle); 733 if (error) { 734 fe_release_resource(dev); 735 return ENXIO; 736 } 737 738 /* 739 * Initialize ifnet structure 740 */ 741 sc->sc_if.if_softc = sc; 742 if_initname(&sc->sc_if, device_get_name(dev), device_get_unit(dev)); 743 sc->sc_if.if_start = fe_start; 744 sc->sc_if.if_ioctl = fe_ioctl; 745 sc->sc_if.if_watchdog = fe_watchdog; 746 sc->sc_if.if_init = fe_init; 747 sc->sc_if.if_linkmib = &sc->mibdata; 748 sc->sc_if.if_linkmiblen = sizeof (sc->mibdata); 749 750 #if 0 /* I'm not sure... */ 751 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS; 752 #endif 753 754 /* 755 * Set fixed interface flags. 756 */ 757 sc->sc_if.if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST | 758 IFF_NEEDSGIANT; 759 760 #if 1 761 /* 762 * Set maximum size of output queue, if it has not been set. 763 * It is done here as this driver may be started after the 764 * system initialization (i.e., the interface is PCMCIA.) 765 * 766 * I'm not sure this is really necessary, but, even if it is, 767 * it should be done somewhere else, e.g., in if_attach(), 768 * since it must be a common workaround for all network drivers. 769 * FIXME. 770 */ 771 if (sc->sc_if.if_snd.ifq_maxlen == 0) 772 sc->sc_if.if_snd.ifq_maxlen = ifqmaxlen; 773 #endif 774 775 #if FE_SINGLE_TRANSMISSION 776 /* Override txb config to allocate minimum. */ 777 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ 778 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 779 #endif 780 781 /* Modify hardware config if it is requested. */ 782 if (flags & FE_FLAGS_OVERRIDE_DLCR6) 783 sc->proto_dlcr6 = flags & FE_FLAGS_DLCR6_VALUE; 784 785 /* Find TX buffer size, based on the hardware dependent proto. */ 786 switch (sc->proto_dlcr6 & FE_D6_TXBSIZ) { 787 case FE_D6_TXBSIZ_2x2KB: sc->txb_size = 2048; break; 788 case FE_D6_TXBSIZ_2x4KB: sc->txb_size = 4096; break; 789 case FE_D6_TXBSIZ_2x8KB: sc->txb_size = 8192; break; 790 default: 791 /* Oops, we can't work with single buffer configuration. */ 792 if (bootverbose) { 793 printf("%s: strange TXBSIZ config; fixing\n", 794 sc->sc_xname); 795 } 796 sc->proto_dlcr6 &= ~FE_D6_TXBSIZ; 797 sc->proto_dlcr6 |= FE_D6_TXBSIZ_2x2KB; 798 sc->txb_size = 2048; 799 break; 800 } 801 802 /* Initialize the if_media interface. */ 803 ifmedia_init(&sc->media, 0, fe_medchange, fe_medstat); 804 for (b = 0; bit2media[b] != 0; b++) { 805 if (sc->mbitmap & (1 << b)) { 806 ifmedia_add(&sc->media, bit2media[b], 0, NULL); 807 } 808 } 809 for (b = 0; bit2media[b] != 0; b++) { 810 if (sc->defmedia & (1 << b)) { 811 ifmedia_set(&sc->media, bit2media[b]); 812 break; 813 } 814 } 815 #if 0 /* Turned off; this is called later, when the interface UPs. */ 816 fe_medchange(sc); 817 #endif 818 819 /* Attach and stop the interface. */ 820 ether_ifattach(&sc->sc_if, sc->arpcom.ac_enaddr); 821 fe_stop(sc); 822 823 /* Print additional info when attached. */ 824 device_printf(dev, "type %s%s\n", sc->typestr, 825 (sc->proto_dlcr4 & FE_D4_DSC) ? ", full duplex" : ""); 826 if (bootverbose) { 827 int buf, txb, bbw, sbw, ram; 828 829 buf = txb = bbw = sbw = ram = -1; 830 switch ( sc->proto_dlcr6 & FE_D6_BUFSIZ ) { 831 case FE_D6_BUFSIZ_8KB: buf = 8; break; 832 case FE_D6_BUFSIZ_16KB: buf = 16; break; 833 case FE_D6_BUFSIZ_32KB: buf = 32; break; 834 case FE_D6_BUFSIZ_64KB: buf = 64; break; 835 } 836 switch ( sc->proto_dlcr6 & FE_D6_TXBSIZ ) { 837 case FE_D6_TXBSIZ_2x2KB: txb = 2; break; 838 case FE_D6_TXBSIZ_2x4KB: txb = 4; break; 839 case FE_D6_TXBSIZ_2x8KB: txb = 8; break; 840 } 841 switch ( sc->proto_dlcr6 & FE_D6_BBW ) { 842 case FE_D6_BBW_BYTE: bbw = 8; break; 843 case FE_D6_BBW_WORD: bbw = 16; break; 844 } 845 switch ( sc->proto_dlcr6 & FE_D6_SBW ) { 846 case FE_D6_SBW_BYTE: sbw = 8; break; 847 case FE_D6_SBW_WORD: sbw = 16; break; 848 } 849 switch ( sc->proto_dlcr6 & FE_D6_SRAM ) { 850 case FE_D6_SRAM_100ns: ram = 100; break; 851 case FE_D6_SRAM_150ns: ram = 150; break; 852 } 853 device_printf(dev, "SRAM %dKB %dbit %dns, TXB %dKBx2, %dbit I/O\n", 854 buf, bbw, ram, txb, sbw); 855 } 856 if (sc->stability & UNSTABLE_IRQ) 857 device_printf(dev, "warning: IRQ number may be incorrect\n"); 858 if (sc->stability & UNSTABLE_MAC) 859 device_printf(dev, "warning: above MAC address may be incorrect\n"); 860 if (sc->stability & UNSTABLE_TYPE) 861 device_printf(dev, "warning: hardware type was not validated\n"); 862 863 return 0; 864 } 865 866 int 867 fe_alloc_port(device_t dev, int size) 868 { 869 struct fe_softc *sc = device_get_softc(dev); 870 struct resource *res; 871 int rid; 872 873 rid = 0; 874 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 875 0ul, ~0ul, size, RF_ACTIVE); 876 if (res) { 877 sc->port_used = size; 878 sc->port_res = res; 879 sc->iot = rman_get_bustag(res); 880 sc->ioh = rman_get_bushandle(res); 881 return (0); 882 } 883 884 return (ENOENT); 885 } 886 887 int 888 fe_alloc_irq(device_t dev, int flags) 889 { 890 struct fe_softc *sc = device_get_softc(dev); 891 struct resource *res; 892 int rid; 893 894 rid = 0; 895 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE | flags); 896 if (res) { 897 sc->irq_res = res; 898 return (0); 899 } 900 901 return (ENOENT); 902 } 903 904 void 905 fe_release_resource(device_t dev) 906 { 907 struct fe_softc *sc = device_get_softc(dev); 908 909 if (sc->port_res) { 910 bus_release_resource(dev, SYS_RES_IOPORT, 0, sc->port_res); 911 sc->port_res = NULL; 912 } 913 if (sc->irq_res) { 914 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res); 915 sc->irq_res = NULL; 916 } 917 } 918 919 /* 920 * Reset interface, after some (hardware) trouble is deteced. 921 */ 922 static void 923 fe_reset (struct fe_softc *sc) 924 { 925 /* Record how many packets are lost by this accident. */ 926 sc->sc_if.if_oerrors += sc->txb_sched + sc->txb_count; 927 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 928 929 /* Put the interface into known initial state. */ 930 fe_stop(sc); 931 if (sc->sc_if.if_flags & IFF_UP) 932 fe_init(sc); 933 } 934 935 /* 936 * Stop everything on the interface. 937 * 938 * All buffered packets, both transmitting and receiving, 939 * if any, will be lost by stopping the interface. 940 */ 941 void 942 fe_stop (struct fe_softc *sc) 943 { 944 int s; 945 946 s = splimp(); 947 948 /* Disable interrupts. */ 949 fe_outb(sc, FE_DLCR2, 0x00); 950 fe_outb(sc, FE_DLCR3, 0x00); 951 952 /* Stop interface hardware. */ 953 DELAY(200); 954 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 955 DELAY(200); 956 957 /* Clear all interrupt status. */ 958 fe_outb(sc, FE_DLCR0, 0xFF); 959 fe_outb(sc, FE_DLCR1, 0xFF); 960 961 /* Put the chip in stand-by mode. */ 962 DELAY(200); 963 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_POWER_DOWN); 964 DELAY(200); 965 966 /* Reset transmitter variables and interface flags. */ 967 sc->sc_if.if_flags &= ~(IFF_OACTIVE | IFF_RUNNING); 968 sc->sc_if.if_timer = 0; 969 sc->txb_free = sc->txb_size; 970 sc->txb_count = 0; 971 sc->txb_sched = 0; 972 973 /* MAR loading can be delayed. */ 974 sc->filter_change = 0; 975 976 /* Call a device-specific hook. */ 977 if (sc->stop) 978 sc->stop(sc); 979 980 (void) splx(s); 981 } 982 983 /* 984 * Device timeout/watchdog routine. Entered if the device neglects to 985 * generate an interrupt after a transmit has been started on it. 986 */ 987 static void 988 fe_watchdog ( struct ifnet *ifp ) 989 { 990 struct fe_softc *sc = (struct fe_softc *)ifp; 991 992 /* A "debug" message. */ 993 if_printf(ifp, "transmission timeout (%d+%d)%s\n", 994 sc->txb_sched, sc->txb_count, 995 (ifp->if_flags & IFF_UP) ? "" : " when down"); 996 if (sc->sc_if.if_opackets == 0 && sc->sc_if.if_ipackets == 0) 997 if_printf(ifp, "wrong IRQ setting in config?\n"); 998 fe_reset(sc); 999 } 1000 1001 /* 1002 * Initialize device. 1003 */ 1004 static void 1005 fe_init (void * xsc) 1006 { 1007 struct fe_softc *sc = xsc; 1008 int s; 1009 1010 /* Start initializing 86960. */ 1011 s = splimp(); 1012 1013 /* Call a hook before we start initializing the chip. */ 1014 if (sc->init) 1015 sc->init(sc); 1016 1017 /* 1018 * Make sure to disable the chip, also. 1019 * This may also help re-programming the chip after 1020 * hot insertion of PCMCIAs. 1021 */ 1022 DELAY(200); 1023 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 1024 DELAY(200); 1025 1026 /* Power up the chip and select register bank for DLCRs. */ 1027 DELAY(200); 1028 fe_outb(sc, FE_DLCR7, 1029 sc->proto_dlcr7 | FE_D7_RBS_DLCR | FE_D7_POWER_UP); 1030 DELAY(200); 1031 1032 /* Feed the station address. */ 1033 fe_outblk(sc, FE_DLCR8, sc->sc_enaddr, ETHER_ADDR_LEN); 1034 1035 /* Clear multicast address filter to receive nothing. */ 1036 fe_outb(sc, FE_DLCR7, 1037 sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 1038 fe_outblk(sc, FE_MAR8, fe_filter_nothing.data, FE_FILTER_LEN); 1039 1040 /* Select the BMPR bank for runtime register access. */ 1041 fe_outb(sc, FE_DLCR7, 1042 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 1043 1044 /* Initialize registers. */ 1045 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */ 1046 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */ 1047 fe_outb(sc, FE_DLCR2, 0x00); 1048 fe_outb(sc, FE_DLCR3, 0x00); 1049 fe_outb(sc, FE_DLCR4, sc->proto_dlcr4); 1050 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5); 1051 fe_outb(sc, FE_BMPR10, 0x00); 1052 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1); 1053 fe_outb(sc, FE_BMPR12, 0x00); 1054 fe_outb(sc, FE_BMPR13, sc->proto_bmpr13); 1055 fe_outb(sc, FE_BMPR14, 0x00); 1056 fe_outb(sc, FE_BMPR15, 0x00); 1057 1058 /* Enable interrupts. */ 1059 fe_outb(sc, FE_DLCR2, FE_TMASK); 1060 fe_outb(sc, FE_DLCR3, FE_RMASK); 1061 1062 /* Select requested media, just before enabling DLC. */ 1063 if (sc->msel) 1064 sc->msel(sc); 1065 1066 /* Enable transmitter and receiver. */ 1067 DELAY(200); 1068 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 1069 DELAY(200); 1070 1071 #ifdef DIAGNOSTIC 1072 /* 1073 * Make sure to empty the receive buffer. 1074 * 1075 * This may be redundant, but *if* the receive buffer were full 1076 * at this point, then the driver would hang. I have experienced 1077 * some strange hang-up just after UP. I hope the following 1078 * code solve the problem. 1079 * 1080 * I have changed the order of hardware initialization. 1081 * I think the receive buffer cannot have any packets at this 1082 * point in this version. The following code *must* be 1083 * redundant now. FIXME. 1084 * 1085 * I've heard a rumore that on some PC card implementation of 1086 * 8696x, the receive buffer can have some data at this point. 1087 * The following message helps discovering the fact. FIXME. 1088 */ 1089 if (!(fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP)) { 1090 printf("%s: receive buffer has some data after reset\n", 1091 sc->sc_xname); 1092 fe_emptybuffer(sc); 1093 } 1094 1095 /* Do we need this here? Actually, no. I must be paranoia. */ 1096 fe_outb(sc, FE_DLCR0, 0xFF); /* Clear all bits. */ 1097 fe_outb(sc, FE_DLCR1, 0xFF); /* ditto. */ 1098 #endif 1099 1100 /* Set 'running' flag, because we are now running. */ 1101 sc->sc_if.if_flags |= IFF_RUNNING; 1102 1103 /* 1104 * At this point, the interface is running properly, 1105 * except that it receives *no* packets. we then call 1106 * fe_setmode() to tell the chip what packets to be 1107 * received, based on the if_flags and multicast group 1108 * list. It completes the initialization process. 1109 */ 1110 fe_setmode(sc); 1111 1112 #if 0 1113 /* ...and attempt to start output queued packets. */ 1114 /* TURNED OFF, because the semi-auto media prober wants to UP 1115 the interface keeping it idle. The upper layer will soon 1116 start the interface anyway, and there are no significant 1117 delay. */ 1118 fe_start(&sc->sc_if); 1119 #endif 1120 1121 (void) splx(s); 1122 } 1123 1124 /* 1125 * This routine actually starts the transmission on the interface 1126 */ 1127 static void 1128 fe_xmit (struct fe_softc *sc) 1129 { 1130 /* 1131 * Set a timer just in case we never hear from the board again. 1132 * We use longer timeout for multiple packet transmission. 1133 * I'm not sure this timer value is appropriate. FIXME. 1134 */ 1135 sc->sc_if.if_timer = 1 + sc->txb_count; 1136 1137 /* Update txb variables. */ 1138 sc->txb_sched = sc->txb_count; 1139 sc->txb_count = 0; 1140 sc->txb_free = sc->txb_size; 1141 sc->tx_excolls = 0; 1142 1143 /* Start transmitter, passing packets in TX buffer. */ 1144 fe_outb(sc, FE_BMPR10, sc->txb_sched | FE_B10_START); 1145 } 1146 1147 /* 1148 * Start output on interface. 1149 * We make two assumptions here: 1150 * 1) that the current priority is set to splimp _before_ this code 1151 * is called *and* is returned to the appropriate priority after 1152 * return 1153 * 2) that the IFF_OACTIVE flag is checked before this code is called 1154 * (i.e. that the output part of the interface is idle) 1155 */ 1156 static void 1157 fe_start (struct ifnet *ifp) 1158 { 1159 struct fe_softc *sc = ifp->if_softc; 1160 struct mbuf *m; 1161 1162 #ifdef DIAGNOSTIC 1163 /* Just a sanity check. */ 1164 if ((sc->txb_count == 0) != (sc->txb_free == sc->txb_size)) { 1165 /* 1166 * Txb_count and txb_free co-works to manage the 1167 * transmission buffer. Txb_count keeps track of the 1168 * used potion of the buffer, while txb_free does unused 1169 * potion. So, as long as the driver runs properly, 1170 * txb_count is zero if and only if txb_free is same 1171 * as txb_size (which represents whole buffer.) 1172 */ 1173 if_printf(ifp, "inconsistent txb variables (%d, %d)\n", 1174 sc->txb_count, sc->txb_free); 1175 /* 1176 * So, what should I do, then? 1177 * 1178 * We now know txb_count and txb_free contradicts. We 1179 * cannot, however, tell which is wrong. More 1180 * over, we cannot peek 86960 transmission buffer or 1181 * reset the transmission buffer. (In fact, we can 1182 * reset the entire interface. I don't want to do it.) 1183 * 1184 * If txb_count is incorrect, leaving it as-is will cause 1185 * sending of garbage after next interrupt. We have to 1186 * avoid it. Hence, we reset the txb_count here. If 1187 * txb_free was incorrect, resetting txb_count just loose 1188 * some packets. We can live with it. 1189 */ 1190 sc->txb_count = 0; 1191 } 1192 #endif 1193 1194 /* 1195 * First, see if there are buffered packets and an idle 1196 * transmitter - should never happen at this point. 1197 */ 1198 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) { 1199 if_printf(ifp, "transmitter idle with %d buffered packets\n", 1200 sc->txb_count); 1201 fe_xmit(sc); 1202 } 1203 1204 /* 1205 * Stop accepting more transmission packets temporarily, when 1206 * a filter change request is delayed. Updating the MARs on 1207 * 86960 flushes the transmission buffer, so it is delayed 1208 * until all buffered transmission packets have been sent 1209 * out. 1210 */ 1211 if (sc->filter_change) { 1212 /* 1213 * Filter change request is delayed only when the DLC is 1214 * working. DLC soon raise an interrupt after finishing 1215 * the work. 1216 */ 1217 goto indicate_active; 1218 } 1219 1220 for (;;) { 1221 1222 /* 1223 * See if there is room to put another packet in the buffer. 1224 * We *could* do better job by peeking the send queue to 1225 * know the length of the next packet. Current version just 1226 * tests against the worst case (i.e., longest packet). FIXME. 1227 * 1228 * When adding the packet-peek feature, don't forget adding a 1229 * test on txb_count against QUEUEING_MAX. 1230 * There is a little chance the packet count exceeds 1231 * the limit. Assume transmission buffer is 8KB (2x8KB 1232 * configuration) and an application sends a bunch of small 1233 * (i.e., minimum packet sized) packets rapidly. An 8KB 1234 * buffer can hold 130 blocks of 62 bytes long... 1235 */ 1236 if (sc->txb_free 1237 < ETHER_MAX_LEN - ETHER_CRC_LEN + FE_DATA_LEN_LEN) { 1238 /* No room. */ 1239 goto indicate_active; 1240 } 1241 1242 #if FE_SINGLE_TRANSMISSION 1243 if (sc->txb_count > 0) { 1244 /* Just one packet per a transmission buffer. */ 1245 goto indicate_active; 1246 } 1247 #endif 1248 1249 /* 1250 * Get the next mbuf chain for a packet to send. 1251 */ 1252 IF_DEQUEUE(&sc->sc_if.if_snd, m); 1253 if (m == NULL) { 1254 /* No more packets to send. */ 1255 goto indicate_inactive; 1256 } 1257 1258 /* 1259 * Copy the mbuf chain into the transmission buffer. 1260 * txb_* variables are updated as necessary. 1261 */ 1262 fe_write_mbufs(sc, m); 1263 1264 /* Start transmitter if it's idle. */ 1265 if ((sc->txb_count > 0) && (sc->txb_sched == 0)) 1266 fe_xmit(sc); 1267 1268 /* 1269 * Tap off here if there is a bpf listener, 1270 * and the device is *not* in promiscuous mode. 1271 * (86960 receives self-generated packets if 1272 * and only if it is in "receive everything" 1273 * mode.) 1274 */ 1275 if (!(sc->sc_if.if_flags & IFF_PROMISC)) 1276 BPF_MTAP(&sc->sc_if, m); 1277 1278 m_freem(m); 1279 } 1280 1281 indicate_inactive: 1282 /* 1283 * We are using the !OACTIVE flag to indicate to 1284 * the outside world that we can accept an 1285 * additional packet rather than that the 1286 * transmitter is _actually_ active. Indeed, the 1287 * transmitter may be active, but if we haven't 1288 * filled all the buffers with data then we still 1289 * want to accept more. 1290 */ 1291 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1292 return; 1293 1294 indicate_active: 1295 /* 1296 * The transmitter is active, and there are no room for 1297 * more outgoing packets in the transmission buffer. 1298 */ 1299 sc->sc_if.if_flags |= IFF_OACTIVE; 1300 return; 1301 } 1302 1303 /* 1304 * Drop (skip) a packet from receive buffer in 86960 memory. 1305 */ 1306 static void 1307 fe_droppacket (struct fe_softc * sc, int len) 1308 { 1309 int i; 1310 1311 /* 1312 * 86960 manual says that we have to read 8 bytes from the buffer 1313 * before skip the packets and that there must be more than 8 bytes 1314 * remaining in the buffer when issue a skip command. 1315 * Remember, we have already read 4 bytes before come here. 1316 */ 1317 if (len > 12) { 1318 /* Read 4 more bytes, and skip the rest of the packet. */ 1319 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1320 { 1321 (void) fe_inb(sc, FE_BMPR8); 1322 (void) fe_inb(sc, FE_BMPR8); 1323 (void) fe_inb(sc, FE_BMPR8); 1324 (void) fe_inb(sc, FE_BMPR8); 1325 } 1326 else 1327 { 1328 (void) fe_inw(sc, FE_BMPR8); 1329 (void) fe_inw(sc, FE_BMPR8); 1330 } 1331 fe_outb(sc, FE_BMPR14, FE_B14_SKIP); 1332 } else { 1333 /* We should not come here unless receiving RUNTs. */ 1334 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1335 { 1336 for (i = 0; i < len; i++) 1337 (void) fe_inb(sc, FE_BMPR8); 1338 } 1339 else 1340 { 1341 for (i = 0; i < len; i += 2) 1342 (void) fe_inw(sc, FE_BMPR8); 1343 } 1344 } 1345 } 1346 1347 #ifdef DIAGNOSTIC 1348 /* 1349 * Empty receiving buffer. 1350 */ 1351 static void 1352 fe_emptybuffer (struct fe_softc * sc) 1353 { 1354 int i; 1355 u_char saved_dlcr5; 1356 1357 #ifdef FE_DEBUG 1358 printf("%s: emptying receive buffer\n", sc->sc_xname); 1359 #endif 1360 1361 /* 1362 * Stop receiving packets, temporarily. 1363 */ 1364 saved_dlcr5 = fe_inb(sc, FE_DLCR5); 1365 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5); 1366 DELAY(1300); 1367 1368 /* 1369 * When we come here, the receive buffer management may 1370 * have been broken. So, we cannot use skip operation. 1371 * Just discard everything in the buffer. 1372 */ 1373 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1374 { 1375 for (i = 0; i < 65536; i++) { 1376 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1377 break; 1378 (void) fe_inb(sc, FE_BMPR8); 1379 } 1380 } 1381 else 1382 { 1383 for (i = 0; i < 65536; i += 2) { 1384 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1385 break; 1386 (void) fe_inw(sc, FE_BMPR8); 1387 } 1388 } 1389 1390 /* 1391 * Double check. 1392 */ 1393 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) { 1394 printf("%s: could not empty receive buffer\n", sc->sc_xname); 1395 /* Hmm. What should I do if this happens? FIXME. */ 1396 } 1397 1398 /* 1399 * Restart receiving packets. 1400 */ 1401 fe_outb(sc, FE_DLCR5, saved_dlcr5); 1402 } 1403 #endif 1404 1405 /* 1406 * Transmission interrupt handler 1407 * The control flow of this function looks silly. FIXME. 1408 */ 1409 static void 1410 fe_tint (struct fe_softc * sc, u_char tstat) 1411 { 1412 int left; 1413 int col; 1414 1415 /* 1416 * Handle "excessive collision" interrupt. 1417 */ 1418 if (tstat & FE_D0_COLL16) { 1419 1420 /* 1421 * Find how many packets (including this collided one) 1422 * are left unsent in transmission buffer. 1423 */ 1424 left = fe_inb(sc, FE_BMPR10); 1425 printf("%s: excessive collision (%d/%d)\n", 1426 sc->sc_xname, left, sc->txb_sched); 1427 1428 /* 1429 * Clear the collision flag (in 86960) here 1430 * to avoid confusing statistics. 1431 */ 1432 fe_outb(sc, FE_DLCR0, FE_D0_COLLID); 1433 1434 /* 1435 * Restart transmitter, skipping the 1436 * collided packet. 1437 * 1438 * We *must* skip the packet to keep network running 1439 * properly. Excessive collision error is an 1440 * indication of the network overload. If we 1441 * tried sending the same packet after excessive 1442 * collision, the network would be filled with 1443 * out-of-time packets. Packets belonging 1444 * to reliable transport (such as TCP) are resent 1445 * by some upper layer. 1446 */ 1447 fe_outb(sc, FE_BMPR11, FE_B11_CTRL_SKIP | FE_B11_MODE1); 1448 1449 /* Update statistics. */ 1450 sc->tx_excolls++; 1451 } 1452 1453 /* 1454 * Handle "transmission complete" interrupt. 1455 */ 1456 if (tstat & FE_D0_TXDONE) { 1457 1458 /* 1459 * Add in total number of collisions on last 1460 * transmission. We also clear "collision occurred" flag 1461 * here. 1462 * 1463 * 86960 has a design flaw on collision count on multiple 1464 * packet transmission. When we send two or more packets 1465 * with one start command (that's what we do when the 1466 * transmission queue is crowded), 86960 informs us number 1467 * of collisions occurred on the last packet on the 1468 * transmission only. Number of collisions on previous 1469 * packets are lost. I have told that the fact is clearly 1470 * stated in the Fujitsu document. 1471 * 1472 * I considered not to mind it seriously. Collision 1473 * count is not so important, anyway. Any comments? FIXME. 1474 */ 1475 1476 if (fe_inb(sc, FE_DLCR0) & FE_D0_COLLID) { 1477 1478 /* Clear collision flag. */ 1479 fe_outb(sc, FE_DLCR0, FE_D0_COLLID); 1480 1481 /* Extract collision count from 86960. */ 1482 col = fe_inb(sc, FE_DLCR4); 1483 col = (col & FE_D4_COL) >> FE_D4_COL_SHIFT; 1484 if (col == 0) { 1485 /* 1486 * Status register indicates collisions, 1487 * while the collision count is zero. 1488 * This can happen after multiple packet 1489 * transmission, indicating that one or more 1490 * previous packet(s) had been collided. 1491 * 1492 * Since the accurate number of collisions 1493 * has been lost, we just guess it as 1; 1494 * Am I too optimistic? FIXME. 1495 */ 1496 col = 1; 1497 } 1498 sc->sc_if.if_collisions += col; 1499 if (col == 1) 1500 sc->mibdata.dot3StatsSingleCollisionFrames++; 1501 else 1502 sc->mibdata.dot3StatsMultipleCollisionFrames++; 1503 sc->mibdata.dot3StatsCollFrequencies[col-1]++; 1504 } 1505 1506 /* 1507 * Update transmission statistics. 1508 * Be sure to reflect number of excessive collisions. 1509 */ 1510 col = sc->tx_excolls; 1511 sc->sc_if.if_opackets += sc->txb_sched - col; 1512 sc->sc_if.if_oerrors += col; 1513 sc->sc_if.if_collisions += col * 16; 1514 sc->mibdata.dot3StatsExcessiveCollisions += col; 1515 sc->mibdata.dot3StatsCollFrequencies[15] += col; 1516 sc->txb_sched = 0; 1517 1518 /* 1519 * The transmitter is no more active. 1520 * Reset output active flag and watchdog timer. 1521 */ 1522 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1523 sc->sc_if.if_timer = 0; 1524 1525 /* 1526 * If more data is ready to transmit in the buffer, start 1527 * transmitting them. Otherwise keep transmitter idle, 1528 * even if more data is queued. This gives receive 1529 * process a slight priority. 1530 */ 1531 if (sc->txb_count > 0) 1532 fe_xmit(sc); 1533 } 1534 } 1535 1536 /* 1537 * Ethernet interface receiver interrupt. 1538 */ 1539 static void 1540 fe_rint (struct fe_softc * sc, u_char rstat) 1541 { 1542 u_short len; 1543 u_char status; 1544 int i; 1545 1546 /* 1547 * Update statistics if this interrupt is caused by an error. 1548 * Note that, when the system was not sufficiently fast, the 1549 * receive interrupt might not be acknowledged immediately. If 1550 * one or more errornous frames were received before this routine 1551 * was scheduled, they are ignored, and the following error stats 1552 * give less than real values. 1553 */ 1554 if (rstat & (FE_D1_OVRFLO | FE_D1_CRCERR | FE_D1_ALGERR | FE_D1_SRTPKT)) { 1555 if (rstat & FE_D1_OVRFLO) 1556 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1557 if (rstat & FE_D1_CRCERR) 1558 sc->mibdata.dot3StatsFCSErrors++; 1559 if (rstat & FE_D1_ALGERR) 1560 sc->mibdata.dot3StatsAlignmentErrors++; 1561 #if 0 1562 /* The reference MAC receiver defined in 802.3 1563 silently ignores short frames (RUNTs) without 1564 notifying upper layer. RFC 1650 (dot3 MIB) is 1565 based on the 802.3, and it has no stats entry for 1566 RUNTs... */ 1567 if (rstat & FE_D1_SRTPKT) 1568 sc->mibdata.dot3StatsFrameTooShorts++; /* :-) */ 1569 #endif 1570 sc->sc_if.if_ierrors++; 1571 } 1572 1573 /* 1574 * MB86960 has a flag indicating "receive queue empty." 1575 * We just loop, checking the flag, to pull out all received 1576 * packets. 1577 * 1578 * We limit the number of iterations to avoid infinite-loop. 1579 * The upper bound is set to unrealistic high value. 1580 */ 1581 for (i = 0; i < FE_MAX_RECV_COUNT * 2; i++) { 1582 1583 /* Stop the iteration if 86960 indicates no packets. */ 1584 if (fe_inb(sc, FE_DLCR5) & FE_D5_BUFEMP) 1585 return; 1586 1587 /* 1588 * Extract a receive status byte. 1589 * As our 86960 is in 16 bit bus access mode, we have to 1590 * use inw() to get the status byte. The significant 1591 * value is returned in lower 8 bits. 1592 */ 1593 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1594 { 1595 status = fe_inb(sc, FE_BMPR8); 1596 (void) fe_inb(sc, FE_BMPR8); 1597 } 1598 else 1599 { 1600 status = (u_char) fe_inw(sc, FE_BMPR8); 1601 } 1602 1603 /* 1604 * Extract the packet length. 1605 * It is a sum of a header (14 bytes) and a payload. 1606 * CRC has been stripped off by the 86960. 1607 */ 1608 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1609 { 1610 len = fe_inb(sc, FE_BMPR8); 1611 len |= (fe_inb(sc, FE_BMPR8) << 8); 1612 } 1613 else 1614 { 1615 len = fe_inw(sc, FE_BMPR8); 1616 } 1617 1618 /* 1619 * AS our 86960 is programed to ignore errored frame, 1620 * we must not see any error indication in the 1621 * receive buffer. So, any error condition is a 1622 * serious error, e.g., out-of-sync of the receive 1623 * buffer pointers. 1624 */ 1625 if ((status & 0xF0) != 0x20 || 1626 len > ETHER_MAX_LEN - ETHER_CRC_LEN || 1627 len < ETHER_MIN_LEN - ETHER_CRC_LEN) { 1628 printf("%s: RX buffer out-of-sync\n", sc->sc_xname); 1629 sc->sc_if.if_ierrors++; 1630 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1631 fe_reset(sc); 1632 return; 1633 } 1634 1635 /* 1636 * Go get a packet. 1637 */ 1638 if (fe_get_packet(sc, len) < 0) { 1639 /* 1640 * Negative return from fe_get_packet() 1641 * indicates no available mbuf. We stop 1642 * receiving packets, even if there are more 1643 * in the buffer. We hope we can get more 1644 * mbuf next time. 1645 */ 1646 sc->sc_if.if_ierrors++; 1647 sc->mibdata.dot3StatsMissedFrames++; 1648 fe_droppacket(sc, len); 1649 return; 1650 } 1651 1652 /* Successfully received a packet. Update stat. */ 1653 sc->sc_if.if_ipackets++; 1654 } 1655 1656 /* Maximum number of frames has been received. Something 1657 strange is happening here... */ 1658 printf("%s: unusual receive flood\n", sc->sc_xname); 1659 sc->mibdata.dot3StatsInternalMacReceiveErrors++; 1660 fe_reset(sc); 1661 } 1662 1663 /* 1664 * Ethernet interface interrupt processor 1665 */ 1666 static void 1667 fe_intr (void *arg) 1668 { 1669 struct fe_softc *sc = arg; 1670 u_char tstat, rstat; 1671 int loop_count = FE_MAX_LOOP; 1672 1673 /* Loop until there are no more new interrupt conditions. */ 1674 while (loop_count-- > 0) { 1675 /* 1676 * Get interrupt conditions, masking unneeded flags. 1677 */ 1678 tstat = fe_inb(sc, FE_DLCR0) & FE_TMASK; 1679 rstat = fe_inb(sc, FE_DLCR1) & FE_RMASK; 1680 if (tstat == 0 && rstat == 0) 1681 return; 1682 1683 /* 1684 * Reset the conditions we are acknowledging. 1685 */ 1686 fe_outb(sc, FE_DLCR0, tstat); 1687 fe_outb(sc, FE_DLCR1, rstat); 1688 1689 /* 1690 * Handle transmitter interrupts. 1691 */ 1692 if (tstat) 1693 fe_tint(sc, tstat); 1694 1695 /* 1696 * Handle receiver interrupts 1697 */ 1698 if (rstat) 1699 fe_rint(sc, rstat); 1700 1701 /* 1702 * Update the multicast address filter if it is 1703 * needed and possible. We do it now, because 1704 * we can make sure the transmission buffer is empty, 1705 * and there is a good chance that the receive queue 1706 * is empty. It will minimize the possibility of 1707 * packet loss. 1708 */ 1709 if (sc->filter_change && 1710 sc->txb_count == 0 && sc->txb_sched == 0) { 1711 fe_loadmar(sc); 1712 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1713 } 1714 1715 /* 1716 * If it looks like the transmitter can take more data, 1717 * attempt to start output on the interface. This is done 1718 * after handling the receiver interrupt to give the 1719 * receive operation priority. 1720 * 1721 * BTW, I'm not sure in what case the OACTIVE is on at 1722 * this point. Is the following test redundant? 1723 * 1724 * No. This routine polls for both transmitter and 1725 * receiver interrupts. 86960 can raise a receiver 1726 * interrupt when the transmission buffer is full. 1727 */ 1728 if ((sc->sc_if.if_flags & IFF_OACTIVE) == 0) 1729 fe_start(&sc->sc_if); 1730 } 1731 1732 printf("%s: too many loops\n", sc->sc_xname); 1733 } 1734 1735 /* 1736 * Process an ioctl request. This code needs some work - it looks 1737 * pretty ugly. 1738 */ 1739 static int 1740 fe_ioctl (struct ifnet * ifp, u_long command, caddr_t data) 1741 { 1742 struct fe_softc *sc = ifp->if_softc; 1743 struct ifreq *ifr = (struct ifreq *)data; 1744 int s, error = 0; 1745 1746 s = splimp(); 1747 1748 switch (command) { 1749 1750 case SIOCSIFFLAGS: 1751 /* 1752 * Switch interface state between "running" and 1753 * "stopped", reflecting the UP flag. 1754 */ 1755 if (sc->sc_if.if_flags & IFF_UP) { 1756 if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) 1757 fe_init(sc); 1758 } else { 1759 if ((sc->sc_if.if_flags & IFF_RUNNING) != 0) 1760 fe_stop(sc); 1761 } 1762 1763 /* 1764 * Promiscuous and/or multicast flags may have changed, 1765 * so reprogram the multicast filter and/or receive mode. 1766 */ 1767 fe_setmode(sc); 1768 1769 /* Done. */ 1770 break; 1771 1772 case SIOCADDMULTI: 1773 case SIOCDELMULTI: 1774 /* 1775 * Multicast list has changed; set the hardware filter 1776 * accordingly. 1777 */ 1778 fe_setmode(sc); 1779 break; 1780 1781 case SIOCSIFMEDIA: 1782 case SIOCGIFMEDIA: 1783 /* Let if_media to handle these commands and to call 1784 us back. */ 1785 error = ifmedia_ioctl(ifp, ifr, &sc->media, command); 1786 break; 1787 1788 default: 1789 error = ether_ioctl(ifp, command, data); 1790 break; 1791 } 1792 1793 (void) splx(s); 1794 return (error); 1795 } 1796 1797 /* 1798 * Retrieve packet from receive buffer and send to the next level up via 1799 * ether_input(). 1800 * Returns 0 if success, -1 if error (i.e., mbuf allocation failure). 1801 */ 1802 static int 1803 fe_get_packet (struct fe_softc * sc, u_short len) 1804 { 1805 struct ifnet *ifp = &sc->sc_if; 1806 struct ether_header *eh; 1807 struct mbuf *m; 1808 1809 /* 1810 * NFS wants the data be aligned to the word (4 byte) 1811 * boundary. Ethernet header has 14 bytes. There is a 1812 * 2-byte gap. 1813 */ 1814 #define NFS_MAGIC_OFFSET 2 1815 1816 /* 1817 * This function assumes that an Ethernet packet fits in an 1818 * mbuf (with a cluster attached when necessary.) On FreeBSD 1819 * 2.0 for x86, which is the primary target of this driver, an 1820 * mbuf cluster has 4096 bytes, and we are happy. On ancient 1821 * BSDs, such as vanilla 4.3 for 386, a cluster size was 1024, 1822 * however. If the following #error message were printed upon 1823 * compile, you need to rewrite this function. 1824 */ 1825 #if ( MCLBYTES < ETHER_MAX_LEN - ETHER_CRC_LEN + NFS_MAGIC_OFFSET ) 1826 #error "Too small MCLBYTES to use fe driver." 1827 #endif 1828 1829 /* 1830 * Our strategy has one more problem. There is a policy on 1831 * mbuf cluster allocation. It says that we must have at 1832 * least MINCLSIZE (208 bytes on FreeBSD 2.0 for x86) to 1833 * allocate a cluster. For a packet of a size between 1834 * (MHLEN - 2) to (MINCLSIZE - 2), our code violates the rule... 1835 * On the other hand, the current code is short, simple, 1836 * and fast, however. It does no harmful thing, just waists 1837 * some memory. Any comments? FIXME. 1838 */ 1839 1840 /* Allocate an mbuf with packet header info. */ 1841 MGETHDR(m, M_DONTWAIT, MT_DATA); 1842 if (m == NULL) 1843 return -1; 1844 1845 /* Attach a cluster if this packet doesn't fit in a normal mbuf. */ 1846 if (len > MHLEN - NFS_MAGIC_OFFSET) { 1847 MCLGET(m, M_DONTWAIT); 1848 if (!(m->m_flags & M_EXT)) { 1849 m_freem(m); 1850 return -1; 1851 } 1852 } 1853 1854 /* Initialize packet header info. */ 1855 m->m_pkthdr.rcvif = ifp; 1856 m->m_pkthdr.len = len; 1857 1858 /* Set the length of this packet. */ 1859 m->m_len = len; 1860 1861 /* The following silliness is to make NFS happy */ 1862 m->m_data += NFS_MAGIC_OFFSET; 1863 1864 /* Get (actually just point to) the header part. */ 1865 eh = mtod(m, struct ether_header *); 1866 1867 /* Get a packet. */ 1868 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1869 { 1870 fe_insb(sc, FE_BMPR8, (u_int8_t *)eh, len); 1871 } 1872 else 1873 { 1874 fe_insw(sc, FE_BMPR8, (u_int16_t *)eh, (len + 1) >> 1); 1875 } 1876 1877 /* Feed the packet to upper layer. */ 1878 (*ifp->if_input)(ifp, m); 1879 return 0; 1880 } 1881 1882 /* 1883 * Write an mbuf chain to the transmission buffer memory using 16 bit PIO. 1884 * Returns number of bytes actually written, including length word. 1885 * 1886 * If an mbuf chain is too long for an Ethernet frame, it is not sent. 1887 * Packets shorter than Ethernet minimum are legal, and we pad them 1888 * before sending out. An exception is "partial" packets which are 1889 * shorter than mandatory Ethernet header. 1890 */ 1891 static void 1892 fe_write_mbufs (struct fe_softc *sc, struct mbuf *m) 1893 { 1894 u_short length, len; 1895 struct mbuf *mp; 1896 u_char *data; 1897 u_short savebyte; /* WARNING: Architecture dependent! */ 1898 #define NO_PENDING_BYTE 0xFFFF 1899 1900 static u_char padding [ETHER_MIN_LEN - ETHER_CRC_LEN - ETHER_HDR_LEN]; 1901 1902 #ifdef DIAGNOSTIC 1903 /* First, count up the total number of bytes to copy */ 1904 length = 0; 1905 for (mp = m; mp != NULL; mp = mp->m_next) 1906 length += mp->m_len; 1907 1908 /* Check if this matches the one in the packet header. */ 1909 if (length != m->m_pkthdr.len) { 1910 printf("%s: packet length mismatch? (%d/%d)\n", sc->sc_xname, 1911 length, m->m_pkthdr.len); 1912 } 1913 #else 1914 /* Just use the length value in the packet header. */ 1915 length = m->m_pkthdr.len; 1916 #endif 1917 1918 #ifdef DIAGNOSTIC 1919 /* 1920 * Should never send big packets. If such a packet is passed, 1921 * it should be a bug of upper layer. We just ignore it. 1922 * ... Partial (too short) packets, neither. 1923 */ 1924 if (length < ETHER_HDR_LEN || 1925 length > ETHER_MAX_LEN - ETHER_CRC_LEN) { 1926 printf("%s: got an out-of-spec packet (%u bytes) to send\n", 1927 sc->sc_xname, length); 1928 sc->sc_if.if_oerrors++; 1929 sc->mibdata.dot3StatsInternalMacTransmitErrors++; 1930 return; 1931 } 1932 #endif 1933 1934 /* 1935 * Put the length word for this frame. 1936 * Does 86960 accept odd length? -- Yes. 1937 * Do we need to pad the length to minimum size by ourselves? 1938 * -- Generally yes. But for (or will be) the last 1939 * packet in the transmission buffer, we can skip the 1940 * padding process. It may gain performance slightly. FIXME. 1941 */ 1942 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1943 { 1944 len = max(length, ETHER_MIN_LEN - ETHER_CRC_LEN); 1945 fe_outb(sc, FE_BMPR8, len & 0x00ff); 1946 fe_outb(sc, FE_BMPR8, (len & 0xff00) >> 8); 1947 } 1948 else 1949 { 1950 fe_outw(sc, FE_BMPR8, 1951 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN)); 1952 } 1953 1954 /* 1955 * Update buffer status now. 1956 * Truncate the length up to an even number, since we use outw(). 1957 */ 1958 if ((sc->proto_dlcr6 & FE_D6_SBW) != FE_D6_SBW_BYTE) 1959 { 1960 length = (length + 1) & ~1; 1961 } 1962 sc->txb_free -= FE_DATA_LEN_LEN + 1963 max(length, ETHER_MIN_LEN - ETHER_CRC_LEN); 1964 sc->txb_count++; 1965 1966 /* 1967 * Transfer the data from mbuf chain to the transmission buffer. 1968 * MB86960 seems to require that data be transferred as words, and 1969 * only words. So that we require some extra code to patch 1970 * over odd-length mbufs. 1971 */ 1972 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 1973 { 1974 /* 8-bit cards are easy. */ 1975 for (mp = m; mp != 0; mp = mp->m_next) { 1976 if (mp->m_len) 1977 fe_outsb(sc, FE_BMPR8, mtod(mp, caddr_t), 1978 mp->m_len); 1979 } 1980 } 1981 else 1982 { 1983 /* 16-bit cards are a pain. */ 1984 savebyte = NO_PENDING_BYTE; 1985 for (mp = m; mp != 0; mp = mp->m_next) { 1986 1987 /* Ignore empty mbuf. */ 1988 len = mp->m_len; 1989 if (len == 0) 1990 continue; 1991 1992 /* Find the actual data to send. */ 1993 data = mtod(mp, caddr_t); 1994 1995 /* Finish the last byte. */ 1996 if (savebyte != NO_PENDING_BYTE) { 1997 fe_outw(sc, FE_BMPR8, savebyte | (*data << 8)); 1998 data++; 1999 len--; 2000 savebyte = NO_PENDING_BYTE; 2001 } 2002 2003 /* output contiguous words */ 2004 if (len > 1) { 2005 fe_outsw(sc, FE_BMPR8, (u_int16_t *)data, 2006 len >> 1); 2007 data += len & ~1; 2008 len &= 1; 2009 } 2010 2011 /* Save a remaining byte, if there is one. */ 2012 if (len > 0) 2013 savebyte = *data; 2014 } 2015 2016 /* Spit the last byte, if the length is odd. */ 2017 if (savebyte != NO_PENDING_BYTE) 2018 fe_outw(sc, FE_BMPR8, savebyte); 2019 } 2020 2021 /* Pad to the Ethernet minimum length, if the packet is too short. */ 2022 if (length < ETHER_MIN_LEN - ETHER_CRC_LEN) { 2023 if ((sc->proto_dlcr6 & FE_D6_SBW) == FE_D6_SBW_BYTE) 2024 { 2025 fe_outsb(sc, FE_BMPR8, padding, 2026 ETHER_MIN_LEN - ETHER_CRC_LEN - length); 2027 } 2028 else 2029 { 2030 fe_outsw(sc, FE_BMPR8, (u_int16_t *)padding, 2031 (ETHER_MIN_LEN - ETHER_CRC_LEN - length) >> 1); 2032 } 2033 } 2034 } 2035 2036 /* 2037 * Compute the multicast address filter from the 2038 * list of multicast addresses we need to listen to. 2039 */ 2040 static struct fe_filter 2041 fe_mcaf ( struct fe_softc *sc ) 2042 { 2043 int index; 2044 struct fe_filter filter; 2045 struct ifmultiaddr *ifma; 2046 2047 filter = fe_filter_nothing; 2048 IF_ADDR_LOCK(sc->ifp); 2049 TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) { 2050 if (ifma->ifma_addr->sa_family != AF_LINK) 2051 continue; 2052 index = ether_crc32_le(LLADDR((struct sockaddr_dl *) 2053 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26; 2054 #ifdef FE_DEBUG 2055 printf("%s: hash(%6D) == %d\n", 2056 sc->sc_xname, enm->enm_addrlo , ":", index); 2057 #endif 2058 2059 filter.data[index >> 3] |= 1 << (index & 7); 2060 } 2061 IF_ADDR_UNLOCK(sc->ifp); 2062 return ( filter ); 2063 } 2064 2065 /* 2066 * Calculate a new "multicast packet filter" and put the 86960 2067 * receiver in appropriate mode. 2068 */ 2069 static void 2070 fe_setmode (struct fe_softc *sc) 2071 { 2072 int flags = sc->sc_if.if_flags; 2073 2074 /* 2075 * If the interface is not running, we postpone the update 2076 * process for receive modes and multicast address filter 2077 * until the interface is restarted. It reduces some 2078 * complicated job on maintaining chip states. (Earlier versions 2079 * of this driver had a bug on that point...) 2080 * 2081 * To complete the trick, fe_init() calls fe_setmode() after 2082 * restarting the interface. 2083 */ 2084 if (!(flags & IFF_RUNNING)) 2085 return; 2086 2087 /* 2088 * Promiscuous mode is handled separately. 2089 */ 2090 if (flags & IFF_PROMISC) { 2091 /* 2092 * Program 86960 to receive all packets on the segment 2093 * including those directed to other stations. 2094 * Multicast filter stored in MARs are ignored 2095 * under this setting, so we don't need to update it. 2096 * 2097 * Promiscuous mode in FreeBSD 2 is used solely by 2098 * BPF, and BPF only listens to valid (no error) packets. 2099 * So, we ignore erroneous ones even in this mode. 2100 * (Older versions of fe driver mistook the point.) 2101 */ 2102 fe_outb(sc, FE_DLCR5, 2103 sc->proto_dlcr5 | FE_D5_AFM0 | FE_D5_AFM1); 2104 sc->filter_change = 0; 2105 return; 2106 } 2107 2108 /* 2109 * Turn the chip to the normal (non-promiscuous) mode. 2110 */ 2111 fe_outb(sc, FE_DLCR5, sc->proto_dlcr5 | FE_D5_AFM1); 2112 2113 /* 2114 * Find the new multicast filter value. 2115 */ 2116 if (flags & IFF_ALLMULTI) 2117 sc->filter = fe_filter_all; 2118 else 2119 sc->filter = fe_mcaf(sc); 2120 sc->filter_change = 1; 2121 2122 /* 2123 * We have to update the multicast filter in the 86960, A.S.A.P. 2124 * 2125 * Note that the DLC (Data Link Control unit, i.e. transmitter 2126 * and receiver) must be stopped when feeding the filter, and 2127 * DLC trashes all packets in both transmission and receive 2128 * buffers when stopped. 2129 * 2130 * To reduce the packet loss, we delay the filter update 2131 * process until buffers are empty. 2132 */ 2133 if (sc->txb_sched == 0 && sc->txb_count == 0 && 2134 !(fe_inb(sc, FE_DLCR1) & FE_D1_PKTRDY)) { 2135 /* 2136 * Buffers are (apparently) empty. Load 2137 * the new filter value into MARs now. 2138 */ 2139 fe_loadmar(sc); 2140 } else { 2141 /* 2142 * Buffers are not empty. Mark that we have to update 2143 * the MARs. The new filter will be loaded by feintr() 2144 * later. 2145 */ 2146 } 2147 } 2148 2149 /* 2150 * Load a new multicast address filter into MARs. 2151 * 2152 * The caller must have splimp'ed before fe_loadmar. 2153 * This function starts the DLC upon return. So it can be called only 2154 * when the chip is working, i.e., from the driver's point of view, when 2155 * a device is RUNNING. (I mistook the point in previous versions.) 2156 */ 2157 static void 2158 fe_loadmar (struct fe_softc * sc) 2159 { 2160 /* Stop the DLC (transmitter and receiver). */ 2161 DELAY(200); 2162 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE); 2163 DELAY(200); 2164 2165 /* Select register bank 1 for MARs. */ 2166 fe_outb(sc, FE_DLCR7, sc->proto_dlcr7 | FE_D7_RBS_MAR | FE_D7_POWER_UP); 2167 2168 /* Copy filter value into the registers. */ 2169 fe_outblk(sc, FE_MAR8, sc->filter.data, FE_FILTER_LEN); 2170 2171 /* Restore the bank selection for BMPRs (i.e., runtime registers). */ 2172 fe_outb(sc, FE_DLCR7, 2173 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 2174 2175 /* Restart the DLC. */ 2176 DELAY(200); 2177 fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_ENABLE); 2178 DELAY(200); 2179 2180 /* We have just updated the filter. */ 2181 sc->filter_change = 0; 2182 } 2183 2184 /* Change the media selection. */ 2185 static int 2186 fe_medchange (struct ifnet *ifp) 2187 { 2188 struct fe_softc *sc = (struct fe_softc *)ifp->if_softc; 2189 2190 #ifdef DIAGNOSTIC 2191 /* If_media should not pass any request for a media which this 2192 interface doesn't support. */ 2193 int b; 2194 2195 for (b = 0; bit2media[b] != 0; b++) { 2196 if (bit2media[b] == sc->media.ifm_media) break; 2197 } 2198 if (((1 << b) & sc->mbitmap) == 0) { 2199 printf("%s: got an unsupported media request (0x%x)\n", 2200 sc->sc_xname, sc->media.ifm_media); 2201 return EINVAL; 2202 } 2203 #endif 2204 2205 /* We don't actually change media when the interface is down. 2206 fe_init() will do the job, instead. Should we also wait 2207 until the transmission buffer being empty? Changing the 2208 media when we are sending a frame will cause two garbages 2209 on wires, one on old media and another on new. FIXME */ 2210 if (sc->sc_if.if_flags & IFF_UP) { 2211 if (sc->msel) sc->msel(sc); 2212 } 2213 2214 return 0; 2215 } 2216 2217 /* I don't know how I can support media status callback... FIXME. */ 2218 static void 2219 fe_medstat (struct ifnet *ifp, struct ifmediareq *ifmr) 2220 { 2221 (void)ifp; 2222 (void)ifmr; 2223 }
Cache object: e82030e4017663617c87d0895190fc16
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