The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/fxp/if_fxpvar.h

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    1 /*                  
    2  * Copyright (c) 1995, David Greenman
    3  * All rights reserved.
    4  *              
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:             
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice unmodified, this list of conditions, and the following
   10  *    disclaimer.  
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in the
   13  *    documentation and/or other materials provided with the distribution.
   14  *
   15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   25  * SUCH DAMAGE.
   26  *
   27  * $FreeBSD: releng/5.0/sys/dev/fxp/if_fxpvar.h 106554 2002-11-07 16:04:07Z iedowse $
   28  */
   29 
   30 /*
   31  * Misc. defintions for the Intel EtherExpress Pro/100B PCI Fast
   32  * Ethernet driver
   33  */
   34 
   35 /*
   36  * Number of transmit control blocks. This determines the number
   37  * of transmit buffers that can be chained in the CB list.
   38  * This must be a power of two.
   39  */
   40 #define FXP_NTXCB       128
   41 
   42 /*
   43  * Number of completed TX commands at which point an interrupt
   44  * will be generated to garbage collect the attached buffers.
   45  * Must be at least one less than FXP_NTXCB, and should be
   46  * enough less so that the transmitter doesn't becomes idle
   47  * during the buffer rundown (which would reduce performance).
   48  */
   49 #define FXP_CXINT_THRESH 120
   50 
   51 /*
   52  * TxCB list index mask. This is used to do list wrap-around.
   53  */
   54 #define FXP_TXCB_MASK   (FXP_NTXCB - 1)
   55 
   56 /*
   57  * Number of receive frame area buffers. These are large so chose
   58  * wisely.
   59  */
   60 #ifdef DEVICE_POLLING
   61 #define FXP_NRFABUFS    192
   62 #else
   63 #define FXP_NRFABUFS    64
   64 #endif
   65 
   66 /*
   67  * Maximum number of seconds that the receiver can be idle before we
   68  * assume it's dead and attempt to reset it by reprogramming the
   69  * multicast filter. This is part of a work-around for a bug in the
   70  * NIC. See fxp_stats_update().
   71  */
   72 #define FXP_MAX_RX_IDLE 15
   73 
   74 /*
   75  * Default maximum time, in microseconds, that an interrupt may be delayed
   76  * in an attempt to coalesce interrupts.  This is only effective if the Intel 
   77  * microcode is loaded, and may be changed via either loader tunables or
   78  * sysctl.  See also the CPUSAVER_DWORD entry in rcvbundl.h.
   79  */
   80 #define TUNABLE_INT_DELAY 1000
   81 
   82 /*
   83  * Default number of packets that will be bundled, before an interrupt is 
   84  * generated.  This is only effective if the Intel microcode is loaded, and
   85  * may be changed via either loader tunables or sysctl.  This may not be 
   86  * present in all microcode revisions, see also the CPUSAVER_BUNDLE_MAX_DWORD
   87  * entry in rcvbundl.h.
   88  */
   89 #define TUNABLE_BUNDLE_MAX 6
   90 
   91 #if __FreeBSD_version < 500000
   92 #define FXP_LOCK(_sc)
   93 #define FXP_UNLOCK(_sc)
   94 #define mtx_init(a, b, c, d)
   95 #define mtx_destroy(a)
   96 struct mtx { int dummy; };
   97 #else
   98 #define FXP_LOCK(_sc)           mtx_lock(&(_sc)->sc_mtx)
   99 #define FXP_UNLOCK(_sc)         mtx_unlock(&(_sc)->sc_mtx)
  100 #endif
  101 
  102 #ifdef __alpha__
  103 #undef vtophys
  104 #define vtophys(va)     alpha_XXX_dmamap((vm_offset_t)(va))
  105 #endif /* __alpha__ */
  106 
  107 /*
  108  * NOTE: Elements are ordered for optimal cacheline behavior, and NOT
  109  *       for functional grouping.
  110  */
  111 struct fxp_softc {
  112         struct arpcom arpcom;           /* per-interface network data */
  113         struct resource *mem;           /* resource descriptor for registers */
  114         int rtp;                        /* register resource type */
  115         int rgd;                        /* register descriptor in use */
  116         struct resource *irq;           /* resource descriptor for interrupt */
  117         void *ih;                       /* interrupt handler cookie */
  118         struct mtx sc_mtx;
  119         bus_space_tag_t sc_st;          /* bus space tag */
  120         bus_space_handle_t sc_sh;       /* bus space handle */
  121         struct mbuf *rfa_headm;         /* first mbuf in receive frame area */
  122         struct mbuf *rfa_tailm;         /* last mbuf in receive frame area */
  123         struct fxp_cb_tx *cbl_first;    /* first active TxCB in list */
  124         int tx_queued;                  /* # of active TxCB's */
  125         int need_mcsetup;               /* multicast filter needs programming */
  126         struct fxp_cb_tx *cbl_last;     /* last active TxCB in list */
  127         struct fxp_stats *fxp_stats;    /* Pointer to interface stats */
  128         int rx_idle_secs;               /* # of seconds RX has been idle */
  129         struct callout_handle stat_ch;  /* Handle for canceling our stat timeout */
  130         struct fxp_cb_tx *cbl_base;     /* base of TxCB list */
  131         struct fxp_cb_mcs *mcsp;        /* Pointer to mcast setup descriptor */
  132         struct ifmedia sc_media;        /* media information */
  133         device_t miibus;
  134         device_t dev;
  135         struct sysctl_ctx_list sysctl_ctx;
  136         struct sysctl_oid *sysctl_tree;
  137         int tunable_int_delay;          /* interrupt delay value for ucode */
  138         int tunable_bundle_max;         /* max # frames per interrupt (ucode) */
  139         int eeprom_size;                /* size of serial EEPROM */
  140         int suspended;                  /* 0 = normal  1 = suspended (APM) */
  141         int cu_resume_bug;
  142         int revision;
  143         int flags;
  144         u_int32_t saved_maps[5];        /* pci data */
  145         u_int32_t saved_biosaddr;
  146         u_int8_t saved_intline;
  147         u_int8_t saved_cachelnsz;
  148         u_int8_t saved_lattimer;
  149 };
  150 
  151 #define FXP_FLAG_MWI_ENABLE     0x0001  /* MWI enable */
  152 #define FXP_FLAG_READ_ALIGN     0x0002  /* align read access with cacheline */
  153 #define FXP_FLAG_WRITE_ALIGN    0x0004  /* end write on cacheline */
  154 #define FXP_FLAG_EXT_TXCB       0x0008  /* enable use of extended TXCB */
  155 #define FXP_FLAG_SERIAL_MEDIA   0x0010  /* 10Mbps serial interface */
  156 #define FXP_FLAG_LONG_PKT_EN    0x0020  /* enable long packet reception */
  157 #define FXP_FLAG_ALL_MCAST      0x0040  /* accept all multicast frames */
  158 #define FXP_FLAG_CU_RESUME_BUG  0x0080  /* requires workaround for CU_RESUME */
  159 #define FXP_FLAG_UCODE          0x0100  /* ucode is loaded */
  160 #define FXP_FLAG_DEFERRED_RNR   0x0200  /* DEVICE_POLLING deferred RNR */
  161 
  162 /* Macros to ease CSR access. */
  163 #define CSR_READ_1(sc, reg)                                             \
  164         bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
  165 #define CSR_READ_2(sc, reg)                                             \
  166         bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
  167 #define CSR_READ_4(sc, reg)                                             \
  168         bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
  169 #define CSR_WRITE_1(sc, reg, val)                                       \
  170         bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
  171 #define CSR_WRITE_2(sc, reg, val)                                       \
  172         bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
  173 #define CSR_WRITE_4(sc, reg, val)                                       \
  174         bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
  175 
  176 #define sc_if                   arpcom.ac_if
  177 
  178 #define FXP_UNIT(_sc)           (_sc)->arpcom.ac_if.if_unit

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