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sys/dev/fxp/rcvbundl.h
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1 /*- 2 Copyright (c) 1999-2001, Intel Corporation 3 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright notice, 13 this list of conditions and the following disclaimer in the documentation 14 and/or other materials provided with the distribution. 15 16 3. Neither the name of Intel Corporation nor the names of its contributors 17 may be used to endorse or promote products derived from this software 18 without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 24 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 26 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 27 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 28 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * $FreeBSD$ 33 */ 34 /* 35 rcvbundl.h 36 37 Author: Patrick J Luhmann (PJL) 38 Date: 05/30/2000 39 Version: 3.28 40 41 This file contains the loadable micro code arrays to implement receive bundling on the 42 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step, 43 D102 B-step with TCO work around and D012 C-step. 44 45 Each controller has its own specific micro code array. The array for one controller 46 is totally incompatible with any other controller, and if used will most likely 47 cause the controller to lock up and stop responding to the driver. Each micro 48 code array has its own parameter offsets (described below), and they each have 49 their own version number (which should not be confused with the version of the 50 rcvbundl.h file given above). 51 52 */ 53 54 /* Size of loadable micro code image for each supported chip. */ 55 #ifndef D100_NUM_MICROCODE_DWORDS 56 #define D100_NUM_MICROCODE_DWORDS 66 57 #endif 58 #ifndef D101_NUM_MICROCODE_DWORDS 59 #define D101_NUM_MICROCODE_DWORDS 102 60 #endif 61 #ifndef D101M_NUM_MICROCODE_DWORDS 62 #define D101M_NUM_MICROCODE_DWORDS 134 63 #endif 64 #ifndef D101S_NUM_MICROCODE_DWORDS 65 #define D101S_NUM_MICROCODE_DWORDS 134 66 #endif 67 #ifndef D102_NUM_MICROCODE_DWORDS 68 #define D102_NUM_MICROCODE_DWORDS 134 69 #endif 70 #ifndef D102_NUM_TCO_MICROCODE_DWORDS 71 #define D102_NUM_TCO_MICROCODE_DWORDS 134 72 #endif 73 74 75 /************************************************************************* 76 * CPUSaver parameters 77 * 78 * All CPUSaver parameters are 16-bit literals that are part of a 79 * "move immediate value" instruction. By changing the value of 80 * the literal in the instruction before the code is loaded, the 81 * driver can change algorithm. 82 * 83 * CPUSAVER_DWORD - This is the location of the instruction that loads 84 * the dead-man timer with its inital value. By writing a 16-bit 85 * value to the low word of this instruction, the driver can change 86 * the timer value. The current default is either x600 or x800; 87 * experiments show that the value probably should stay within the 88 * range of x200 - x1000. 89 * 90 * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction 91 * that sets the maximum number of frames that will be bundled. In 92 * some situations, such as the TCP windowing algorithm, it may be 93 * better to limit the growth of the bundle size than let it go as 94 * high as it can, because that could cause too much added latency. 95 * The default is six, because this is the number of packets in the 96 * default TCP window size. A value of 1 would make CPUSaver indicate 97 * an interrupt for every frame received. If you do not want to put 98 * a limit on the bundle size, set this value to xFFFF. 99 * 100 * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction 101 * that contains a bit-mask describing the minimum size frame that 102 * will be bundled. The default masks the lower 7 bits, which means 103 * that any frame less than 128 bytes in length will not be bundled, 104 * but will instead immediately generate an interrupt. This does 105 * not affect the current bundle in any way. Any frame that is 128 106 * bytes or large will be bundled normally. This feature is meant 107 * to provide immediate indication of ACK frames in a TCP environment. 108 * Customers were seeing poor performance when a machine with CPUSaver 109 * enabled was sending but not receiving. The delay introduced when 110 * the ACKs were received was enough to reduce total throughput, because 111 * the sender would sit idle until the ACK was finally seen. 112 * 113 * The current default is 0xFF80, which masks out the lower 7 bits. 114 * This means that any frame which is x7F (127) bytes or smaller 115 * will cause an immediate interrupt. Because this value must be a 116 * bit mask, there are only a few valid values that can be used. To 117 * turn this feature off, the driver can write the value xFFFF to the 118 * lower word of this instruction (in the same way that the other 119 * parameters are used). Likewise, a value of 0xF800 (2047) would 120 * cause an interrupt to be generated for every frame, because all 121 * standard Ethernet frames are <= 2047 bytes in length. 122 *************************************************************************/ 123 124 125 126 /********************************************************/ 127 /* CPUSaver micro code for the D101A */ 128 /********************************************************/ 129 130 /* Version 2.0 */ 131 132 /* This value is the same for both A and B step of 558. */ 133 #define D101_CPUSAVER_DWORD 72 134 135 136 #define D101_A_RCVBUNDLE_UCODE \ 137 {\ 138 0x03B301BB, \ 139 0x0046FFFF, \ 140 0xFFFFFFFF, \ 141 0x051DFFFF, \ 142 0xFFFFFFFF, \ 143 0xFFFFFFFF, \ 144 0x000C0001, \ 145 0x00101212, \ 146 0x000C0008, \ 147 0x003801BC, \ 148 0x00000000, \ 149 0x00124818, \ 150 0x000C1000, \ 151 0x00220809, \ 152 0x00010200, \ 153 0x00124818, \ 154 0x000CFFFC, \ 155 0x003803B5, \ 156 0x00000000, \ 157 0x00000000, \ 158 0x00000000, \ 159 0x00000000, \ 160 0x0010009C, \ 161 0x0024B81D, \ 162 0x00130836, \ 163 0x000C0001, \ 164 0x0026081C, \ 165 0x0020C81B, \ 166 0x00130824, \ 167 0x00222819, \ 168 0x00101213, \ 169 0x00041000, \ 170 0x003A03B3, \ 171 0x00010200, \ 172 0x00101B13, \ 173 0x00238081, \ 174 0x00213049, \ 175 0x0038003B, \ 176 0x00000000, \ 177 0x00000000, \ 178 0x00000000, \ 179 0x00000000, \ 180 0x00000000, \ 181 0x00000000, \ 182 0x00000000, \ 183 0x00000000, \ 184 0x00000000, \ 185 0x00000000, \ 186 0x00000000, \ 187 0x00000000, \ 188 0x00000000, \ 189 0x00000000, \ 190 0x00000000, \ 191 0x00000000, \ 192 0x0010009C, \ 193 0x0024B83E, \ 194 0x00130826, \ 195 0x000C0001, \ 196 0x0026083B, \ 197 0x00010200, \ 198 0x00134824, \ 199 0x000C0001, \ 200 0x00101213, \ 201 0x00041000, \ 202 0x0038051E, \ 203 0x00101313, \ 204 0x00010400, \ 205 0x00380521, \ 206 0x00050600, \ 207 0x00100824, \ 208 0x00101310, \ 209 0x00041000, \ 210 0x00080600, \ 211 0x00101B10, \ 212 0x0038051E, \ 213 0x00000000, \ 214 0x00000000, \ 215 0x00000000, \ 216 0x00000000, \ 217 0x00000000, \ 218 0x00000000, \ 219 0x00000000, \ 220 0x00000000, \ 221 0x00000000, \ 222 0x00000000, \ 223 0x00000000, \ 224 0x00000000, \ 225 0x00000000, \ 226 0x00000000, \ 227 0x00000000, \ 228 0x00000000, \ 229 0x00000000, \ 230 0x00000000, \ 231 0x00000000, \ 232 0x00000000, \ 233 0x00000000, \ 234 0x00000000, \ 235 0x00000000, \ 236 0x00000000, \ 237 0x00000000, \ 238 0x00000000, \ 239 0x00000000, \ 240 } 241 242 243 /********************************************************/ 244 /* CPUSaver micro code for the D101B */ 245 /********************************************************/ 246 247 /* Version 2.0 */ 248 249 #define D101_B0_RCVBUNDLE_UCODE \ 250 {\ 251 0x03B401BC, \ 252 0x0047FFFF, \ 253 0xFFFFFFFF, \ 254 0x051EFFFF, \ 255 0xFFFFFFFF, \ 256 0xFFFFFFFF, \ 257 0x000C0001, \ 258 0x00101B92, \ 259 0x000C0008, \ 260 0x003801BD, \ 261 0x00000000, \ 262 0x00124818, \ 263 0x000C1000, \ 264 0x00220809, \ 265 0x00010200, \ 266 0x00124818, \ 267 0x000CFFFC, \ 268 0x003803B6, \ 269 0x00000000, \ 270 0x00000000, \ 271 0x00000000, \ 272 0x00000000, \ 273 0x0010009C, \ 274 0x0024B81D, \ 275 0x0013082F, \ 276 0x000C0001, \ 277 0x0026081C, \ 278 0x0020C81B, \ 279 0x00130837, \ 280 0x00222819, \ 281 0x00101B93, \ 282 0x00041000, \ 283 0x003A03B4, \ 284 0x00010200, \ 285 0x00101793, \ 286 0x00238082, \ 287 0x0021304A, \ 288 0x0038003C, \ 289 0x00000000, \ 290 0x00000000, \ 291 0x00000000, \ 292 0x00000000, \ 293 0x00000000, \ 294 0x00000000, \ 295 0x00000000, \ 296 0x00000000, \ 297 0x00000000, \ 298 0x00000000, \ 299 0x00000000, \ 300 0x00000000, \ 301 0x00000000, \ 302 0x00000000, \ 303 0x00000000, \ 304 0x00000000, \ 305 0x0010009C, \ 306 0x0024B83E, \ 307 0x00130826, \ 308 0x000C0001, \ 309 0x0026083B, \ 310 0x00010200, \ 311 0x00134837, \ 312 0x000C0001, \ 313 0x00101B93, \ 314 0x00041000, \ 315 0x0038051F, \ 316 0x00101313, \ 317 0x00010400, \ 318 0x00380522, \ 319 0x00050600, \ 320 0x00100837, \ 321 0x00101310, \ 322 0x00041000, \ 323 0x00080600, \ 324 0x00101790, \ 325 0x0038051F, \ 326 0x00000000, \ 327 0x00000000, \ 328 0x00000000, \ 329 0x00000000, \ 330 0x00000000, \ 331 0x00000000, \ 332 0x00000000, \ 333 0x00000000, \ 334 0x00000000, \ 335 0x00000000, \ 336 0x00000000, \ 337 0x00000000, \ 338 0x00000000, \ 339 0x00000000, \ 340 0x00000000, \ 341 0x00000000, \ 342 0x00000000, \ 343 0x00000000, \ 344 0x00000000, \ 345 0x00000000, \ 346 0x00000000, \ 347 0x00000000, \ 348 0x00000000, \ 349 0x00000000, \ 350 0x00000000, \ 351 0x00000000, \ 352 0x00000000, \ 353 } 354 355 356 /********************************************************/ 357 /* CPUSaver micro code for the D101M (B-step only) */ 358 /********************************************************/ 359 360 /* Version 2.10 */ 361 362 /* Parameter values for the D101M B-step */ 363 #define D101M_CPUSAVER_DWORD 78 364 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD 65 365 #define D101M_CPUSAVER_MIN_SIZE_DWORD 126 366 367 368 #define D101M_B_RCVBUNDLE_UCODE \ 369 {\ 370 0x00550215, \ 371 0xFFFF0437, \ 372 0xFFFFFFFF, \ 373 0x06A70789, \ 374 0xFFFFFFFF, \ 375 0x0558FFFF, \ 376 0x000C0001, \ 377 0x00101312, \ 378 0x000C0008, \ 379 0x00380216, \ 380 0x0010009C, \ 381 0x00204056, \ 382 0x002380CC, \ 383 0x00380056, \ 384 0x0010009C, \ 385 0x00244C0B, \ 386 0x00000800, \ 387 0x00124818, \ 388 0x00380438, \ 389 0x00000000, \ 390 0x00140000, \ 391 0x00380555, \ 392 0x00308000, \ 393 0x00100662, \ 394 0x00100561, \ 395 0x000E0408, \ 396 0x00134861, \ 397 0x000C0002, \ 398 0x00103093, \ 399 0x00308000, \ 400 0x00100624, \ 401 0x00100561, \ 402 0x000E0408, \ 403 0x00100861, \ 404 0x000C007E, \ 405 0x00222C21, \ 406 0x000C0002, \ 407 0x00103093, \ 408 0x00380C7A, \ 409 0x00080000, \ 410 0x00103090, \ 411 0x00380C7A, \ 412 0x00000000, \ 413 0x00000000, \ 414 0x00000000, \ 415 0x00000000, \ 416 0x0010009C, \ 417 0x00244C2D, \ 418 0x00010004, \ 419 0x00041000, \ 420 0x003A0437, \ 421 0x00044010, \ 422 0x0038078A, \ 423 0x00000000, \ 424 0x00100099, \ 425 0x00206C7A, \ 426 0x0010009C, \ 427 0x00244C48, \ 428 0x00130824, \ 429 0x000C0001, \ 430 0x00101213, \ 431 0x00260C75, \ 432 0x00041000, \ 433 0x00010004, \ 434 0x00130826, \ 435 0x000C0006, \ 436 0x002206A8, \ 437 0x0013C926, \ 438 0x00101313, \ 439 0x003806A8, \ 440 0x00000000, \ 441 0x00000000, \ 442 0x00000000, \ 443 0x00000000, \ 444 0x00000000, \ 445 0x00000000, \ 446 0x00000000, \ 447 0x00000000, \ 448 0x00080600, \ 449 0x00101B10, \ 450 0x00050004, \ 451 0x00100826, \ 452 0x00101210, \ 453 0x00380C34, \ 454 0x00000000, \ 455 0x00000000, \ 456 0x0021155B, \ 457 0x00100099, \ 458 0x00206559, \ 459 0x0010009C, \ 460 0x00244559, \ 461 0x00130836, \ 462 0x000C0000, \ 463 0x00220C62, \ 464 0x000C0001, \ 465 0x00101B13, \ 466 0x00229C0E, \ 467 0x00210C0E, \ 468 0x00226C0E, \ 469 0x00216C0E, \ 470 0x0022FC0E, \ 471 0x00215C0E, \ 472 0x00214C0E, \ 473 0x00380555, \ 474 0x00010004, \ 475 0x00041000, \ 476 0x00278C67, \ 477 0x00040800, \ 478 0x00018100, \ 479 0x003A0437, \ 480 0x00130826, \ 481 0x000C0001, \ 482 0x00220559, \ 483 0x00101313, \ 484 0x00380559, \ 485 0x00000000, \ 486 0x00000000, \ 487 0x00000000, \ 488 0x00000000, \ 489 0x00000000, \ 490 0x00000000, \ 491 0x00000000, \ 492 0x00000000, \ 493 0x00130831, \ 494 0x0010090B, \ 495 0x00124813, \ 496 0x000CFF80, \ 497 0x002606AB, \ 498 0x00041000, \ 499 0x003806A8, \ 500 0x00000000, \ 501 0x00000000, \ 502 0x00000000, \ 503 0x00000000, \ 504 } 505 506 507 /********************************************************/ 508 /* CPUSaver micro code for the D101S */ 509 /********************************************************/ 510 511 /* Version 1.20 */ 512 513 /* Parameter values for the D101S */ 514 #define D101S_CPUSAVER_DWORD 78 515 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD 67 516 #define D101S_CPUSAVER_MIN_SIZE_DWORD 129 517 518 519 #define D101S_RCVBUNDLE_UCODE \ 520 {\ 521 0x00550242, \ 522 0xFFFF047E, \ 523 0xFFFFFFFF, \ 524 0x06FF0818, \ 525 0xFFFFFFFF, \ 526 0x05A6FFFF, \ 527 0x000C0001, \ 528 0x00101312, \ 529 0x000C0008, \ 530 0x00380243, \ 531 0x0010009C, \ 532 0x00204056, \ 533 0x002380D0, \ 534 0x00380056, \ 535 0x0010009C, \ 536 0x00244F8B, \ 537 0x00000800, \ 538 0x00124818, \ 539 0x0038047F, \ 540 0x00000000, \ 541 0x00140000, \ 542 0x003805A3, \ 543 0x00308000, \ 544 0x00100610, \ 545 0x00100561, \ 546 0x000E0408, \ 547 0x00134861, \ 548 0x000C0002, \ 549 0x00103093, \ 550 0x00308000, \ 551 0x00100624, \ 552 0x00100561, \ 553 0x000E0408, \ 554 0x00100861, \ 555 0x000C007E, \ 556 0x00222FA1, \ 557 0x000C0002, \ 558 0x00103093, \ 559 0x00380F90, \ 560 0x00080000, \ 561 0x00103090, \ 562 0x00380F90, \ 563 0x00000000, \ 564 0x00000000, \ 565 0x00000000, \ 566 0x00000000, \ 567 0x0010009C, \ 568 0x00244FAD, \ 569 0x00010004, \ 570 0x00041000, \ 571 0x003A047E, \ 572 0x00044010, \ 573 0x00380819, \ 574 0x00000000, \ 575 0x00100099, \ 576 0x00206FFD, \ 577 0x0010009A, \ 578 0x0020AFFD, \ 579 0x0010009C, \ 580 0x00244FC8, \ 581 0x00130824, \ 582 0x000C0001, \ 583 0x00101213, \ 584 0x00260FF8, \ 585 0x00041000, \ 586 0x00010004, \ 587 0x00130826, \ 588 0x000C0006, \ 589 0x00220700, \ 590 0x0013C926, \ 591 0x00101313, \ 592 0x00380700, \ 593 0x00000000, \ 594 0x00000000, \ 595 0x00000000, \ 596 0x00000000, \ 597 0x00000000, \ 598 0x00000000, \ 599 0x00080600, \ 600 0x00101B10, \ 601 0x00050004, \ 602 0x00100826, \ 603 0x00101210, \ 604 0x00380FB6, \ 605 0x00000000, \ 606 0x00000000, \ 607 0x002115A9, \ 608 0x00100099, \ 609 0x002065A7, \ 610 0x0010009A, \ 611 0x0020A5A7, \ 612 0x0010009C, \ 613 0x002445A7, \ 614 0x00130836, \ 615 0x000C0000, \ 616 0x00220FE4, \ 617 0x000C0001, \ 618 0x00101B13, \ 619 0x00229F8E, \ 620 0x00210F8E, \ 621 0x00226F8E, \ 622 0x00216F8E, \ 623 0x0022FF8E, \ 624 0x00215F8E, \ 625 0x00214F8E, \ 626 0x003805A3, \ 627 0x00010004, \ 628 0x00041000, \ 629 0x00278FE9, \ 630 0x00040800, \ 631 0x00018100, \ 632 0x003A047E, \ 633 0x00130826, \ 634 0x000C0001, \ 635 0x002205A7, \ 636 0x00101313, \ 637 0x003805A7, \ 638 0x00000000, \ 639 0x00000000, \ 640 0x00000000, \ 641 0x00000000, \ 642 0x00000000, \ 643 0x00000000, \ 644 0x00000000, \ 645 0x00000000, \ 646 0x00000000, \ 647 0x00130831, \ 648 0x0010090B, \ 649 0x00124813, \ 650 0x000CFF80, \ 651 0x00260703, \ 652 0x00041000, \ 653 0x00380700, \ 654 0x00000000, \ 655 } 656 657 658 /********************************************************/ 659 /* CPUSaver micro code for the D102 B-step */ 660 /********************************************************/ 661 662 /* Version 2.0 */ 663 664 /* 665 This version of CPUSaver is different from all others in 666 a different way. It combines the CPUSaver algorithm with 667 fixes for bugs in the B-step hardware (specifically, bugs 668 with Inline Receive). 669 Thus, when CPUSaver is disabled, this micro code image will 670 still need to be loaded. Before this happens, the hit addresses 671 for the CPUSaver algorithm must be set to 0x1FFFF. The hit 672 addresses for CPUSaver are (starting with 0, and remember that 673 674 */ 675 676 /* Parameter values for the D102 B-step */ 677 #define D102_B_CPUSAVER_DWORD 91 678 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD 115 679 #define D102_B_CPUSAVER_MIN_SIZE_DWORD 70 680 681 682 #define D102_B_RCVBUNDLE_UCODE \ 683 {\ 684 0x006F0276, \ 685 0x02BF0E93, \ 686 0x1FFF0ED9, \ 687 0x0D2508FA, \ 688 0x04D21FFF, \ 689 0x0EA10892, \ 690 0x00300001, \ 691 0x0140D871, \ 692 0x00300008, \ 693 0x00E00277, \ 694 0x01406C57, \ 695 0x00816073, \ 696 0x008700FA, \ 697 0x00E00070, \ 698 0x00E00E94, \ 699 0x00200004, \ 700 0x01410000, \ 701 0x014B6F6F, \ 702 0x0030FFFF, \ 703 0x01486F72, \ 704 0x00E81F9B, \ 705 0x00E00EA3, \ 706 0x003C0040, \ 707 0x00380920, \ 708 0x00C02000, \ 709 0x0150ED38, \ 710 0x0150EE39, \ 711 0x0150EF3A, \ 712 0x003C0040, \ 713 0x01506F0D, \ 714 0x01600E72, \ 715 0x00380AE0, \ 716 0x00E002C0, \ 717 0x00300001, \ 718 0x014C0000, \ 719 0x008404DC, \ 720 0x014C6F72, \ 721 0x00E01F9D, \ 722 0x01406C51, \ 723 0x0080DFC2, \ 724 0x01406C52, \ 725 0x00815FC2, \ 726 0x01406C57, \ 727 0x00917FD5, \ 728 0x00E01FE6, \ 729 0x00000000, \ 730 0x01406C57, \ 731 0x00919FAD, \ 732 0x00038800, \ 733 0x00300000, \ 734 0x00E81FF2, \ 735 0x014D6FC4, \ 736 0x00E008FB, \ 737 0x00000000, \ 738 0x00822D30, \ 739 0x01406C51, \ 740 0x0080CD26, \ 741 0x01406C52, \ 742 0x00814D26, \ 743 0x01406C57, \ 744 0x00916D26, \ 745 0x014C6FD7, \ 746 0x00300000, \ 747 0x00841FDB, \ 748 0x00300001, \ 749 0x0140D772, \ 750 0x00E012B3, \ 751 0x014C6F91, \ 752 0x0150710B, \ 753 0x01496F72, \ 754 0x0030FF80, \ 755 0x00940EDD, \ 756 0x00102000, \ 757 0x00E00EDA, \ 758 0x01406C57, \ 759 0x00917FFD, \ 760 0x00001000, \ 761 0x00E01FFD, \ 762 0x00138800, \ 763 0x00300001, \ 764 0x00E81FF2, \ 765 0x00202500, \ 766 0x00E81F9B, \ 767 0x01600EC5, \ 768 0x00E00893, \ 769 0x00000000, \ 770 0x01406CD5, \ 771 0x0091EEA3, \ 772 0x00904EA3, \ 773 0x00901F89, \ 774 0x00E00EA3, \ 775 0x00200600, \ 776 0x0140D76F, \ 777 0x00138400, \ 778 0x01406FD8, \ 779 0x0140D96F, \ 780 0x00E01FE6, \ 781 0x00038400, \ 782 0x00102000, \ 783 0x00971FE0, \ 784 0x00101000, \ 785 0x00050200, \ 786 0x00E804D2, \ 787 0x014C6FD8, \ 788 0x00300001, \ 789 0x00840D26, \ 790 0x0140D872, \ 791 0x00E00D26, \ 792 0x014C6FD9, \ 793 0x00300001, \ 794 0x0140D972, \ 795 0x00941FBD, \ 796 0x00102000, \ 797 0x00038400, \ 798 0x014C6FD8, \ 799 0x00300006, \ 800 0x00840EDA, \ 801 0x014F71D8, \ 802 0x0140D872, \ 803 0x00E00EDA, \ 804 0x00340020, \ 805 0x014C6FED, \ 806 0x01603472, \ 807 0x016035EE, \ 808 0x016036EF, \ 809 0x00300004, \ 810 0x01611C71, \ 811 0x00300014, \ 812 0x00200A00, \ 813 0x00E810B9, \ 814 0x00600000, \ 815 0x01496F50, \ 816 0x00E004D3, \ 817 0x00000000, \ 818 } 819 820 821 822 823 /********************************************************/ 824 /* TCO micro code for the D102 B-step */ 825 /********************************************************/ 826 827 /* Version 2.0 */ 828 829 /* 830 This version is a fix to TCO bug. This version can be loaded instead 831 the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver" 832 833 */ 834 835 836 #define D102_B_TCO_UCODE \ 837 {\ 838 0x1FFF0ED3, \ 839 0x02BF0E93, \ 840 0x1FFF1FFF, \ 841 0x1FFF08FA, \ 842 0x1FFF1FFF, \ 843 0x0EA10892, \ 844 0x00906ED8, \ 845 0x01406C55, \ 846 0x00E00ED4, \ 847 0x00000000, \ 848 0x00000000, \ 849 0x00000000, \ 850 0x00000000, \ 851 0x00000000, \ 852 0x00E00E94, \ 853 0x00200004, \ 854 0x01410000, \ 855 0x014B6F6F, \ 856 0x0030FFFF, \ 857 0x01486F72, \ 858 0x00E81F9B, \ 859 0x00E00EA3, \ 860 0x003C0040, \ 861 0x00380920, \ 862 0x00C02000, \ 863 0x0150ED38, \ 864 0x0150EE39, \ 865 0x0150EF3A, \ 866 0x003C0040, \ 867 0x01506F0D, \ 868 0x01600E72, \ 869 0x00380AE0, \ 870 0x00E002C0, \ 871 0x00300001, \ 872 0x014C0000, \ 873 0x008404DC, \ 874 0x014C6F72, \ 875 0x00E01F9D, \ 876 0x00000000, \ 877 0x00000000, \ 878 0x00000000, \ 879 0x00000000, \ 880 0x00000000, \ 881 0x00000000, \ 882 0x00000000, \ 883 0x00000000, \ 884 0x01406C57, \ 885 0x00919FAD, \ 886 0x00038800, \ 887 0x00300000, \ 888 0x00E81FD5, \ 889 0x014D6FC4, \ 890 0x00E008FB, \ 891 0x00000000, \ 892 0x00000000, \ 893 0x00000000, \ 894 0x00000000, \ 895 0x00000000, \ 896 0x00000000, \ 897 0x00000000, \ 898 0x00000000, \ 899 0x00000000, \ 900 0x00000000, \ 901 0x00000000, \ 902 0x00000000, \ 903 0x00000000, \ 904 0x00000000, \ 905 0x00000000, \ 906 0x00000000, \ 907 0x00000000, \ 908 0x00000000, \ 909 0x00000000, \ 910 0x00000000, \ 911 0x00000000, \ 912 0x00000000, \ 913 0x00000000, \ 914 0x00000000, \ 915 0x00000000, \ 916 0x00138800, \ 917 0x00300001, \ 918 0x00E81FD5, \ 919 0x00202500, \ 920 0x00E81F9B, \ 921 0x01600EC5, \ 922 0x00E00893, \ 923 0x00000000, \ 924 0x01406CD5, \ 925 0x0091EEA3, \ 926 0x00904EA3, \ 927 0x00901F89, \ 928 0x00E00EA3, \ 929 0x00340020, \ 930 0x014C6FED, \ 931 0x01603472, \ 932 0x016035EE, \ 933 0x016036EF, \ 934 0x00300004, \ 935 0x01611C71, \ 936 0x00300014, \ 937 0x00200A00, \ 938 0x00E810B9, \ 939 0x00600000, \ 940 0x00000000, \ 941 0x00000000, \ 942 0x00000000, \ 943 0x00000000, \ 944 0x00000000, \ 945 0x00000000, \ 946 0x00000000, \ 947 0x00000000, \ 948 0x00000000, \ 949 0x00000000, \ 950 0x00000000, \ 951 0x00000000, \ 952 0x00000000, \ 953 0x00000000, \ 954 0x00000000, \ 955 0x00000000, \ 956 0x00000000, \ 957 0x00000000, \ 958 0x00000000, \ 959 0x00000000, \ 960 0x00000000, \ 961 0x00000000, \ 962 0x00000000, \ 963 0x00000000, \ 964 0x00000000, \ 965 0x00000000, \ 966 0x00000000, \ 967 0x00000000, \ 968 0x00000000, \ 969 0x00000000, \ 970 0x00000000, \ 971 0x00000000, \ 972 } 973 974 975 976 /********************************************************/ 977 /* Micro code for the D102 C-step */ 978 /********************************************************/ 979 980 /* Parameter values for the D102 C-step */ 981 #define D102_C_CPUSAVER_DWORD 46 982 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD 54 983 #define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */ 984 985 986 987 988 989 #if 0 990 // this uCode include the CPU Saver and the TCO work around 991 //for IP fregments. 992 #endif 993 #define D102_C_RCVBUNDLE_UCODE \ 994 { \ 995 0x00700279, \ 996 0x0E6104E2, \ 997 0x02BF0CAE, \ 998 0x1519150C, \ 999 0x1FFF0E5B, \ 1000 0x1FFF1FFF, \ 1001 0x00E014D8, \ 1002 0x00000000, \ 1003 0x00000000, \ 1004 0x00000000, \ 1005 0x00E014DC, \ 1006 0x00000000, \ 1007 0x00000000, \ 1008 0x00000000, \ 1009 0x00E014F4, \ 1010 0x00000000, \ 1011 0x00000000, \ 1012 0x00000000, \ 1013 0x00000000, \ 1014 0x00000000, \ 1015 0x00000000, \ 1016 0x00000000, \ 1017 0x00E014E0, \ 1018 0x00000000, \ 1019 0x00000000, \ 1020 0x00000000, \ 1021 0x00000000, \ 1022 0x00000000, \ 1023 0x00000000, \ 1024 0x00000000, \ 1025 0x00000000, \ 1026 0x00000000, \ 1027 0x00000000, \ 1028 0x00000000, \ 1029 0x00000000, \ 1030 0x00000000, \ 1031 0x00000000, \ 1032 0x00000000, \ 1033 0x00E014E7, \ 1034 0x00000000, \ 1035 0x00000000, \ 1036 0x00000000, \ 1037 0x00141000, \ 1038 0x015D6F0D, \ 1039 0x00E002C0, \ 1040 0x00000000, \ 1041 0x00200600, \ 1042 0x00E0150D, \ 1043 0x00000000, \ 1044 0x00000000, \ 1045 0x00000000, \ 1046 0x00000000, \ 1047 0x00000000, \ 1048 0x00000000, \ 1049 0x00300006, \ 1050 0x00E0151A, \ 1051 0x00000000, \ 1052 0x00000000, \ 1053 0x00000000, \ 1054 0x00000000, \ 1055 0x00000000, \ 1056 0x00000000, \ 1057 0x00000000, \ 1058 0x00000000, \ 1059 0x00000000, \ 1060 0x00000000, \ 1061 0x00000000, \ 1062 0x00000000, \ 1063 0x00000000, \ 1064 0x00000000, \ 1065 0x00906E65, \ 1066 0x00800E60, \ 1067 0x00E00E5D, \ 1068 0x00000000, \ 1069 0x00000000, \ 1070 0x00000000, \ 1071 0x00000000, \ 1072 0x00000000, \ 1073 0x00000000, \ 1074 0x00000000, \ 1075 0x00000000, \ 1076 0x00000000, \ 1077 0x00000000, \ 1078 0x00000000, \ 1079 0x00000000, \ 1080 0x00000000, \ 1081 0x00000000, \ 1082 0x00000000, \ 1083 0x00000000, \ 1084 0x00000000, \ 1085 0x00000000, \ 1086 0x00000000, \ 1087 0x00000000, \ 1088 0x00000000, \ 1089 0x00000000, \ 1090 0x00000000, \ 1091 0x00000000, \ 1092 0x00000000, \ 1093 0x00000000, \ 1094 0x00000000, \ 1095 0x00000000, \ 1096 0x00000000, \ 1097 0x00000000, \ 1098 0x00000000, \ 1099 0x00000000, \ 1100 0x00000000, \ 1101 0x00000000, \ 1102 0x00000000, \ 1103 0x00000000, \ 1104 0x00000000, \ 1105 0x00000000, \ 1106 0x00000000, \ 1107 0x00000000, \ 1108 0x00000000, \ 1109 0x00000000, \ 1110 0x00000000, \ 1111 0x00000000, \ 1112 0x00000000, \ 1113 0x00000000, \ 1114 0x00000000, \ 1115 0x00000000, \ 1116 0x00000000, \ 1117 0x00000000, \ 1118 0x00000000, \ 1119 0x00000000, \ 1120 0x00000000, \ 1121 0x00000000, \ 1122 0x00000000, \ 1123 0x00000000, \ 1124 0x00000000, \ 1125 0x00000000, \ 1126 0x00000000, \ 1127 0x00000000, \ 1128 0x00000000, \ 1129 }
Cache object: 0a8a675b98fee0db0b596d04ddac59ca
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